Unknown W. Brackets
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ccee8e41ee
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arm64jit: Implement exits.
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2023-09-03 21:16:08 -07:00 |
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Unknown W. Brackets
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e02426cbbf
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arm64jit: Implement some system ops.
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2023-09-03 21:16:08 -07:00 |
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Unknown W. Brackets
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0933381b9e
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arm64jit: Add some simple vec4 ops.
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2023-09-03 21:14:58 -07:00 |
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Unknown W. Brackets
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87b9633258
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arm64jit: Add some simple float ops.
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2023-09-03 21:14:58 -07:00 |
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Unknown W. Brackets
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1042737c21
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irjit: Correct metadata on Vec2 packing ops.
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2023-09-03 21:13:11 -07:00 |
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Unknown W. Brackets
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c44f0e1fca
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arm64jit: Implement most ALU in IR jit.
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2023-09-03 15:30:55 -07:00 |
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Henrik Rydgård
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2f300c2023
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Merge pull request #18060 from unknownbrackets/x86-jitbase
x86jit: Bake emuhack mask into jitbase
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2023-09-03 22:53:23 +02:00 |
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Henrik Rydgård
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daa0586641
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Merge pull request #18059 from unknownbrackets/arm64-ir-jit
arm64jit: Add initial base for IR jit
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2023-09-03 22:33:24 +02:00 |
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Unknown W. Brackets
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9439a43323
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riscv: Correct an overlap case, fix assert.
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2023-09-03 13:29:57 -07:00 |
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Unknown W. Brackets
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0452b8b57a
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riscv: Account for emuhack in JITBASEREG.
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2023-09-03 13:29:05 -07:00 |
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Unknown W. Brackets
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1d152a1486
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x86jit: Bake emuhack mask into jitbase.
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2023-09-03 12:49:36 -07:00 |
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Henrik Rydgård
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4694a11b9f
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Merge pull request #18053 from unknownbrackets/x86-jit-debug
x86jit: Handle breakpoints
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2023-09-03 21:45:48 +02:00 |
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Unknown W. Brackets
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60bcc5b083
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x86jit: Handle breakpoints.
Otherwise, we don't actually break until later, which isn't great.
Could be more optimal, "rewinding" regcache state.
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2023-09-03 12:28:11 -07:00 |
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Unknown W. Brackets
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259734bd47
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irjit: Fix likely delay slot breakpoints.
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2023-09-03 12:27:10 -07:00 |
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Unknown W. Brackets
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e1a1f56f4c
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irjit: Cleanup breakpoint ops.
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2023-09-03 12:27:10 -07:00 |
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Unknown W. Brackets
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7607280837
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arm64jit: Implement just the most basic ops.
This improves the slowness a good bit.
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2023-09-03 12:20:16 -07:00 |
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Unknown W. Brackets
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1b756ff8c1
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arm64jit: Add initial base for IR jit.
This works, but very slowly at this point.
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2023-09-03 12:14:28 -07:00 |
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Henrik Rydgård
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8a5e4d3591
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Merge pull request #18054 from unknownbrackets/memblockinfo
HLE: Capture better allocation names
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2023-09-03 10:38:03 +02:00 |
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Unknown W. Brackets
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c7304eccdb
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x86jit: Avoid R15 for jitbase if near ctxreg.
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2023-09-02 23:05:56 -07:00 |
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Unknown W. Brackets
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32feb82d16
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HLE: Capture better allocation names.
We know which FPL, so don't just say "FPL".
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2023-09-02 22:55:45 -07:00 |
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Henrik Rydgård
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f6c1493373
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Merge pull request #18048 from unknownbrackets/irjit-vec4
IR: Add a pass to keep things in vec4 more
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2023-09-02 15:11:06 +02:00 |
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Henrik Rydgård
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20dedec07e
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Merge pull request #18046 from unknownbrackets/x86-jit-reduce
x86jit: Reduce bloat further
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2023-09-02 13:37:20 +02:00 |
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Unknown W. Brackets
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739e474957
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irjit: Improve dot and store vec4 interaction.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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becad54923
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x86jit: Maintain Vec4 on FMov extract.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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2ca638868c
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irjit: Remove Vec4Scale/Vec4Dot aliasing in pass.
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2023-09-01 22:35:59 -07:00 |
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