Commit Graph

2700 Commits

Author SHA1 Message Date
Sacha
6d3c89e354 Fix up VCVT function to recognise the difference in encoding for to_int and to_float. There is no 'round to zero' option for to_float. cvt.s.w and cvt.w.s should be unsigned. 2013-03-01 13:45:22 +10:00
Henrik Rydgard
516ca8a0c4 Merge branch 'master' into armjit-fpu
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
2013-02-28 23:56:28 +01:00
Henrik Rydgard
28575d4672 Fix the avoidLoad flag in the arm regalloc 2013-02-28 23:45:47 +01:00
Sacha
35a57be115 ARMJIT: Implement MADD, MADDU. Do bitrev if it takes an immediate. Fix a bug where MULTU was being passed through to the interpreter. 2013-02-28 23:45:46 +01:00
Henrik Rydgård
f311bfba9d Merge pull request #818 from xsacha/cmp-jit
ARMJIT: min, max implementations.
2013-02-28 12:01:07 -08:00
Sacha
d3f7def328 ARMJIT: min, max implementations. 2013-03-01 02:17:39 +10:00
Sacha
059abc0d69 ARMJIT: Add floor, ceil, round. Introducing a rounding mode for VCVT.
The cvt and trunc are tested heavily. Floor, ceil, round aren't tested as much as there are very few games that use it.
2013-03-01 01:10:07 +10:00
Sacha
61f5fb35bd ARMJIT: Implement cvt.w.s, cvt.s.w and trunc.w.s that are used heavily in Dragonball.
May need to keep note of FCR to get correct rounding mode? Interpreter doesn't do this either.
2013-02-28 19:46:07 +10:00
Sacha
fe90d5cd06 Add VNEG and VABS implementations and use in FPU2op. 2013-02-27 23:33:59 +10:00
Sacha
8d4400fba1 ARMJIT: Clean up for load/stores 2013-02-27 22:17:38 +10:00
Sacha
ff14815fda ARMJIT: Combine to one instruction for load/stores. 2013-02-27 19:45:01 +10:00
Sacha
2c59de95e9 JIT the signed load/store variants too 2013-02-27 18:05:45 +10:00
Sacha
fe8b80c12e ARM JIT: Add and simplify some half-word load/store instructions. 2013-02-27 17:09:47 +10:00
Unknown W. Brackets
d3a66d0a90 Android buildfix. 2013-02-25 10:48:32 -08:00
Unknown W. Brackets
4e8359bae2 Fix Comp_ShiftType not using ROR.
Untested but looks right?  Reported by @xsacha.
2013-02-24 22:58:31 -08:00
Unknown W. Brackets
06425ae9e7 Correct the more obscure vcmp cases. 2013-02-24 15:07:29 -08:00
Unknown W. Brackets
4d1f07990a Fix some NaN handling in a few funcs. 2013-02-24 14:39:13 -08:00
Unknown W. Brackets
84c95526bc Mark more instructions which eat prefixes. 2013-02-24 14:38:37 -08:00
Unknown W. Brackets
64c42ffaf2 Fix some warnings generated by clang. 2013-02-24 10:23:31 -08:00
Unknown W. Brackets
3fbb5d4388 Avoid using CALL() directly in case of far calls.
This mainly matters for x64.
2013-02-24 00:12:55 -08:00
Unknown W. Brackets
7eb9af271b Fix downcount check without fastmem in jr. 2013-02-23 14:30:24 -08:00
Henrik Rydgård
2891576549 Merge pull request #774 from unknownbrackets/savestates
Wait for jit to exit the runloop in debug, quit, and savestates
2013-02-23 14:27:05 -08:00
Henrik Rydgård
796a19dfe2 Merge pull request #772 from unknownbrackets/change-reg
Fix change register feature
2013-02-23 13:56:42 -08:00
Unknown W. Brackets
2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
Unknown W. Brackets
0c1b6fecfe Allow changing fpu/vfpu regs. 2013-02-23 12:30:18 -08:00