Commit Graph

2700 Commits

Author SHA1 Message Date
Unknown W. Brackets
89c18d8077 riscv: Cleanup missing Poison, Crash. 2023-02-12 12:10:29 -08:00
Henrik Rydgård
9e736ca50c Workaround for sin/cos issue in GTA on Mac (and maybe others) 2023-02-07 17:43:12 +01:00
Henrik Rydgård
6dc930feb7 Merge pull request #16796 from unknownbrackets/icache-typo
jit: Fix reporting of icache invalidate near PC
2023-01-12 07:30:24 +01:00
Unknown W. Brackets
8341b09087 jit: Fix reporting of icache invalidate near PC.
Reversed the check, that's what I get for not testing it.
2023-01-11 20:22:09 -08:00
Henrik Rydgård
e1a48d74c4 A bit more GetPointer cleanup.
Probably not worth it for performance reasons, but some semantic cleanup
is good, especially the accidental GetPointer -> writable casts without
using GetPointerWrite.

Using Unchecked on already checked pointers, or when we'd crash anyway
if it returned nullptr, is good for clarity.
2023-01-10 12:13:47 +01:00
Unknown W. Brackets
dea9cac16c Core: Add range checks to some helpers and similar. 2023-01-09 16:56:18 -08:00
Unknown W. Brackets
1f66c1d689 jit: Also report invalidation near PC. 2023-01-06 19:51:43 -08:00
Unknown W. Brackets
b073d3e207 jit: Report unaligned icache invalidations.
And over invalidate them a bit.
2023-01-06 19:46:43 -08:00
Unknown W. Brackets
fb13dbf169 riscv: Correct type warning, oops. 2023-01-04 21:42:22 -08:00
Henrik Rydgård
14bd411036 Round addr to nearest cacheline when invalidating 2023-01-04 11:40:53 +01:00
Henrik Rydgård
830f1064e6 Merge pull request #16676 from unknownbrackets/riscv-disasm
Add disassembler for RISC-V
2023-01-04 09:52:56 +01:00
Henrik Rydgård
700a018ef0 IRInterpreter: Use alignment as access size in exceptions 2023-01-01 20:48:16 +01:00
Henrik Rydgård
aa80659530 Memory exception: Add facility to track size
Might theoretically help in tracking some things down.

Not fully utilized yet, the fault handler needs to extract the
information from the faulting instruction. But we can use it for
GetPointerRange etc.
2023-01-01 20:30:29 +01:00
Unknown W. Brackets
cee8bfd5cf riscv: Avoid a jit warning.
We'll end up doing the same as arm64, most likely.
2023-01-01 10:28:54 -08:00
Unknown W. Brackets
77849d3eed riscv: Add disassembler.
From https://github.com/anthony-coulter/riscv-disassembler.
Modified slightly to pull in less headers in the h, prefix funcs.
2023-01-01 10:28:53 -08:00
Unknown W. Brackets
808f47fd15 Core: Prevent crash if FakeJit is actually used.
Just make it fall back to the interpreter.
2022-12-24 17:42:50 +00:00
Unknown W. Brackets
b9fe48f42d Crash: Lookup block numbers more efficiently.
We only care about the first one in these places anyway.  Also make sure
we don't try to match an invalid block number.
2022-12-20 21:02:52 -08:00
Unknown W. Brackets
21332c677b Build: Allow compiling without armips. 2022-12-17 10:08:46 -08:00
Henrik Rydgård
e48a1599d4 Delete a few obsolete lines of code 2022-12-11 10:01:55 +01:00
Unknown W. Brackets
9cfcbc46e6 Global: Cleanup initialization/pointer checks.
Cleaning up a lot of cases of uninitialized data, unchecked return values
for failures, and similar.
2022-12-10 21:13:36 -08:00
Unknown W. Brackets
a7b7bf7826 Global: Set many read-only params as const.
This makes what they do and which args to use clearer, if nothing else.
2022-12-10 21:13:36 -08:00
Unknown W. Brackets
f44852bb18 Global: Cleanup virtual/override specifiers.
Also missing virtual destructors, hidden non-overrides, etc.
2022-12-10 21:13:36 -08:00
Henrik Rydgård
250ea5e592 Merge pull request #16407 from unknownbrackets/jit-wx
In jits, protect and unprotect using better estimates
2022-11-20 20:39:04 +01:00
Unknown W. Brackets
b2798c7ada jit: Add more reasonable estimates for RX protect. 2022-11-20 10:55:35 -08:00
Henrik Rydgård
15e66080df Merge pull request #16396 from unknownbrackets/ir-vneg
Correct misbehavior on uninitialized values in IR
2022-11-19 06:59:29 +01:00