driver1998
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5072584781
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Fix neon headers for MSVC ARM64
MSVC uses arm64_neon.h for ARM64, arm_neon.h is ARM32 only.
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2019-05-04 22:45:15 +08:00 |
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Unknown W. Brackets
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ec7cffa847
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interp: Handle vtfm/vhtfm prefixes properly.
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2019-04-02 18:46:39 -07:00 |
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Unknown W. Brackets
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5414c12a15
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interp: Cleanup prefix/size in vcrsp/vqmul.
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2019-04-02 07:12:34 -07:00 |
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Henrik Rydgård
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b346142df8
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Merge pull request #11954 from unknownbrackets/vfpu-chunk5
Fix prefix and size handling for vsbx, vsocp, and integer conv ops
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2019-04-01 17:12:03 +02:00 |
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Unknown W. Brackets
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b24f84d1a2
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interp: Handle prefixes on matrix init ops.
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2019-03-31 17:11:24 -07:00 |
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Unknown W. Brackets
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59905de719
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interp: Correct vsgn out of swizzle bounds.
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2019-03-31 17:10:51 -07:00 |
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Unknown W. Brackets
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b881a689c4
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interp: Ignore high bit in vmfvc/vmtvc.
Both 0 and 128 read/write the S prefix, for example.
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2019-03-31 17:09:55 -07:00 |
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Unknown W. Brackets
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175ceef583
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interp: Cleanup vsocp size handling.
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2019-03-31 13:52:07 -07:00 |
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Unknown W. Brackets
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4a2f8a74dc
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interp: Correct size handling for vi2x ops.
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2019-03-31 13:51:12 -07:00 |
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Unknown W. Brackets
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b75690787e
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interp: Correct swizzle on vx2i ops.
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2019-03-31 13:51:12 -07:00 |
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Unknown W. Brackets
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68cdcba6c5
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interp: Don't write lane 2 on single colorconv.
Not that it's valid to use the op with that size anyway.
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2019-03-31 13:51:12 -07:00 |
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Unknown W. Brackets
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5749ae09d0
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interp: Correct vmfvc register behavior.
The target and source registers were completely wrong.
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2019-03-31 13:41:48 -07:00 |
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Unknown W. Brackets
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b2e024025f
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interp: Handle wrong sizes of vf2h/vh2f.
Probably not ever used, but they have consistent behavior.
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2019-03-31 13:41:48 -07:00 |
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Unknown W. Brackets
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af3ed69144
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interp: Mask moves to vfpu ctrl.
These bits of the registers can't be written.
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2019-03-31 10:37:07 -07:00 |
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Unknown W. Brackets
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d40ac043d4
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interp: Handle prefixes for Vmmov/Vmmul/Vmscl.
I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
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2019-03-31 10:37:07 -07:00 |
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Unknown W. Brackets
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ec1dae57eb
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interp: Fix vbfy prefix handling.
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2019-03-31 10:09:18 -07:00 |
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Unknown W. Brackets
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d5273f589a
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interp: Mask value in vpfxd.
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
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2019-03-31 08:23:36 -07:00 |
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Unknown W. Brackets
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7dc775e54f
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IR: Use interp for unhandled prefix cases.
The interpreter is not changed yet, so in theory this shouldn't change
behavior.
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2019-03-31 08:17:11 -07:00 |
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Unknown W. Brackets
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4c3aa841d3
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IR: Correct vmmul optimizations.
It's a bit confusing since it's not D = S*T, but rather D = S'*T.
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2019-03-23 15:31:10 -07:00 |
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Unknown W. Brackets
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6178a1fb33
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Jit: Correct vocp prefix handling.
See #5549. Matches tests for various prefix settings.
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2019-02-23 09:15:26 -08:00 |
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Unknown W. Brackets
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d7f40afd9d
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interp: Correct vocp prefix handling.
Also, guess that vsocp also applies prefixes. See #5549.
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2019-02-21 19:02:16 -08:00 |
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Unknown W. Brackets
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419c1fbd73
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Jit: Respect flags for jit types and features.
Left some free space for more.
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2019-02-03 14:57:08 -08:00 |
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Unknown W. Brackets
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46649a218e
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Core: Add flags to disable jit features.
Not actually disabling yet, just setup.
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2019-02-03 13:58:24 -08:00 |
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Henrik Rydgård
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b4721fbc44
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Temporary workaround for another IR interpreter crash. See #10897
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2018-04-11 11:55:12 +02:00 |
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Henrik Rydgård
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3322adbc22
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IR Interpreter: Add some missing instruction metadata. May help part of #10897
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2018-04-11 11:16:41 +02:00 |
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