Unknown W. Brackets
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57123e8f9e
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irjit: Reserve some arrays that churn.
Improves IR compile time by around 20-30%.
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2023-08-20 08:59:47 -07:00 |
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Unknown W. Brackets
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159b41a0fa
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irjit: Fuse unaligned svl.q/svr.q together.
They're almost never used outside paired, which we can do on most
platforms easily.
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2023-08-13 18:10:40 -07:00 |
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Unknown W. Brackets
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2e6dbab5fa
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irjit: Add flag to prefer Vec4, use for add/sub.
This will improve things when using SIMD.
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2023-08-13 18:10:40 -07:00 |
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Unknown W. Brackets
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247788806a
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irjit: Add direct helper for start PC.
It's annoying always fetching length too.
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2023-08-12 09:37:02 -07:00 |
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Unknown W. Brackets
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3757ebca2d
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irjit: Invalidate/finalize target blocks.
Doesn't actually do anything yet, but adds plumbing.
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2023-08-12 09:37:02 -07:00 |
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Unknown W. Brackets
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f870271011
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riscv: Spill registers more intelligently.
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2023-07-30 14:24:12 -07:00 |
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Unknown W. Brackets
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8d60c10a64
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riscv: Use jit address offsets directly.
We'll have IR able to use block number or target offset.
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2023-07-29 19:02:15 -07:00 |
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Unknown W. Brackets
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3468423bb4
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Debugger: Handle missing crash/block ptrs better.
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2023-07-23 18:01:00 -07:00 |
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Unknown W. Brackets
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e4f9c72fe9
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riscv: Avoid unaligned mem combine in IR.
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2023-07-16 16:20:58 -07:00 |
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Unknown W. Brackets
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d4e689b096
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irjit: Allow IRInterpret() on partial block.
For later if we want to fallback from native to IR interpret.
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2023-07-16 16:19:53 -07:00 |
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Unknown W. Brackets
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46101581c0
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Core: Cleanup disasm buffer usage.
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2023-04-29 09:07:25 -07:00 |
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Unknown W. Brackets
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80e481bbdc
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Core: Show exception on misaligned jump.
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2022-08-21 14:49:34 -07:00 |
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Unknown W. Brackets
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25e18195ce
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irjit: Allow unaligned loads by default.
This was the original intention, was a mistake that this was flipped.
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2022-07-11 17:36:39 -07:00 |
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Unknown W. Brackets
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2479d52202
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Global: Reduce includes of common headers.
In many places, string, map, or Common.h were included but not needed.
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2022-01-30 16:35:33 -08:00 |
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Unknown W. Brackets
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cae0815095
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jit: Avoid using mips identifier directly.
Apparently this gets defined on mips systems.
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2021-02-26 07:24:58 -08:00 |
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Unknown W. Brackets
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f32f89dd90
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Global: Remove some unused variables.
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2021-02-15 11:59:45 -08:00 |
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Henrik Rydgård
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821817e6d4
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Move the profiler to Common
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2020-10-04 11:42:16 +02:00 |
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Unknown W. Brackets
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53d9c10b22
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irjit: Switch to XXH3.
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2020-08-27 20:40:55 -07:00 |
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Henrik Rydgård
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b43698a13d
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Remove most instances of base/logging.h from Common, Core, GPU, more
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2020-08-15 19:08:44 +02:00 |
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Unknown W. Brackets
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b8342fb8ec
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SaveState: Rename ChunkFile files to Serialize.
Makes more sense and less weird than ChunkFileDoMap, etc.
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2020-08-10 08:04:05 +00:00 |
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Unknown W. Brackets
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1dc5ee424b
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SaveState: Split out Do types to reduce headers.
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2020-08-10 08:03:44 +00:00 |
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Henrik Rydgård
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c5e0b799d9
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Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
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2020-07-19 20:33:25 +02:00 |
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Unknown W. Brackets
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3c34c7c456
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irjit: Add jump crash checks.
Doesn't seem to have any significant impact on performance.
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2020-07-12 22:17:36 -07:00 |
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Unknown W. Brackets
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46649a218e
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Core: Add flags to disable jit features.
Not actually disabling yet, just setup.
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2019-02-03 13:58:24 -08:00 |
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Unknown W. Brackets
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09e307b097
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arm64jit: Update rounding mode on thread switch.
Since fcr31 is per-thread, we must update jit state when it changes.
This also fixes the rounding mode on load state and jit/interp switch.
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2018-04-01 10:12:32 -07:00 |
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