PowerPC: Remove MSR macro.

Source/Core/Core/Boot/Boot.cpp

@@ -462,9 +462,9 @@ bool CBoot::Load_BS2(Core::System& system, const std::string& boot_rom_filename)
   PowerPC::ppcState.gpr[4] = 0x00002030;
   PowerPC::ppcState.gpr[5] = 0x0000009c;
 
-  MSR.FP = 1;
-  MSR.DR = 1;
-  MSR.IR = 1;
+  PowerPC::ppcState.msr.FP = 1;
+  PowerPC::ppcState.msr.DR = 1;
+  PowerPC::ppcState.msr.IR = 1;
 
   PowerPC::ppcState.spr[SPR_HID0] = 0x0011c464;
   PowerPC::ppcState.spr[SPR_IBAT3U] = 0xfff0001f;

Source/Core/Core/Boot/Boot_BS2Emu.cpp

@@ -67,10 +67,10 @@ void CBoot::RunFunction(u32 address)
 void CBoot::SetupMSR()
 {
   // 0x0002032
-  MSR.RI = 1;
-  MSR.DR = 1;
-  MSR.IR = 1;
-  MSR.FP = 1;
+  PowerPC::ppcState.msr.RI = 1;
+  PowerPC::ppcState.msr.DR = 1;
+  PowerPC::ppcState.msr.IR = 1;
+  PowerPC::ppcState.msr.FP = 1;
 }
 
 void CBoot::SetupHID(bool is_wii)

Source/Core/Core/CheatSearch.cpp

@@ -204,7 +204,7 @@ Cheats::NewSearch(const std::vector<Cheats::MemoryRange>& memory_ranges,
       return;
     }
 
-    if (address_space == PowerPC::RequestedAddressSpace::Virtual && !MSR.DR)
+    if (address_space == PowerPC::RequestedAddressSpace::Virtual && !PowerPC::ppcState.msr.DR)
     {
       error_code = Cheats::SearchErrorCode::VirtualAddressesCurrentlyNotAccessible;
       return;
@@ -263,7 +263,7 @@ Cheats::NextSearch(const std::vector<Cheats::SearchResult<T>>& previous_results,
       return;
     }
 
-    if (address_space == PowerPC::RequestedAddressSpace::Virtual && !MSR.DR)
+    if (address_space == PowerPC::RequestedAddressSpace::Virtual && !PowerPC::ppcState.msr.DR)
     {
       error_code = Cheats::SearchErrorCode::VirtualAddressesCurrentlyNotAccessible;
       return;

Source/Core/Core/FifoPlayer/FifoPlayer.cpp

@@ -632,7 +632,7 @@ void FifoPlayer::LoadMemory()
   UReg_MSR newMSR;
   newMSR.DR = 1;
   newMSR.IR = 1;
-  MSR.Hex = newMSR.Hex;
+  PowerPC::ppcState.msr.Hex = newMSR.Hex;
   PowerPC::ppcState.spr[SPR_IBAT0U] = 0x80001fff;
   PowerPC::ppcState.spr[SPR_IBAT0L] = 0x00000002;
   PowerPC::ppcState.spr[SPR_DBAT0U] = 0x80001fff;

Source/Core/Core/IOS/MIOS.cpp

@@ -78,7 +78,7 @@ bool Load()
 
   const PowerPC::CoreMode core_mode = PowerPC::GetMode();
   PowerPC::SetMode(PowerPC::CoreMode::Interpreter);
-  MSR.Hex = 0;
+  PowerPC::ppcState.msr.Hex = 0;
   PowerPC::ppcState.pc = 0x3400;
   NOTICE_LOG_FMT(IOS, "Loaded MIOS and bootstrapped PPC.");
 

Source/Core/Core/PatchEngine.cpp

@@ -277,7 +277,7 @@ static void ApplyMemoryPatches(std::span<const std::size_t> memory_patch_indices
 // We require at least 2 stack frames, if the stack is shallower than that then it won't work.
 static bool IsStackSane()
 {
-  DEBUG_ASSERT(MSR.DR && MSR.IR);
+  DEBUG_ASSERT(PowerPC::ppcState.msr.DR && PowerPC::ppcState.msr.IR);
 
   // Check the stack pointer
   u32 SP = GPR(1);
@@ -315,12 +315,12 @@ bool ApplyFramePatches()
   // callback hook we can end up catching the game in an exception vector.
   // We deal with this by returning false so that SystemTimers will reschedule us in a few cycles
   // where we can try again after the CPU hopefully returns back to the normal instruction flow.
-  if (!MSR.DR || !MSR.IR || !IsStackSane())
+  if (!PowerPC::ppcState.msr.DR || !PowerPC::ppcState.msr.IR || !IsStackSane())
   {
     DEBUG_LOG_FMT(ACTIONREPLAY,
                   "Need to retry later. CPU configuration is currently incorrect. PC = {:#010x}, "
                   "MSR = {:#010x}",
-                  PowerPC::ppcState.pc, MSR.Hex);
+                  PowerPC::ppcState.pc, PowerPC::ppcState.msr.Hex);
     return false;
   }
 

Source/Core/Core/PowerPC/CachedInterpreter/CachedInterpreter.cpp

@@ -164,7 +164,7 @@ static void WriteBrokenBlockNPC(UGeckoInstruction data)
 
 static bool CheckFPU(u32 data)
 {
-  if (!MSR.FP)
+  if (!PowerPC::ppcState.msr.FP)
   {
     PowerPC::ppcState.Exceptions |= EXCEPTION_FPU_UNAVAILABLE;
     PowerPC::CheckExceptions();

Source/Core/Core/PowerPC/GDBStub.cpp

@@ -432,7 +432,7 @@ static void ReadRegister()
       wbe32hex(reply, PowerPC::ppcState.pc);
       break;
     case 65:
-      wbe32hex(reply, MSR.Hex);
+      wbe32hex(reply, PowerPC::ppcState.msr.Hex);
       break;
     case 66:
       wbe32hex(reply, PowerPC::ppcState.cr.Get());
@@ -644,7 +644,7 @@ static void WriteRegister()
       PowerPC::ppcState.pc = re32hex(bufptr);
       break;
     case 65:
-      MSR.Hex = re32hex(bufptr);
+      PowerPC::ppcState.msr.Hex = re32hex(bufptr);
       break;
     case 66:
       PowerPC::ppcState.cr.Set(re32hex(bufptr));

Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp

@@ -132,8 +132,8 @@ static void Trace(const UGeckoInstruction& inst)
                 "INTER PC: {:08x} SRR0: {:08x} SRR1: {:08x} CRval: {:016x} "
                 "FPSCR: {:08x} MSR: {:08x} LR: {:08x} {} {:08x} {}",
                 PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.cr.fields[0],
-                PowerPC::ppcState.fpscr.Hex, MSR.Hex, PowerPC::ppcState.spr[8], regs, inst.hex,
-                ppc_inst);
+                PowerPC::ppcState.fpscr.Hex, PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8],
+                regs, inst.hex, ppc_inst);
 }
 
 bool Interpreter::HandleFunctionHooking(u32 address)
@@ -178,7 +178,7 @@ int Interpreter::SingleStepInner()
       GenerateProgramException(ProgramExceptionCause::IllegalInstruction);
       CheckExceptions();
     }
-    else if (MSR.FP)
+    else if (PowerPC::ppcState.msr.FP)
     {
       m_op_table[m_prev_inst.OPCD](m_prev_inst);
       if ((PowerPC::ppcState.Exceptions & EXCEPTION_DSI) != 0)

Source/Core/Core/PowerPC/Interpreter/Interpreter_Branch.cpp

@@ -100,7 +100,7 @@ void Interpreter::HLEFunction(UGeckoInstruction inst)
 
 void Interpreter::rfi(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -109,9 +109,9 @@ void Interpreter::rfi(UGeckoInstruction inst)
   // Restore saved bits from SRR1 to MSR.
   // Gecko/Broadway can save more bits than explicitly defined in ppc spec
   const u32 mask = 0x87C0FFFF;
-  MSR.Hex = (MSR.Hex & ~mask) | (SRR1 & mask);
+  PowerPC::ppcState.msr.Hex = (PowerPC::ppcState.msr.Hex & ~mask) | (SRR1 & mask);
   // MSR[13] is set to 0.
-  MSR.Hex &= 0xFFFBFFFF;
+  PowerPC::ppcState.msr.Hex &= 0xFFFBFFFF;
   // Here we should check if there are pending exceptions, and if their corresponding enable bits
   // are set
   // if above is true, we'd do:

Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h

@@ -27,7 +27,7 @@ enum class FPCC
 
 inline void CheckFPExceptions(UReg_FPSCR fpscr)
 {
-  if (fpscr.FEX && (MSR.FE0 || MSR.FE1))
+  if (fpscr.FEX && (PowerPC::ppcState.msr.FE0 || PowerPC::ppcState.msr.FE1))
     GenerateProgramException(ProgramExceptionCause::FloatingPoint);
 }
 

Source/Core/Core/PowerPC/Interpreter/Interpreter_LoadStore.cpp

@@ -254,7 +254,7 @@ void Interpreter::lmw(UGeckoInstruction inst)
 {
   u32 address = Helper_Get_EA(PowerPC::ppcState, inst);
 
-  if ((address & 0b11) != 0 || MSR.LE)
+  if ((address & 0b11) != 0 || PowerPC::ppcState.msr.LE)
   {
     GenerateAlignmentException(address);
     return;
@@ -282,7 +282,7 @@ void Interpreter::stmw(UGeckoInstruction inst)
 {
   u32 address = Helper_Get_EA(PowerPC::ppcState, inst);
 
-  if ((address & 0b11) != 0 || MSR.LE)
+  if ((address & 0b11) != 0 || PowerPC::ppcState.msr.LE)
   {
     GenerateAlignmentException(address);
     return;
@@ -453,7 +453,7 @@ void Interpreter::dcbf(UGeckoInstruction inst)
 
 void Interpreter::dcbi(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -678,7 +678,7 @@ void Interpreter::lswx(UGeckoInstruction inst)
 {
   u32 EA = Helper_Get_EA_X(PowerPC::ppcState, inst);
 
-  if (MSR.LE)
+  if (PowerPC::ppcState.msr.LE)
   {
     GenerateAlignmentException(EA);
     return;
@@ -858,7 +858,7 @@ void Interpreter::lswi(UGeckoInstruction inst)
   if (inst.RA != 0)
     EA = rGPR[inst.RA];
 
-  if (MSR.LE)
+  if (PowerPC::ppcState.msr.LE)
   {
     GenerateAlignmentException(EA);
     return;
@@ -905,7 +905,7 @@ void Interpreter::stswi(UGeckoInstruction inst)
   if (inst.RA != 0)
     EA = rGPR[inst.RA];
 
-  if (MSR.LE)
+  if (PowerPC::ppcState.msr.LE)
   {
     GenerateAlignmentException(EA);
     return;
@@ -943,7 +943,7 @@ void Interpreter::stswx(UGeckoInstruction inst)
 {
   u32 EA = Helper_Get_EA_X(PowerPC::ppcState, inst);
 
-  if (MSR.LE)
+  if (PowerPC::ppcState.msr.LE)
   {
     GenerateAlignmentException(EA);
     return;
@@ -1051,7 +1051,7 @@ void Interpreter::sync(UGeckoInstruction inst)
 
 void Interpreter::tlbie(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -1065,7 +1065,7 @@ void Interpreter::tlbie(UGeckoInstruction inst)
 
 void Interpreter::tlbsync(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
   }

Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp

@@ -128,18 +128,18 @@ void Interpreter::mtcrf(UGeckoInstruction inst)
 
 void Interpreter::mfmsr(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
   }
 
-  rGPR[inst.RD] = MSR.Hex;
+  rGPR[inst.RD] = PowerPC::ppcState.msr.Hex;
 }
 
 void Interpreter::mfsr(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -150,7 +150,7 @@ void Interpreter::mfsr(UGeckoInstruction inst)
 
 void Interpreter::mfsrin(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -162,13 +162,13 @@ void Interpreter::mfsrin(UGeckoInstruction inst)
 
 void Interpreter::mtmsr(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
   }
 
-  MSR.Hex = rGPR[inst.RS];
+  PowerPC::ppcState.msr.Hex = rGPR[inst.RS];
 
   // FE0/FE1 may have been set
   CheckFPExceptions(PowerPC::ppcState.fpscr);
@@ -181,7 +181,7 @@ void Interpreter::mtmsr(UGeckoInstruction inst)
 
 void Interpreter::mtsr(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -194,7 +194,7 @@ void Interpreter::mtsr(UGeckoInstruction inst)
 
 void Interpreter::mtsrin(UGeckoInstruction inst)
 {
-  if (MSR.PR)
+  if (PowerPC::ppcState.msr.PR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -217,8 +217,8 @@ void Interpreter::mfspr(UGeckoInstruction inst)
   const u32 index = ((inst.SPR & 0x1F) << 5) + ((inst.SPR >> 5) & 0x1F);
 
   // XER, LR, CTR, and timebase halves are the only ones available in user mode.
-  if (MSR.PR && index != SPR_XER && index != SPR_LR && index != SPR_CTR && index != SPR_TL &&
-      index != SPR_TU)
+  if (PowerPC::ppcState.msr.PR && index != SPR_XER && index != SPR_LR && index != SPR_CTR &&
+      index != SPR_TL && index != SPR_TU)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;
@@ -288,7 +288,7 @@ void Interpreter::mtspr(UGeckoInstruction inst)
   const u32 index = (inst.SPRU << 5) | (inst.SPRL & 0x1F);
 
   // XER, LR, and CTR are the only ones available to be written to in user mode
-  if (MSR.PR && index != SPR_XER && index != SPR_LR && index != SPR_CTR)
+  if (PowerPC::ppcState.msr.PR && index != SPR_XER && index != SPR_LR && index != SPR_CTR)
   {
     GenerateProgramException(ProgramExceptionCause::PrivilegedInstruction);
     return;

Source/Core/Core/PowerPC/Jit64/Jit.cpp

@@ -758,8 +758,8 @@ void Jit64::Trace()
   DEBUG_LOG_FMT(DYNA_REC,
                 "JIT64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} "
                 "MSR: {:08x} LR: {:08x} {} {}",
-                PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.fpscr.Hex, MSR.Hex,
-                PowerPC::ppcState.spr[8], regs, fregs);
+                PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.fpscr.Hex,
+                PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], regs, fregs);
 }
 
 void Jit64::Jit(u32 em_address)

Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp

@@ -320,7 +320,7 @@ void Jit64::dcbx(UGeckoInstruction inst)
   FixupBranch bat_lookup_failed;
   MOV(32, R(effective_address), R(addr));
   const u8* loop_start = GetCodePtr();
-  if (MSR.IR)
+  if (PowerPC::ppcState.msr.IR)
   {
     // Translate effective address to physical address.
     bat_lookup_failed = BATAddressLookup(addr, tmp, PowerPC::ibat_table.data());
@@ -349,7 +349,7 @@ void Jit64::dcbx(UGeckoInstruction inst)
 
   SwitchToFarCode();
   SetJumpTarget(invalidate_needed);
-  if (MSR.IR)
+  if (PowerPC::ppcState.msr.IR)
     SetJumpTarget(bat_lookup_failed);
 
   BitSet32 registersInUse = CallerSavedRegistersInUse();
@@ -422,7 +422,7 @@ void Jit64::dcbz(UGeckoInstruction inst)
     end_dcbz_hack = J_CC(CC_L);
   }
 
-  bool emit_fast_path = MSR.DR && m_jit.jo.fastmem_arena;
+  bool emit_fast_path = PowerPC::ppcState.msr.DR && m_jit.jo.fastmem_arena;
 
   if (emit_fast_path)
   {

Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp

@@ -23,7 +23,7 @@ void Jit64::psq_stXX(UGeckoInstruction inst)
   JITDISABLE(bJITLoadStorePairedOff);
 
   // For performance, the AsmCommon routines assume address translation is on.
-  FALLBACK_IF(!MSR.DR);
+  FALLBACK_IF(!PowerPC::ppcState.msr.DR);
 
   s32 offset = inst.SIMM_12;
   bool indexed = inst.OPCD == 4;
@@ -112,7 +112,7 @@ void Jit64::psq_lXX(UGeckoInstruction inst)
   JITDISABLE(bJITLoadStorePairedOff);
 
   // For performance, the AsmCommon routines assume address translation is on.
-  FALLBACK_IF(!MSR.DR);
+  FALLBACK_IF(!PowerPC::ppcState.msr.DR);
 
   s32 offset = inst.SIMM_12;
   bool indexed = inst.OPCD == 4;

Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp

@@ -367,7 +367,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg& opAddress,
   }
 
   FixupBranch exit;
-  const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR;
+  const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || PowerPC::ppcState.msr.DR;
   const bool fast_check_address = !slowmem && dr_set && m_jit.jo.fastmem_arena;
   if (fast_check_address)
   {
@@ -537,7 +537,7 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces
   }
 
   FixupBranch exit;
-  const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || MSR.DR;
+  const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || PowerPC::ppcState.msr.DR;
   const bool fast_check_address = !slowmem && dr_set && m_jit.jo.fastmem_arena;
   if (fast_check_address)
   {

Source/Core/Core/PowerPC/JitArm64/Jit.cpp

@@ -705,8 +705,8 @@ void JitArm64::Trace()
   DEBUG_LOG_FMT(DYNA_REC,
                 "JitArm64 PC: {:08x} SRR0: {:08x} SRR1: {:08x} FPSCR: {:08x} "
                 "MSR: {:08x} LR: {:08x} {} {}",
-                PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.fpscr.Hex, MSR.Hex,
-                PowerPC::ppcState.spr[8], regs, fregs);
+                PowerPC::ppcState.pc, SRR0, SRR1, PowerPC::ppcState.fpscr.Hex,
+                PowerPC::ppcState.msr.Hex, PowerPC::ppcState.spr[8], regs, fregs);
 }
 
 void JitArm64::Jit(u32 em_address)

Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp

@@ -731,7 +731,7 @@ void JitArm64::dcbx(UGeckoInstruction inst)
   // Translate effective address to physical address.
   const u8* loop_start = GetCodePtr();
   FixupBranch bat_lookup_failed;
-  if (MSR.IR)
+  if (PowerPC::ppcState.msr.IR)
   {
     bat_lookup_failed =
         BATAddressLookup(physical_addr, effective_addr, WA, PowerPC::ibat_table.data());
@@ -760,7 +760,7 @@ void JitArm64::dcbx(UGeckoInstruction inst)
 
   SwitchToFarCode();
   SetJumpTarget(invalidate_needed);
-  if (MSR.IR)
+  if (PowerPC::ppcState.msr.IR)
     SetJumpTarget(bat_lookup_failed);
 
   BitSet32 gprs_to_push = gpr.GetCallerSavedUsed();

Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp

@@ -23,7 +23,7 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
   JITDISABLE(bJITLoadStorePairedOff);
 
   // If we have a fastmem arena, the asm routines assume address translation is on.
-  FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem_arena && !MSR.DR);
+  FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem_arena && !PowerPC::ppcState.msr.DR);
 
   // X30 is LR
   // X0 is the address
@@ -148,7 +148,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
   JITDISABLE(bJITLoadStorePairedOff);
 
   // If we have a fastmem arena, the asm routines assume address translation is on.
-  FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem_arena && !MSR.DR);
+  FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem_arena && !PowerPC::ppcState.msr.DR);
 
   // X30 is LR
   // X0 contains the scale