Common/Assert: Switch to fmt

This commit is contained in:
Pokechu22
2022-01-09 12:43:11 -08:00
parent 1c0ca09e6f
commit 44e93e91d7
27 changed files with 234 additions and 237 deletions
File diff suppressed because it is too large Load Diff
+8 -8
View File
@@ -13,10 +13,10 @@
{ \
if (!(_a_)) \
{ \
if (!PanicYesNo("An error occurred.\n\n" _fmt_ "\n\n" \
" Condition: %s\n File: %s\n Line: %d\n Function: %s\n\n" \
"Ignore and continue?", \
##__VA_ARGS__, #_a_, __FILE__, __LINE__, __func__)) \
if (!PanicYesNoFmt("An error occurred.\n\n" _fmt_ "\n\n" \
" Condition: {}\n File: {}\n Line: {}\n Function: {}\n\n" \
"Ignore and continue?", \
##__VA_ARGS__, #_a_, __FILE__, __LINE__, __func__)) \
Crash(); \
} \
} while (0)
@@ -33,10 +33,10 @@
{ \
if (!(_a_)) \
{ \
if (!PanicYesNo("An error occurred.\n\n" \
" Condition: %s\n File: %s\n Line: %d\n Function: %s\n\n" \
"Ignore and continue?", \
#_a_, __FILE__, __LINE__, __func__)) \
if (!PanicYesNoFmt("An error occurred.\n\n" \
" Condition: {}\n File: {}\n Line: {}\n Function: {}\n\n" \
"Ignore and continue?", \
#_a_, __FILE__, __LINE__, __func__)) \
Crash(); \
} \
} while (0)
+4 -2
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@@ -25,6 +25,8 @@
#include <utility>
#include <vector>
#include <fmt/format.h>
#include "Common/Assert.h"
#include "Common/CommonTypes.h"
#include "Common/EnumMap.h"
@@ -332,8 +334,8 @@ private:
case MODE_VERIFY:
DEBUG_ASSERT_MSG(COMMON, !memcmp(data, *ptr, size),
"Savestate verification failure: buf %p != %p (size %u).\n", data, *ptr,
size);
"Savestate verification failure: buf {} != {} (size {}).\n", fmt::ptr(data),
fmt::ptr(*ptr), size);
break;
}
+1 -1
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@@ -80,7 +80,7 @@ bool SavePNG(const std::string& path, const u8* input, ImageByteFormat format, u
byte_per_pixel = 4;
break;
default:
ASSERT_MSG(FRAMEDUMP, false, "Invalid format %d", static_cast<int>(format));
ASSERT_MSG(FRAMEDUMP, false, "Invalid format {}", format);
return false;
}
+8 -9
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@@ -3,7 +3,6 @@
#include "Common/x64Emitter.h"
#include <cinttypes>
#include <cstring>
#include "Common/CPUDetect.h"
@@ -310,7 +309,7 @@ void OpArg::WriteRest(XEmitter* emit, int extraBytes, X64Reg _operandReg,
s64 distance = (s64)offset - (s64)ripAddr;
ASSERT_MSG(DYNA_REC,
(distance < 0x80000000LL && distance >= -0x80000000LL) || !warn_64bit_offset,
"WriteRest: op out of range (0x%" PRIx64 " uses 0x%" PRIx64 ")", ripAddr, offset);
"WriteRest: op out of range ({:#x} uses {:#x})", ripAddr, offset);
s32 offs = (s32)distance;
emit->Write32((u32)offs);
return;
@@ -440,7 +439,7 @@ void XEmitter::JMP(const u8* addr, bool force5Bytes)
{
s64 distance = (s64)(fn - ((u64)code + 2));
ASSERT_MSG(DYNA_REC, distance >= -0x80 && distance < 0x80,
"Jump target too far away, needs force5Bytes = true");
"Jump target too far away ({}), needs force5Bytes = true", distance);
// 8 bits will do
Write8(0xEB);
Write8((u8)(s8)distance);
@@ -450,7 +449,7 @@ void XEmitter::JMP(const u8* addr, bool force5Bytes)
s64 distance = (s64)(fn - ((u64)code + 5));
ASSERT_MSG(DYNA_REC, distance >= -0x80000000LL && distance < 0x80000000LL,
"Jump target too far away, needs indirect register");
"Jump target too far away ({}), needs indirect register", distance);
Write8(0xE9);
Write32((u32)(s32)distance);
}
@@ -489,7 +488,7 @@ void XEmitter::CALL(const void* fnptr)
{
u64 distance = u64(fnptr) - (u64(code) + 5);
ASSERT_MSG(DYNA_REC, distance < 0x0000000080000000ULL || distance >= 0xFFFFFFFF80000000ULL,
"CALL out of range (%p calls %p)", code, fnptr);
"CALL out of range ({} calls {})", fmt::ptr(code), fmt::ptr(fnptr));
Write8(0xE8);
Write32(u32(distance));
}
@@ -572,7 +571,7 @@ void XEmitter::J_CC(CCFlags conditionCode, const u8* addr)
{
distance = (s64)(fn - ((u64)code + 6));
ASSERT_MSG(DYNA_REC, distance >= -0x80000000LL && distance < 0x80000000LL,
"Jump target too far away, needs indirect register");
"Jump target too far away ({}), needs indirect register", distance);
Write8(0x0F);
Write8(0x80 + conditionCode);
Write32((u32)(s32)distance);
@@ -593,14 +592,14 @@ void XEmitter::SetJumpTarget(const FixupBranch& branch)
{
s64 distance = (s64)(code - branch.ptr);
ASSERT_MSG(DYNA_REC, distance >= -0x80 && distance < 0x80,
"Jump target too far away, needs force5Bytes = true");
"Jump target too far away ({}), needs force5Bytes = true", distance);
branch.ptr[-1] = (u8)(s8)distance;
}
else if (branch.type == FixupBranch::Type::Branch32Bit)
{
s64 distance = (s64)(code - branch.ptr);
ASSERT_MSG(DYNA_REC, distance >= -0x80000000LL && distance < 0x80000000LL,
"Jump target too far away, needs indirect register");
"Jump target too far away ({}), needs indirect register", distance);
s32 valid_distance = static_cast<s32>(distance);
std::memcpy(&branch.ptr[-4], &valid_distance, sizeof(s32));
@@ -1535,7 +1534,7 @@ void OpArg::WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& o
}
else
{
ASSERT_MSG(DYNA_REC, 0, "WriteNormalOp - Unhandled case %d %d", operand.scale, bits);
ASSERT_MSG(DYNA_REC, 0, "WriteNormalOp - Unhandled case {} {}", operand.scale, bits);
}
// pass extension in REG of ModRM
+3 -3
View File
@@ -108,9 +108,9 @@ EventType* RegisterEvent(const std::string& name, TimedCallback callback)
// check for existing type with same name.
// we want event type names to remain unique so that we can use them for serialization.
ASSERT_MSG(POWERPC, s_event_types.find(name) == s_event_types.end(),
"CoreTiming Event \"%s\" is already registered. Events should only be registered "
"CoreTiming Event \"{}\" is already registered. Events should only be registered "
"during Init to avoid breaking save states.",
name.c_str());
name);
auto info = s_event_types.emplace(name, EventType{callback, nullptr});
EventType* event_type = &info.first->second;
@@ -257,7 +257,7 @@ void ScheduleEvent(s64 cycles_into_future, EventType* event_type, u64 userdata,
{
from_cpu_thread = from == FromThread::CPU;
ASSERT_MSG(POWERPC, from_cpu_thread == Core::IsCPUThread(),
"A \"%s\" event was scheduled from the wrong thread (%s)", event_type->name->c_str(),
"A \"{}\" event was scheduled from the wrong thread ({})", *event_type->name,
from_cpu_thread ? "CPU" : "non-CPU");
}
+1 -1
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@@ -153,7 +153,7 @@ void DSPEmitter::FallBackToInterpreter(UDSPInstruction inst)
const auto interpreter_function = Interpreter::GetOp(inst);
m_gpr.PushRegs();
ASSERT_MSG(DSPLLE, interpreter_function != nullptr, "No function for %04x", inst);
ASSERT_MSG(DSPLLE, interpreter_function != nullptr, "No function for {:04x}", inst);
ABI_CallFunctionPC(FallbackThunk, &m_dsp_core.GetInterpreter(), inst);
m_gpr.PopRegs();
}
+43 -43
View File
@@ -298,21 +298,21 @@ void DSPJitRegCache::FlushRegs(DSPJitRegCache& cache, bool emit)
for (size_t i = 0; i < m_xregs.size(); i++)
{
ASSERT_MSG(DSPLLE, m_xregs[i].guest_reg == cache.m_xregs[i].guest_reg,
"cache and current xreg guest_reg mismatch for %zu", i);
"cache and current xreg guest_reg mismatch for {}", i);
}
for (size_t i = 0; i < m_regs.size(); i++)
{
ASSERT_MSG(DSPLLE, m_regs[i].loc.IsImm() == cache.m_regs[i].loc.IsImm(),
"cache and current reg loc mismatch for %zu", i);
"cache and current reg loc mismatch for {}", i);
ASSERT_MSG(DSPLLE, m_regs[i].loc.GetSimpleReg() == cache.m_regs[i].loc.GetSimpleReg(),
"cache and current reg loc mismatch for %zu", i);
"cache and current reg loc mismatch for {}", i);
ASSERT_MSG(DSPLLE, m_regs[i].dirty || !cache.m_regs[i].dirty,
"cache and current reg dirty mismatch for %zu", i);
"cache and current reg dirty mismatch for {}", i);
ASSERT_MSG(DSPLLE, m_regs[i].used == cache.m_regs[i].used,
"cache and current reg used mismatch for %zu", i);
"cache and current reg used mismatch for {}", i);
ASSERT_MSG(DSPLLE, m_regs[i].shift == cache.m_regs[i].shift,
"cache and current reg shift mismatch for %zu", i);
"cache and current reg shift mismatch for {}", i);
}
m_use_ctr = cache.m_use_ctr;
@@ -326,7 +326,7 @@ void DSPJitRegCache::FlushMemBackedRegs()
for (size_t i = 0; i < m_regs.size(); i++)
{
ASSERT_MSG(DSPLLE, !m_regs[i].used, "register %u still in use", static_cast<u32>(i));
ASSERT_MSG(DSPLLE, !m_regs[i].used, "register {} still in use", static_cast<u32>(i));
if (m_regs[i].used)
{
@@ -356,27 +356,27 @@ void DSPJitRegCache::FlushRegs()
MovToMemory(i);
}
ASSERT_MSG(DSPLLE, !m_regs[i].loc.IsSimpleReg(), "register %zu is still a simple reg", i);
ASSERT_MSG(DSPLLE, !m_regs[i].loc.IsSimpleReg(), "register {} is still a simple reg", i);
}
ASSERT_MSG(DSPLLE, m_xregs[RSP].guest_reg == DSP_REG_STATIC, "wrong xreg state for %d", RSP);
ASSERT_MSG(DSPLLE, m_xregs[RBX].guest_reg == DSP_REG_STATIC, "wrong xreg state for %d", RBX);
ASSERT_MSG(DSPLLE, m_xregs[RBP].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", RBP);
ASSERT_MSG(DSPLLE, m_xregs[RSI].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", RSI);
ASSERT_MSG(DSPLLE, m_xregs[RDI].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", RDI);
ASSERT_MSG(DSPLLE, m_xregs[RSP].guest_reg == DSP_REG_STATIC, "wrong xreg state for {}", RSP);
ASSERT_MSG(DSPLLE, m_xregs[RBX].guest_reg == DSP_REG_STATIC, "wrong xreg state for {}", RBX);
ASSERT_MSG(DSPLLE, m_xregs[RBP].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", RBP);
ASSERT_MSG(DSPLLE, m_xregs[RSI].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", RSI);
ASSERT_MSG(DSPLLE, m_xregs[RDI].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", RDI);
#ifdef STATIC_REG_ACCS
ASSERT_MSG(DSPLLE, m_xregs[R8].guest_reg == DSP_REG_STATIC, "wrong xreg state for %d", R8);
ASSERT_MSG(DSPLLE, m_xregs[R9].guest_reg == DSP_REG_STATIC, "wrong xreg state for %d", R9);
ASSERT_MSG(DSPLLE, m_xregs[R8].guest_reg == DSP_REG_STATIC, "wrong xreg state for {}", R8);
ASSERT_MSG(DSPLLE, m_xregs[R9].guest_reg == DSP_REG_STATIC, "wrong xreg state for {}", R9);
#else
ASSERT_MSG(DSPLLE, m_xregs[R8].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R8);
ASSERT_MSG(DSPLLE, m_xregs[R9].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R9);
ASSERT_MSG(DSPLLE, m_xregs[R8].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R8);
ASSERT_MSG(DSPLLE, m_xregs[R9].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R9);
#endif
ASSERT_MSG(DSPLLE, m_xregs[R10].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R10);
ASSERT_MSG(DSPLLE, m_xregs[R11].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R11);
ASSERT_MSG(DSPLLE, m_xregs[R12].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R12);
ASSERT_MSG(DSPLLE, m_xregs[R13].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R13);
ASSERT_MSG(DSPLLE, m_xregs[R14].guest_reg == DSP_REG_NONE, "wrong xreg state for %d", R14);
ASSERT_MSG(DSPLLE, m_xregs[R15].guest_reg == DSP_REG_STATIC, "wrong xreg state for %d", R15);
ASSERT_MSG(DSPLLE, m_xregs[R10].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R10);
ASSERT_MSG(DSPLLE, m_xregs[R11].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R11);
ASSERT_MSG(DSPLLE, m_xregs[R12].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R12);
ASSERT_MSG(DSPLLE, m_xregs[R13].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R13);
ASSERT_MSG(DSPLLE, m_xregs[R14].guest_reg == DSP_REG_NONE, "wrong xreg state for {}", R14);
ASSERT_MSG(DSPLLE, m_xregs[R15].guest_reg == DSP_REG_STATIC, "wrong xreg state for {}", R15);
m_use_ctr = 0;
}
@@ -403,7 +403,7 @@ void DSPJitRegCache::SaveRegs()
MovToMemory(i);
}
ASSERT_MSG(DSPLLE, !m_regs[i].loc.IsSimpleReg(), "register %zu is still a simple reg", i);
ASSERT_MSG(DSPLLE, !m_regs[i].loc.IsSimpleReg(), "register {} is still a simple reg", i);
}
}
@@ -418,7 +418,7 @@ void DSPJitRegCache::PushRegs()
MovToMemory(i);
}
ASSERT_MSG(DSPLLE, !m_regs[i].loc.IsSimpleReg(), "register %zu is still a simple reg", i);
ASSERT_MSG(DSPLLE, !m_regs[i].loc.IsSimpleReg(), "register {} is still a simple reg", i);
}
int push_count = 0;
@@ -445,7 +445,7 @@ void DSPJitRegCache::PushRegs()
ASSERT_MSG(DSPLLE,
m_xregs[i].guest_reg == DSP_REG_NONE || m_xregs[i].guest_reg == DSP_REG_STATIC,
"register %zu is still used", i);
"register {} is still used", i);
}
}
@@ -486,10 +486,10 @@ X64Reg DSPJitRegCache::MakeABICallSafe(X64Reg reg)
void DSPJitRegCache::MovToHostReg(size_t reg, X64Reg host_reg, bool load)
{
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name %zu", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register %zu is proxy for %d", reg,
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name {}", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register {} is proxy for {}", reg,
m_regs[reg].parentReg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "moving to host reg in use guest reg %zu", reg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "moving to host reg in use guest reg {}", reg);
X64Reg old_reg = m_regs[reg].loc.GetSimpleReg();
if (old_reg == host_reg)
{
@@ -529,10 +529,10 @@ void DSPJitRegCache::MovToHostReg(size_t reg, X64Reg host_reg, bool load)
void DSPJitRegCache::MovToHostReg(size_t reg, bool load)
{
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name %zu", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register %zu is proxy for %d", reg,
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name {}", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register {} is proxy for {}", reg,
m_regs[reg].parentReg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "moving to host reg in use guest reg %zu", reg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "moving to host reg in use guest reg {}", reg);
if (m_regs[reg].loc.IsSimpleReg())
{
@@ -559,11 +559,11 @@ void DSPJitRegCache::MovToHostReg(size_t reg, bool load)
void DSPJitRegCache::RotateHostReg(size_t reg, int shift, bool emit)
{
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name %zu", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register %zu is proxy for %d", reg,
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name {}", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register {} is proxy for {}", reg,
m_regs[reg].parentReg);
ASSERT_MSG(DSPLLE, m_regs[reg].loc.IsSimpleReg(), "register %zu is not a simple reg", reg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "rotating in use guest reg %zu", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].loc.IsSimpleReg(), "register {} is not a simple reg", reg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "rotating in use guest reg {}", reg);
if (shift > m_regs[reg].shift && emit)
{
@@ -600,10 +600,10 @@ void DSPJitRegCache::RotateHostReg(size_t reg, int shift, bool emit)
void DSPJitRegCache::MovToMemory(size_t reg)
{
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name %zu", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register %zu is proxy for %d", reg,
ASSERT_MSG(DSPLLE, reg < m_regs.size(), "bad register name {}", reg);
ASSERT_MSG(DSPLLE, m_regs[reg].parentReg == DSP_REG_NONE, "register {} is proxy for {}", reg,
m_regs[reg].parentReg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "moving to memory in use guest reg %zu", reg);
ASSERT_MSG(DSPLLE, !m_regs[reg].used, "moving to memory in use guest reg {}", reg);
if (m_regs[reg].used)
{
@@ -683,7 +683,7 @@ OpArg DSPJitRegCache::GetReg(int reg, bool load)
shift = 0;
}
ASSERT_MSG(DSPLLE, !m_regs[real_reg].used, "register %d already in use", real_reg);
ASSERT_MSG(DSPLLE, !m_regs[real_reg].used, "register {} already in use", real_reg);
if (m_regs[real_reg].used)
{
@@ -694,7 +694,7 @@ OpArg DSPJitRegCache::GetReg(int reg, bool load)
MovToHostReg(real_reg, load);
// TODO: actually handle INVALID_REG
ASSERT_MSG(DSPLLE, m_regs[real_reg].loc.IsSimpleReg(), "did not get host reg for %d", reg);
ASSERT_MSG(DSPLLE, m_regs[real_reg].loc.IsSimpleReg(), "did not get host reg for {}", reg);
RotateHostReg(real_reg, shift, load);
const OpArg oparg = m_regs[real_reg].loc;
@@ -962,7 +962,7 @@ void DSPJitRegCache::SpillXReg(X64Reg reg)
if (m_xregs[reg].guest_reg <= DSP_REG_MAX_MEM_BACKED)
{
ASSERT_MSG(DSPLLE, !m_regs[m_xregs[reg].guest_reg].used,
"to be spilled host reg %x(guest reg %zx) still in use!", reg,
"to be spilled host reg {:#x} (guest reg {:#x}) still in use!", reg,
m_xregs[reg].guest_reg);
MovToMemory(m_xregs[reg].guest_reg);
@@ -970,7 +970,7 @@ void DSPJitRegCache::SpillXReg(X64Reg reg)
else
{
ASSERT_MSG(DSPLLE, m_xregs[reg].guest_reg == DSP_REG_NONE,
"to be spilled host reg %x still in use!", reg);
"to be spilled host reg {:#x} still in use!", reg);
}
}
+2 -2
View File
@@ -123,7 +123,7 @@ void CEXIChannel::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
break;
default:
DEBUG_ASSERT_MSG(EXPANSIONINTERFACE, 0,
"EXI Imm: Unknown transfer type %i", m_control.RW);
"EXI Imm: Unknown transfer type {}", m_control.RW);
}
}
else
@@ -139,7 +139,7 @@ void CEXIChannel::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
break;
default:
DEBUG_ASSERT_MSG(EXPANSIONINTERFACE, 0,
"EXI DMA: Unknown transfer type %i", m_control.RW);
"EXI DMA: Unknown transfer type {}", m_control.RW);
}
}
@@ -110,7 +110,7 @@ CEXIMemoryCard::CEXIMemoryCard(const int index, bool gci_folder,
: m_card_index(index)
{
ASSERT_MSG(EXPANSIONINTERFACE, static_cast<std::size_t>(index) < s_et_cmd_done.size(),
"Trying to create invalid memory card index %d.", index);
"Trying to create invalid memory card index {}.", index);
// NOTE: When loading a save state, DMA completion callbacks (s_et_transfer_complete) and such
// may have been restored, we need to anticipate those arriving.
+1 -1
View File
@@ -683,7 +683,7 @@ std::optional<IPCReply> Kernel::HandleIPCCommand(const Request& request)
ret = device->IOCtlV(IOCtlVRequest{request.address});
break;
default:
ASSERT_MSG(IOS, false, "Unexpected command: %x", request.command);
ASSERT_MSG(IOS, false, "Unexpected command: {:#x}", request.command);
ret = IPCReply{IPC_EINVAL, 978_tbticks};
break;
}
+5 -4
View File
@@ -178,7 +178,7 @@ std::optional<IPCReply> BluetoothEmuDevice::IOCtlV(const IOCtlVRequest& request)
break;
}
default:
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown USB::IOCTLV_USBV0_BLKMSG: %x", ctrl.endpoint);
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown USB::IOCTLV_USBV0_BLKMSG: {:#x}", ctrl.endpoint);
}
break;
}
@@ -194,7 +194,7 @@ std::optional<IPCReply> BluetoothEmuDevice::IOCtlV(const IOCtlVRequest& request)
}
else
{
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown USB::IOCTLV_USBV0_INTRMSG: %x", ctrl.endpoint);
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown USB::IOCTLV_USBV0_INTRMSG: {:#x}", ctrl.endpoint);
}
break;
}
@@ -1085,8 +1085,9 @@ void BluetoothEmuDevice::ExecuteHCICommandMessage(const USB::V0CtrlMessage& ctrl
}
else
{
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown USB_IOCTL_CTRLMSG: 0x%04X (ocf: 0x%x ogf 0x%x)",
msg.Opcode, ocf, ogf);
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0,
"Unknown USB_IOCTL_CTRLMSG: {:#06x} (ocf: {:#04x} ogf {:#04x})", msg.Opcode,
ocf, ogf);
}
break;
}
@@ -610,7 +610,7 @@ void WiimoteDevice::ReceiveConfigurationReq(u8 ident, u8* data, u32 size)
break;
default:
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown Option: 0x%02x", options->type);
DEBUG_ASSERT_MSG(IOS_WIIMOTE, 0, "Unknown Option: {:#04x}", options->type);
break;
}
+1 -1
View File
@@ -56,7 +56,7 @@ V5IsoMessage::V5IsoMessage(Kernel& ios, const IOCtlVRequest& ioctlv)
total_packet_size += packet_size;
}
length = ioctlv.GetVector(2)->size;
ASSERT_MSG(IOS_USB, length == total_packet_size, "Wrong buffer size (0x%x != 0x%x)", length,
ASSERT_MSG(IOS_USB, length == total_packet_size, "Wrong buffer size ({:#x} != {:#x})", length,
total_packet_size);
}
} // namespace USB
+1 -1
View File
@@ -23,7 +23,7 @@ public:
Impl()
{
const int ret = libusb_init(&m_context);
ASSERT_MSG(IOS_USB, ret == LIBUSB_SUCCESS, "Failed to init libusb: %s", libusb_error_name(ret));
ASSERT_MSG(IOS_USB, ret == LIBUSB_SUCCESS, "Failed to init libusb: {}", libusb_error_name(ret));
if (ret != LIBUSB_SUCCESS)
return;
@@ -340,7 +340,7 @@ void Interpreter::unknown_instruction(UGeckoInstruction inst)
i + 1, rGPR[i + 1], i + 2, rGPR[i + 2], i + 3, rGPR[i + 3]);
}
ASSERT_MSG(POWERPC, 0,
"\nIntCPU: Unknown instruction %08x at PC = %08x last_PC = %08x LR = %08x\n",
"\nIntCPU: Unknown instruction {:08x} at PC = {:08x} last_PC = {:08x} LR = {:08x}\n",
inst.hex, PC, last_pc, LR);
}
@@ -341,7 +341,7 @@ void Interpreter::mtspr(UGeckoInstruction inst)
break;
case SPR_WPAR:
ASSERT_MSG(POWERPC, rGPR[inst.RD] == 0x0C008000, "Gather pipe @ %08x", PC);
ASSERT_MSG(POWERPC, rGPR[inst.RD] == 0x0C008000, "Gather pipe @ {:08x}", PC);
GPFifo::ResetGatherPipe();
break;
+1 -1
View File
@@ -1142,7 +1142,7 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
// it.
FixupBranch memException;
ASSERT_MSG(DYNA_REC, !(js.fastmemLoadStore && js.fixupExceptionHandler),
"Fastmem loadstores shouldn't have exception handler fixups (PC=%x)!",
"Fastmem loadstores shouldn't have exception handler fixups (PC={:x})!",
op.address);
if (!js.fastmemLoadStore && !js.fixupExceptionHandler)
{
@@ -15,13 +15,13 @@ FPURegCache::FPURegCache(Jit64& jit) : RegCache{jit}
void FPURegCache::StoreRegister(preg_t preg, const OpArg& new_loc)
{
ASSERT_MSG(DYNA_REC, m_regs[preg].IsBound(), "Unbound register - %zu", preg);
ASSERT_MSG(DYNA_REC, m_regs[preg].IsBound(), "Unbound register - {}", preg);
m_emitter->MOVAPD(new_loc, m_regs[preg].Location()->GetSimpleReg());
}
void FPURegCache::LoadRegister(preg_t preg, X64Reg new_loc)
{
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - %zu", preg);
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
m_emitter->MOVAPD(new_loc, m_regs[preg].Location().value());
}
@@ -15,13 +15,13 @@ GPRRegCache::GPRRegCache(Jit64& jit) : RegCache{jit}
void GPRRegCache::StoreRegister(preg_t preg, const OpArg& new_loc)
{
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - %zu", preg);
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
m_emitter->MOV(32, new_loc, m_regs[preg].Location().value());
}
void GPRRegCache::LoadRegister(preg_t preg, X64Reg new_loc)
{
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - %zu", preg);
ASSERT_MSG(DYNA_REC, !m_regs[preg].IsDiscarded(), "Discarded register - {}", preg);
m_emitter->MOV(32, ::Gen::R(new_loc), m_regs[preg].Location().value());
}

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