izzy/dolphin
0
0
Fork 0
mirror of https://github.com/izzy2lost/dolphin.git synced 2026-06-19 01:16:48 -07:00
Code Issues Packages Projects Releases Wiki Activity

Cleanup enum indentations.

Browse Source
This commit is contained in:
Lioncash
2014-02-09 16:16:10 -05:00
parent e59f770ccb
commit 40182a48a5
65 changed files with 1031 additions and 1026 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Source/Core/Common/SymbolDB.h
+6 -6
View File
@@ -56,12 +56,12 @@ struct Symbol
enum
{
FFLAG_TIMERINSTRUCTIONS=(1<<0),
FFLAG_LEAF=(1<<1),
FFLAG_ONLYCALLSNICELEAFS=(1<<2),
FFLAG_EVIL=(1<<3),
FFLAG_RFI=(1<<4),
FFLAG_STRAIGHT=(1<<5)
FFLAG_TIMERINSTRUCTIONS = (1<<0),
FFLAG_LEAF = (1<<1),
FFLAG_ONLYCALLSNICELEAFS = (1<<2),
FFLAG_EVIL = (1<<3),
FFLAG_RFI = (1<<4),
FFLAG_STRAIGHT = (1<<5)
};
Source/Core/Common/x64Emitter.h
+3 -3
View File
@@ -43,10 +43,10 @@ enum CCFlags
{
CC_O = 0,
CC_NO = 1,
CC_B = 2, CC_C = 2, CC_NAE = 2,
CC_NB = 3, CC_NC = 3, CC_AE = 3,
CC_B = 2, CC_C = 2, CC_NAE = 2,
CC_NB = 3, CC_NC = 3, CC_AE = 3,
CC_Z = 4, CC_E = 4,
CC_NZ = 5, CC_NE = 5,
CC_NZ = 5, CC_NE = 5,
CC_BE = 6, CC_NA = 6,
CC_NBE = 7, CC_A = 7,
CC_S = 8,
Source/Core/Core/Boot/Boot_DOL.h
+4 -4
View File
@@ -14,8 +14,8 @@ public:
CDolLoader(u8* _pBuffer, u32 _Size);
~CDolLoader();
bool IsWii() { return m_isWii; }
u32 GetEntryPoint() { return m_dolheader.entryPoint; }
bool IsWii() { return m_isWii; }
u32 GetEntryPoint() { return m_dolheader.entryPoint; }
// Load into emulated memory
void Load();
@@ -23,8 +23,8 @@ public:
private:
enum
{
DOL_NUM_TEXT = 7,
DOL_NUM_DATA = 11
DOL_NUM_TEXT = 7,
DOL_NUM_DATA = 11
};
struct SDolHeader
Source/Core/Core/Boot/ElfReader.h
+2 -2
View File
@@ -10,9 +10,9 @@
enum KnownElfTypes
{
KNOWNELF_PSP = 0,
KNOWNELF_DS = 1,
KNOWNELF_DS = 1,
KNOWNELF_GBA = 2,
KNOWNELF_GC = 3,
KNOWNELF_GC = 3,
};
typedef int SectionID;
Source/Core/Core/Boot/ElfTypes.h
+19 -19
View File
@@ -10,26 +10,26 @@
// File type
enum ElfType
{
ET_NONE =0,
ET_REL =1,
ET_EXEC =2,
ET_DYN =3,
ET_CORE =4,
ET_LOPROC =0xFF00,
ET_HIPROC =0xFFFF,
ET_NONE = 0,
ET_REL = 1,
ET_EXEC = 2,
ET_DYN = 3,
ET_CORE = 4,
ET_LOPROC = 0xFF00,
ET_HIPROC = 0xFFFF,
};
// Machine/Architecture
enum ElfMachine
{
EM_NONE =0,
EM_M32 =1,
EM_SPARC =2,
EM_386 =3,
EM_68K =4,
EM_88K =5,
EM_860 =7,
EM_MIPS =8
EM_NONE = 0,
EM_M32 = 1,
EM_SPARC = 2,
EM_386 = 3,
EM_68K = 4,
EM_88K = 5,
EM_860 = 7,
EM_MIPS = 8
};
// File version
@@ -101,10 +101,10 @@ enum ElfMachine
// Section flags
enum ElfSectionFlags
{
SHF_WRITE =0x1,
SHF_ALLOC =0x2,
SHF_EXECINSTR =0x4,
SHF_MASKPROC =0xF0000000,
SHF_WRITE = 0x1,
SHF_ALLOC = 0x2,
SHF_EXECINSTR = 0x4,
SHF_MASKPROC = 0xF0000000,
};
// Symbol binding
Source/Core/Core/DSP/DSPAnalyzer.h
+5 -5
View File
@@ -17,11 +17,11 @@ namespace DSPAnalyzer {
enum
{
CODE_START_OF_INST = 1,
CODE_IDLE_SKIP = 2,
CODE_LOOP_START = 4,
CODE_LOOP_END = 8,
CODE_UPDATE_SR = 16,
CODE_CHECK_INT = 32,
CODE_IDLE_SKIP = 2,
CODE_LOOP_START = 4,
CODE_LOOP_END = 8,
CODE_UPDATE_SR = 16,
CODE_CHECK_INT = 32,
};
// Easy to query array covering the whole of instruction memory.
Source/Core/Core/DSP/DSPTables.h
+28 -28
View File
@@ -20,37 +20,37 @@
enum partype_t
{
P_NONE = 0x0000,
P_VAL = 0x0001,
P_IMM = 0x0002,
P_MEM = 0x0003,
P_STR = 0x0004,
P_ADDR_I = 0x0005,
P_ADDR_D = 0x0006,
P_REG = 0x8000,
P_REG04 = P_REG | 0x0400, // IX
P_REG08 = P_REG | 0x0800,
P_REG18 = P_REG | 0x1800,
P_REGM18 = P_REG | 0x1810, // used in multiply instructions
P_REG19 = P_REG | 0x1900,
P_REGM19 = P_REG | 0x1910, // used in multiply instructions
P_REG1A = P_REG | 0x1a80,
P_REG1C = P_REG | 0x1c00,
// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value)
P_ACCL = P_REG | 0x1c00, // used for low part of accum
P_ACCM = P_REG | 0x1e00, // used for mid part of accum
P_NONE = 0x0000,
P_VAL = 0x0001,
P_IMM = 0x0002,
P_MEM = 0x0003,
P_STR = 0x0004,
P_ADDR_I = 0x0005,
P_ADDR_D = 0x0006,
P_REG = 0x8000,
P_REG04 = P_REG | 0x0400, // IX
P_REG08 = P_REG | 0x0800,
P_REG18 = P_REG | 0x1800,
P_REGM18 = P_REG | 0x1810, // used in multiply instructions
P_REG19 = P_REG | 0x1900,
P_REGM19 = P_REG | 0x1910, // used in multiply instructions
P_REG1A = P_REG | 0x1a80,
P_REG1C = P_REG | 0x1c00,
// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value)
P_ACCL = P_REG | 0x1c00, // used for low part of accum
P_ACCM = P_REG | 0x1e00, // used for mid part of accum
// The following are not in gcdsptool
P_ACCM_D = P_REG | 0x1e80,
P_ACC = P_REG | 0x2000, // used for full accum.
P_ACC_D = P_REG | 0x2080,
P_AX = P_REG | 0x2200,
P_REGS_MASK = 0x03f80, // gcdsptool's value = 0x01f80
P_REF = P_REG | 0x4000,
P_PRG = P_REF | P_REG,
P_ACCM_D = P_REG | 0x1e80,
P_ACC = P_REG | 0x2000, // used for full accum.
P_ACC_D = P_REG | 0x2080,
P_AX = P_REG | 0x2200,
P_REGS_MASK = 0x03f80, // gcdsptool's value = 0x01f80
P_REF = P_REG | 0x4000,
P_PRG = P_REF | P_REG,
// The following seem like junk:
// P_REG10 = P_REG | 0x1000,
// P_AX_D = P_REG | 0x2280,
// P_REG10 = P_REG | 0x1000,
// P_AX_D = P_REG | 0x2280,
};
#define OPTABLE_SIZE 0xffff + 1
Source/Core/Core/Debugger/Dump.h
+3 -3
View File
@@ -25,9 +25,9 @@ public:
private:
enum
{
OFFSET_GPR = 0x4,
OFFSET_PC = 0x194,
STRUCTUR_SIZE = 0x2BC
OFFSET_GPR = 0x4,
OFFSET_PC = 0x194,
STRUCTUR_SIZE = 0x2BC
};
u8 *m_pData;
Source/Core/Core/FifoPlayer/FifoDataFile.h
+3 -3
View File
@@ -17,10 +17,10 @@ struct MemoryUpdate
{
enum Type
{
TEXTURE_MAP = 0x01,
XF_DATA = 0x02,
TEXTURE_MAP = 0x01,
XF_DATA = 0x02,
VERTEX_STREAM = 0x04,
TMEM = 0x08,
TMEM = 0x08,
};
u32 fifoPosition;
Source/Core/Core/FifoPlayer/FifoFileStruct.h
+2 -2
View File
@@ -12,8 +12,8 @@ namespace FifoFileStruct
enum
{
FILE_ID = 0x0d01f1f0,
VERSION_NUMBER = 1,
FILE_ID = 0x0d01f1f0,
VERSION_NUMBER = 1,
MIN_LOADER_VERSION = 1,
};
Source/Core/Core/HW/AudioInterface.cpp
+4 -4
View File
@@ -69,10 +69,10 @@ namespace AudioInterface
// Internal hardware addresses
enum
{
AI_CONTROL_REGISTER = 0x6C00,
AI_VOLUME_REGISTER = 0x6C04,
AI_SAMPLE_COUNTER = 0x6C08,
AI_INTERRUPT_TIMING = 0x6C0C,
AI_CONTROL_REGISTER = 0x6C00,
AI_VOLUME_REGISTER = 0x6C04,
AI_SAMPLE_COUNTER = 0x6C08,
AI_INTERRUPT_TIMING = 0x6C0C,
};
enum
Source/Core/Core/HW/DSP.cpp
+20 -20
View File
@@ -42,26 +42,26 @@ namespace DSP
// register offsets
enum
{
DSP_MAIL_TO_DSP_HI = 0x5000,
DSP_MAIL_TO_DSP_LO = 0x5002,
DSP_MAIL_FROM_DSP_HI = 0x5004,
DSP_MAIL_FROM_DSP_LO = 0x5006,
DSP_CONTROL = 0x500A,
DSP_INTERRUPT_CONTROL = 0x5010,
AR_INFO = 0x5012, // These names are a good guess at best
AR_MODE = 0x5016, //
AR_REFRESH = 0x501a,
AR_DMA_MMADDR_H = 0x5020,
AR_DMA_MMADDR_L = 0x5022,
AR_DMA_ARADDR_H = 0x5024,
AR_DMA_ARADDR_L = 0x5026,
AR_DMA_CNT_H = 0x5028,
AR_DMA_CNT_L = 0x502A,
AUDIO_DMA_START_HI = 0x5030,
AUDIO_DMA_START_LO = 0x5032,
AUDIO_DMA_BLOCKS_LENGTH = 0x5034, // Ever used?
AUDIO_DMA_CONTROL_LEN = 0x5036,
AUDIO_DMA_BLOCKS_LEFT = 0x503A,
DSP_MAIL_TO_DSP_HI = 0x5000,
DSP_MAIL_TO_DSP_LO = 0x5002,
DSP_MAIL_FROM_DSP_HI = 0x5004,
DSP_MAIL_FROM_DSP_LO = 0x5006,
DSP_CONTROL = 0x500A,
DSP_INTERRUPT_CONTROL = 0x5010,
AR_INFO = 0x5012, // These names are a good guess at best
AR_MODE = 0x5016, //
AR_REFRESH = 0x501a,
AR_DMA_MMADDR_H = 0x5020,
AR_DMA_MMADDR_L = 0x5022,
AR_DMA_ARADDR_H = 0x5024,
AR_DMA_ARADDR_L = 0x5026,
AR_DMA_CNT_H = 0x5028,
AR_DMA_CNT_L = 0x502A,
AUDIO_DMA_START_HI = 0x5030,
AUDIO_DMA_START_LO = 0x5032,
AUDIO_DMA_BLOCKS_LENGTH = 0x5034, // Ever used?
AUDIO_DMA_CONTROL_LEN = 0x5036,
AUDIO_DMA_BLOCKS_LEFT = 0x503A,
};
// UARAMCount
Source/Core/Core/HW/DSP.h
+5 -5
View File
@@ -14,16 +14,16 @@ namespace DSP
enum DSPInterruptType
{
INT_DSP = 0,
INT_ARAM = 1,
INT_AID = 2
INT_DSP = 0,
INT_ARAM = 1,
INT_AID = 2
};
// aram size and mask
enum
{
ARAM_SIZE = 0x01000000, // 16 MB
ARAM_MASK = 0x00FFFFFF,
ARAM_SIZE = 0x01000000, // 16 MB
ARAM_MASK = 0x00FFFFFF,
};
void Init(bool hle);
Source/Core/Core/HW/DSPHLE/UCodes/UCode_AX.h
+48 -48
View File
@@ -21,33 +21,33 @@
// mixer_control value to an AXMixControl bitfield.
enum AXMixControl
{
MIX_L = 0x000001,
MIX_L_RAMP = 0x000002,
MIX_R = 0x000004,
MIX_R_RAMP = 0x000008,
MIX_S = 0x000010,
MIX_S_RAMP = 0x000020,
MIX_L = 0x000001,
MIX_L_RAMP = 0x000002,
MIX_R = 0x000004,
MIX_R_RAMP = 0x000008,
MIX_S = 0x000010,
MIX_S_RAMP = 0x000020,
MIX_AUXA_L = 0x000040,
MIX_AUXA_L_RAMP = 0x000080,
MIX_AUXA_R = 0x000100,
MIX_AUXA_R_RAMP = 0x000200,
MIX_AUXA_S = 0x000400,
MIX_AUXA_S_RAMP = 0x000800,
MIX_AUXA_L = 0x000040,
MIX_AUXA_L_RAMP = 0x000080,
MIX_AUXA_R = 0x000100,
MIX_AUXA_R_RAMP = 0x000200,
MIX_AUXA_S = 0x000400,
MIX_AUXA_S_RAMP = 0x000800,
MIX_AUXB_L = 0x001000,
MIX_AUXB_L_RAMP = 0x002000,
MIX_AUXB_R = 0x004000,
MIX_AUXB_R_RAMP = 0x008000,
MIX_AUXB_S = 0x010000,
MIX_AUXB_S_RAMP = 0x020000,
MIX_AUXB_L = 0x001000,
MIX_AUXB_L_RAMP = 0x002000,
MIX_AUXB_R = 0x004000,
MIX_AUXB_R_RAMP = 0x008000,
MIX_AUXB_S = 0x010000,
MIX_AUXB_S_RAMP = 0x020000,
MIX_AUXC_L = 0x040000,
MIX_AUXC_L_RAMP = 0x080000,
MIX_AUXC_R = 0x100000,
MIX_AUXC_R_RAMP = 0x200000,
MIX_AUXC_S = 0x400000,
MIX_AUXC_S_RAMP = 0x800000
MIX_AUXC_L = 0x040000,
MIX_AUXC_L_RAMP = 0x080000,
MIX_AUXC_R = 0x100000,
MIX_AUXC_R_RAMP = 0x200000,
MIX_AUXC_S = 0x400000,
MIX_AUXC_S_RAMP = 0x800000
};
class CUCode_AX : public IUCode
@@ -69,13 +69,13 @@ public:
protected:
enum MailType
{
MAIL_RESUME = 0xCDD10000,
MAIL_NEW_UCODE = 0xCDD10001,
MAIL_RESET = 0xCDD10002,
MAIL_CONTINUE = 0xCDD10003,
MAIL_RESUME = 0xCDD10000,
MAIL_NEW_UCODE = 0xCDD10001,
MAIL_RESET = 0xCDD10002,
MAIL_CONTINUE = 0xCDD10003,
// CPU sends 0xBABE0000 | cmdlist_size to the DSP
MAIL_CMDLIST = 0xBABE0000,
MAIL_CMDLIST = 0xBABE0000,
MAIL_CMDLIST_MASK = 0xFFFF0000
};
@@ -157,26 +157,26 @@ protected:
private:
enum CmdType
{
CMD_SETUP = 0x00,
CMD_DL_AND_VOL_MIX = 0x01,
CMD_PB_ADDR = 0x02,
CMD_PROCESS = 0x03,
CMD_MIX_AUXA = 0x04,
CMD_MIX_AUXB = 0x05,
CMD_UPLOAD_LRS = 0x06,
CMD_SET_LR = 0x07,
CMD_UNK_08 = 0x08,
CMD_MIX_AUXB_NOWRITE = 0x09,
CMD_SETUP = 0x00,
CMD_DL_AND_VOL_MIX = 0x01,
CMD_PB_ADDR = 0x02,
CMD_PROCESS = 0x03,
CMD_MIX_AUXA = 0x04,
CMD_MIX_AUXB = 0x05,
CMD_UPLOAD_LRS = 0x06,
CMD_SET_LR = 0x07,
CMD_UNK_08 = 0x08,
CMD_MIX_AUXB_NOWRITE = 0x09,
CMD_COMPRESSOR_TABLE_ADDR = 0x0A,
CMD_UNK_0B = 0x0B,
CMD_UNK_0C = 0x0C,
CMD_MORE = 0x0D,
CMD_OUTPUT = 0x0E,
CMD_END = 0x0F,
CMD_MIX_AUXB_LR = 0x10,
CMD_SET_OPPOSITE_LR = 0x11,
CMD_UNK_12 = 0x12,
CMD_SEND_AUX_AND_MIX = 0x13,
CMD_UNK_0B = 0x0B,
CMD_UNK_0C = 0x0C,
CMD_MORE = 0x0D,
CMD_OUTPUT = 0x0E,
CMD_END = 0x0F,
CMD_MIX_AUXB_LR = 0x10,
CMD_SET_OPPOSITE_LR = 0x11,
CMD_UNK_12 = 0x12,
CMD_SEND_AUX_AND_MIX = 0x13,
};
};
Source/Core/Core/HW/DSPHLE/UCodes/UCode_AXWii.h
+27 -27
View File
@@ -71,21 +71,21 @@ protected:
private:
enum CmdType
{
CMD_SETUP = 0x00,
CMD_ADD_TO_LR = 0x01,
CMD_SUB_TO_LR = 0x02,
CMD_ADD_SUB_TO_LR = 0x03,
CMD_PROCESS = 0x04,
CMD_MIX_AUXA = 0x05,
CMD_MIX_AUXB = 0x06,
CMD_MIX_AUXC = 0x07,
CMD_SETUP = 0x00,
CMD_ADD_TO_LR = 0x01,
CMD_SUB_TO_LR = 0x02,
CMD_ADD_SUB_TO_LR = 0x03,
CMD_PROCESS = 0x04,
CMD_MIX_AUXA = 0x05,
CMD_MIX_AUXB = 0x06,
CMD_MIX_AUXC = 0x07,
CMD_UPL_AUXA_MIX_LRSC = 0x08,
CMD_UPL_AUXB_MIX_LRSC = 0x09,
CMD_UNK_0A = 0x0A,
CMD_OUTPUT = 0x0B,
CMD_OUTPUT_DPL2 = 0x0C,
CMD_WM_OUTPUT = 0x0D,
CMD_END = 0x0E,
CMD_UNK_0A = 0x0A,
CMD_OUTPUT = 0x0B,
CMD_OUTPUT_DPL2 = 0x0C,
CMD_WM_OUTPUT = 0x0D,
CMD_END = 0x0E,
};
// A lot of these are similar to the new version, but there is an offset in
@@ -93,22 +93,22 @@ private:
// new AXWii).
enum CmdTypeOld
{
CMD_SETUP_OLD = 0x00,
CMD_ADD_TO_LR_OLD = 0x01,
CMD_SUB_TO_LR_OLD = 0x02,
CMD_ADD_SUB_TO_LR_OLD = 0x03,
CMD_PB_ADDR_OLD = 0x04,
CMD_PROCESS_OLD = 0x05,
CMD_MIX_AUXA_OLD = 0x06,
CMD_MIX_AUXB_OLD = 0x07,
CMD_MIX_AUXC_OLD = 0x08,
CMD_SETUP_OLD = 0x00,
CMD_ADD_TO_LR_OLD = 0x01,
CMD_SUB_TO_LR_OLD = 0x02,
CMD_ADD_SUB_TO_LR_OLD = 0x03,
CMD_PB_ADDR_OLD = 0x04,
CMD_PROCESS_OLD = 0x05,
CMD_MIX_AUXA_OLD = 0x06,
CMD_MIX_AUXB_OLD = 0x07,
CMD_MIX_AUXC_OLD = 0x08,
CMD_UPL_AUXA_MIX_LRSC_OLD = 0x09,
CMD_UPL_AUXB_MIX_LRSC_OLD = 0x0a,
CMD_UNK_0B_OLD = 0x0B,
CMD_OUTPUT_OLD = 0x0C, // no volume!
CMD_OUTPUT_DPL2_OLD = 0x0D,
CMD_WM_OUTPUT_OLD = 0x0E,
CMD_END_OLD = 0x0F
CMD_UNK_0B_OLD = 0x0B,
CMD_OUTPUT_OLD = 0x0C, // no volume!
CMD_OUTPUT_DPL2_OLD = 0x0D,
CMD_WM_OUTPUT_OLD = 0x0E,
CMD_END_OLD = 0x0F
};
};
Source/Core/Core/HW/DSPHLE/UCodes/UCodes.h
+6 -6
View File
@@ -100,12 +100,12 @@ protected:
enum EDSP_Codes
{
DSP_INIT = 0xDCD10000,
DSP_RESUME = 0xDCD10001,
DSP_YIELD = 0xDCD10002,
DSP_DONE = 0xDCD10003,
DSP_SYNC = 0xDCD10004,
DSP_FRAME_END = 0xDCD10005,
DSP_INIT = 0xDCD10000,
DSP_RESUME = 0xDCD10001,
DSP_YIELD = 0xDCD10002,
DSP_DONE = 0xDCD10003,
DSP_SYNC = 0xDCD10004,
DSP_FRAME_END = 0xDCD10005,
};
// UCode is forwarding mails to PrepareBootUCode
Source/Core/Core/HW/DVDInterface.cpp
+18 -18
View File
@@ -30,35 +30,35 @@ namespace DVDInterface
// internal hardware addresses
enum
{
DI_STATUS_REGISTER = 0x00,
DI_COVER_REGISTER = 0x04,
DI_COMMAND_0 = 0x08,
DI_COMMAND_1 = 0x0C,
DI_COMMAND_2 = 0x10,
DI_DMA_ADDRESS_REGISTER = 0x14,
DI_DMA_LENGTH_REGISTER = 0x18,
DI_DMA_CONTROL_REGISTER = 0x1C,
DI_IMMEDIATE_DATA_BUFFER = 0x20,
DI_CONFIG_REGISTER = 0x24
DI_STATUS_REGISTER = 0x00,
DI_COVER_REGISTER = 0x04,
DI_COMMAND_0 = 0x08,
DI_COMMAND_1 = 0x0C,
DI_COMMAND_2 = 0x10,
DI_DMA_ADDRESS_REGISTER = 0x14,
DI_DMA_LENGTH_REGISTER = 0x18,
DI_DMA_CONTROL_REGISTER = 0x1C,
DI_IMMEDIATE_DATA_BUFFER = 0x20,
DI_CONFIG_REGISTER = 0x24
};
// DVD IntteruptTypes
enum DI_InterruptType
{
INT_DEINT = 0,
INT_TCINT = 1,
INT_BRKINT = 2,
INT_CVRINT = 3,
INT_DEINT = 0,
INT_TCINT = 1,
INT_BRKINT = 2,
INT_CVRINT = 3,
};
// debug commands which may be ORd
enum
{
STOP_DRIVE = 0,
START_DRIVE = 0x100,
ACCEPT_COPY = 0x4000,
DISC_CHECK = 0x8000,
STOP_DRIVE = 0,
START_DRIVE = 0x100,
ACCEPT_COPY = 0x4000,
DISC_CHECK = 0x8000,
};
// DI Status Register
Source/Core/Core/HW/DVDInterface.h
+52 -52
View File
@@ -43,65 +43,65 @@ void Write32(const u32 _iValue, const u32 _iAddress);
// Not sure about endianness here. I'll just name them like this...
enum DIErrorLow
{
ERROR_READY = 0x00000000, // Ready.
ERROR_COVER_L = 0x01000000, // Cover is opened.
ERROR_CHANGE_DISK = 0x02000000, // Disk change.
ERROR_NO_DISK = 0x03000000, // No Disk.
ERROR_MOTOR_STOP_L = 0x04000000, // Motor stop.
ERROR_NO_DISKID_L = 0x05000000 // Disk ID not read.
ERROR_READY = 0x00000000, // Ready.
ERROR_COVER_L = 0x01000000, // Cover is opened.
ERROR_CHANGE_DISK = 0x02000000, // Disk change.
ERROR_NO_DISK = 0x03000000, // No Disk.
ERROR_MOTOR_STOP_L = 0x04000000, // Motor stop.
ERROR_NO_DISKID_L = 0x05000000 // Disk ID not read.
};
enum DIErrorHigh
{
ERROR_NONE = 0x000000, // No error.
ERROR_MOTOR_STOP_H = 0x020400, // Motor stopped.
ERROR_NO_DISKID_H = 0x020401, // Disk ID not read.
ERROR_COVER_H = 0x023a00, // Medium not present / Cover opened.
ERROR_SEEK_NDONE = 0x030200, // No Seek complete.
ERROR_READ = 0x031100, // UnRecoverd read error.
ERROR_PROTOCOL = 0x040800, // Transfer protocol error.
ERROR_INV_CMD = 0x052000, // Invalid command operation code.
ERROR_AUDIO_BUF = 0x052001, // Audio Buffer not set.
ERROR_BLOCK_OOB = 0x052100, // Logical block address out of bounds.
ERROR_INV_FIELD = 0x052400, // Invalid Field in command packet.
ERROR_INV_AUDIO = 0x052401, // Invalid audio command.
ERROR_INV_PERIOD = 0x052402, // Configuration out of permitted period.
ERROR_END_USR_AREA = 0x056300, // End of user area encountered on this track.
ERROR_MEDIUM = 0x062800, // Medium may have changed.
ERROR_MEDIUM_REQ = 0x0b5a01 // Operator medium removal request.
ERROR_NONE = 0x000000, // No error.
ERROR_MOTOR_STOP_H = 0x020400, // Motor stopped.
ERROR_NO_DISKID_H = 0x020401, // Disk ID not read.
ERROR_COVER_H = 0x023a00, // Medium not present / Cover opened.
ERROR_SEEK_NDONE = 0x030200, // No Seek complete.
ERROR_READ = 0x031100, // UnRecoverd read error.
ERROR_PROTOCOL = 0x040800, // Transfer protocol error.
ERROR_INV_CMD = 0x052000, // Invalid command operation code.
ERROR_AUDIO_BUF = 0x052001, // Audio Buffer not set.
ERROR_BLOCK_OOB = 0x052100, // Logical block address out of bounds.
ERROR_INV_FIELD = 0x052400, // Invalid Field in command packet.
ERROR_INV_AUDIO = 0x052401, // Invalid audio command.
ERROR_INV_PERIOD = 0x052402, // Configuration out of permitted period.
ERROR_END_USR_AREA = 0x056300, // End of user area encountered on this track.
ERROR_MEDIUM = 0x062800, // Medium may have changed.
ERROR_MEDIUM_REQ = 0x0b5a01 // Operator medium removal request.
};
enum DICommand
{
DVDLowInquiry = 0x12,
DVDLowReadDiskID = 0x70,
DVDLowRead = 0x71,
DVDLowWaitForCoverClose = 0x79,
DVDLowGetCoverReg = 0x7a, // DVDLowPrepareCoverRegister?
DVDLowNotifyReset = 0x7e,
DVDLowReadDvdPhysical = 0x80,
DVDLowReadDvdCopyright = 0x81,
DVDLowReadDvdDiscKey = 0x82,
DVDLowClearCoverInterrupt = 0x86,
DVDLowGetCoverStatus = 0x88,
DVDLowReset = 0x8a,
DVDLowOpenPartition = 0x8b,
DVDLowClosePartition = 0x8c,
DVDLowUnencryptedRead = 0x8d,
DVDLowEnableDvdVideo = 0x8e,
DVDLowReportKey = 0xa4,
DVDLowSeek = 0xab,
DVDLowReadDvd = 0xd0,
DVDLowReadDvdConfig = 0xd1,
DVDLowStopLaser = 0xd2,
DVDLowOffset = 0xd9,
DVDLowReadDiskBca = 0xda,
DVDLowRequestDiscStatus = 0xdb,
DVDLowRequestRetryNumber = 0xdc,
DVDLowSetMaximumRotation = 0xdd,
DVDLowSerMeasControl = 0xdf,
DVDLowRequestError = 0xe0,
DVDLowStopMotor = 0xe3,
DVDLowAudioBufferConfig = 0xe4
DVDLowInquiry = 0x12,
DVDLowReadDiskID = 0x70,
DVDLowRead = 0x71,
DVDLowWaitForCoverClose = 0x79,
DVDLowGetCoverReg = 0x7a, // DVDLowPrepareCoverRegister?
DVDLowNotifyReset = 0x7e,
DVDLowReadDvdPhysical = 0x80,
DVDLowReadDvdCopyright = 0x81,
DVDLowReadDvdDiscKey = 0x82,
DVDLowClearCoverInterrupt = 0x86,
DVDLowGetCoverStatus = 0x88,
DVDLowReset = 0x8a,
DVDLowOpenPartition = 0x8b,
DVDLowClosePartition = 0x8c,
DVDLowUnencryptedRead = 0x8d,
DVDLowEnableDvdVideo = 0x8e,
DVDLowReportKey = 0xa4,
DVDLowSeek = 0xab,
DVDLowReadDvd = 0xd0,
DVDLowReadDvdConfig = 0xd1,
DVDLowStopLaser = 0xd2,
DVDLowOffset = 0xd9,
DVDLowReadDiskBca = 0xda,
DVDLowRequestDiscStatus = 0xdb,
DVDLowRequestRetryNumber = 0xdc,
DVDLowSetMaximumRotation = 0xdd,
DVDLowSerMeasControl = 0xdf,
DVDLowRequestError = 0xe0,
DVDLowStopMotor = 0xe3,
DVDLowAudioBufferConfig = 0xe4
};
} // end of namespace DVDInterface
Source/Core/Core/HW/EXI_Channel.h
+5 -5
View File
@@ -16,11 +16,11 @@ private:
enum
{
EXI_STATUS = 0,
EXI_DMAADDR = 1,
EXI_DMALENGTH = 2,
EXI_DMACONTROL = 3,
EXI_IMMDATA = 4
EXI_STATUS = 0,
EXI_DMAADDR = 1,
EXI_DMALENGTH = 2,
EXI_DMACONTROL = 3,
EXI_IMMDATA = 4
};
const char* Debug_GetRegisterName(u32 _register)
{
Source/Core/Core/HW/EXI_DeviceAD16.h
+3 -3
View File
@@ -16,9 +16,9 @@ public:
private:
enum
{
init = 0x00,
write = 0xa0,
read = 0xa2
init = 0x00,
write = 0xa0,
read = 0xa2
};
union UAD16Reg

Some files were not shown because too many files have changed in this diff Show More