mirror of
https://github.com/izzy2lost/dolphin.git
synced 2026-06-19 01:16:48 -07:00
Remove the UDSP union
functions are passed by value rather than by reference This is part of a bigger change so please report if it broke compile git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5228 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
@@ -91,12 +91,12 @@ void AnalyzeRange(int start_addr, int end_addr)
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}
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code_flags[addr] |= CODE_START_OF_INST;
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// Look for loops. (this is not used atm)
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if ((inst.hex & 0xffe0) == 0x0060 || (inst.hex & 0xff00) == 0x1100) {
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if ((inst & 0xffe0) == 0x0060 || (inst & 0xff00) == 0x1100) {
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// BLOOP, BLOOPI
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u16 loop_end = dsp_imem_read(addr + 1);
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code_flags[addr] |= CODE_LOOP_START;
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code_flags[loop_end] |= CODE_LOOP_END;
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} else if ((inst.hex & 0xffe0) == 0x0040 || (inst.hex & 0xff00) == 0x1000) {
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} else if ((inst & 0xffe0) == 0x0040 || (inst & 0xff00) == 0x1000) {
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// LOOP, LOOPI
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code_flags[addr] |= CODE_LOOP_START;
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code_flags[addr + 1] |= CODE_LOOP_END;
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@@ -54,22 +54,22 @@ inline bool IsSameMemArea(u16 a, u16 b)
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// DR $arR
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// xxxx xxxx 0000 01rr
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// Decrement addressing register $arR.
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void dr(const UDSPInstruction& opc) {
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writeToBackLog(0, opc.hex & 0x3, dsp_decrement_addr_reg(opc.hex & 0x3));
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void dr(const UDSPInstruction opc) {
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writeToBackLog(0, opc & 0x3, dsp_decrement_addr_reg(opc & 0x3));
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}
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// IR $arR
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// xxxx xxxx 0000 10rr
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// Increment addressing register $arR.
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void ir(const UDSPInstruction& opc) {
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writeToBackLog(0, opc.hex & 0x3, dsp_increment_addr_reg(opc.hex & 0x3));
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void ir(const UDSPInstruction opc) {
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writeToBackLog(0, opc & 0x3, dsp_increment_addr_reg(opc & 0x3));
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}
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// NR $arR
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// xxxx xxxx 0000 11rr
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// Add corresponding indexing register $ixR to addressing register $arR.
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void nr(const UDSPInstruction& opc) {
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u8 reg = opc.hex & 0x3;
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void nr(const UDSPInstruction opc) {
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u8 reg = opc & 0x3;
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writeToBackLog(0, reg, dsp_increase_addr_reg(reg, (s16)g_dsp.r[DSP_REG_IX0 + reg]));
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}
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@@ -77,10 +77,10 @@ void nr(const UDSPInstruction& opc) {
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// MV $axD.D, $acS.S
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// xxxx xxxx 0001 ddss
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// Move value of $acS.S to the $axD.D.
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void mv(const UDSPInstruction& opc)
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void mv(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x3) + DSP_REG_ACL0;
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u8 dreg = ((opc.hex >> 2) & 0x3);
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u8 sreg = (opc & 0x3) + DSP_REG_ACL0;
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u8 dreg = ((opc >> 2) & 0x3);
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#if 0 //more tests
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if ((sreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
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@@ -94,10 +94,10 @@ void mv(const UDSPInstruction& opc)
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// xxxx xxxx 001s s0dd
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// Store value of $acS.S in the memory pointed by register $arD.
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// Post increment register $arD.
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void s(const UDSPInstruction& opc)
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void s(const UDSPInstruction opc)
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{
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u8 dreg = opc.hex & 0x3;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACL0;
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u8 dreg = opc & 0x3;
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u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0;
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_increment_addr_reg(dreg));
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@@ -107,10 +107,10 @@ void s(const UDSPInstruction& opc)
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// xxxx xxxx 001s s1dd
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// Store value of register $acS.S in the memory pointed by register $arD.
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// Add indexing register $ixD to register $arD.
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void sn(const UDSPInstruction& opc)
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void sn(const UDSPInstruction opc)
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{
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u8 dreg = opc.hex & 0x3;
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u8 sreg = ((opc.hex >> 3) & 0x3) + DSP_REG_ACL0;
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u8 dreg = opc & 0x3;
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u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0;
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dsp_dmem_write(g_dsp.r[dreg], g_dsp.r[sreg]);
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writeToBackLog(0, dreg, dsp_increase_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + dreg]));
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@@ -120,10 +120,10 @@ void sn(const UDSPInstruction& opc)
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// xxxx xxxx 01dd d0ss
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// Load $axD.D/$acD.D with value from memory pointed by register $arS.
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// Post increment register $arS.
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void l(const UDSPInstruction& opc)
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void l(const UDSPInstruction opc)
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{
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u8 sreg = opc.hex & 0x3;
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u8 dreg = ((opc.hex >> 3) & 0x7) + DSP_REG_AXL0;
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u8 sreg = opc & 0x3;
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u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
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if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
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{
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@@ -144,10 +144,10 @@ void l(const UDSPInstruction& opc)
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// xxxx xxxx 01dd d0ss
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// Load $axD.D/$acD.D with value from memory pointed by register $arS.
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// Add indexing register register $ixS to register $arS.
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void ln(const UDSPInstruction& opc)
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void ln(const UDSPInstruction opc)
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{
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u8 sreg = opc.hex & 0x3;
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u8 dreg = ((opc.hex >> 3) & 0x7) + DSP_REG_AXL0;
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u8 sreg = opc & 0x3;
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u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
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if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
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{
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@@ -169,10 +169,10 @@ void ln(const UDSPInstruction& opc)
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Increment both $ar0 and $ar3.
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void ls(const UDSPInstruction& opc)
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void ls(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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@@ -188,10 +188,10 @@ void ls(const UDSPInstruction& opc)
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix0 to addressing
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// register $ar0 and increment $ar3.
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void lsn(const UDSPInstruction& opc)
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void lsn(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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@@ -206,10 +206,10 @@ void lsn(const UDSPInstruction& opc)
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix3 to addressing
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// register $ar3 and increment $ar0.
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void lsm(const UDSPInstruction& opc)
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void lsm(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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@@ -225,10 +225,10 @@ void lsm(const UDSPInstruction& opc)
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// register $ar3. Add corresponding indexing register $ix0 to addressing
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// register $ar0 and add corresponding indexing register $ix3 to addressing
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// register $ar3.
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void lsnm(const UDSPInstruction& opc)
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void lsnm(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR3], g_dsp.r[sreg]);
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@@ -242,10 +242,10 @@ void lsnm(const UDSPInstruction& opc)
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Increment both $ar0 and $ar3.
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void sl(const UDSPInstruction& opc)
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void sl(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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@@ -260,10 +260,10 @@ void sl(const UDSPInstruction& opc)
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix0 to addressing register $ar0
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// and increment $ar3.
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void sln(const UDSPInstruction& opc)
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void sln(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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@@ -278,10 +278,10 @@ void sln(const UDSPInstruction& opc)
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix3 to addressing register $ar3
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// and increment $ar0.
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void slm(const UDSPInstruction& opc)
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void slm(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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@@ -296,10 +296,10 @@ void slm(const UDSPInstruction& opc)
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix0 to addressing register $ar0
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// and add corresponding indexing register $ix3 to addressing register $ar3.
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void slnm(const UDSPInstruction& opc)
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void slnm(const UDSPInstruction opc)
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{
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u8 sreg = (opc.hex & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc.hex >> 4) & 0x3) + DSP_REG_AXL0;
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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dsp_dmem_write(g_dsp.r[DSP_REG_AR0], g_dsp.r[sreg]);
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@@ -317,11 +317,11 @@ void slnm(const UDSPInstruction& opc)
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// then the value pointed by AR0 is loaded to BOTH AX0.H and AX0.L.
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// If AR0 points into an invalid memory page (ie 0x2000), then AX0.H keeps its old value. (not implemented yet)
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// If AR3 points into an invalid memory page, then AX0.L gets the same value as AX0.H. (not implemented yet)
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void ld(const UDSPInstruction& opc)
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void ld(const UDSPInstruction opc)
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{
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u8 dreg = (opc.hex >> 5) & 0x1;
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u8 rreg = (opc.hex >> 4) & 0x1;
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u8 sreg = opc.hex & 0x3;
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u8 dreg = (opc >> 5) & 0x1;
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u8 rreg = (opc >> 4) & 0x1;
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u8 sreg = opc & 0x3;
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if (sreg != DSP_REG_AR3) {
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writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r[sreg]));
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@@ -348,11 +348,11 @@ void ld(const UDSPInstruction& opc)
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// LDN $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 01ss
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void ldn(const UDSPInstruction& opc)
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void ldn(const UDSPInstruction opc)
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{
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u8 dreg = (opc.hex >> 5) & 0x1;
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u8 rreg = (opc.hex >> 4) & 0x1;
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u8 sreg = opc.hex & 0x3;
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u8 dreg = (opc >> 5) & 0x1;
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u8 rreg = (opc >> 4) & 0x1;
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u8 sreg = opc & 0x3;
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if (sreg != DSP_REG_AR3) {
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writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r[sreg]));
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@@ -379,11 +379,11 @@ void ldn(const UDSPInstruction& opc)
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// LDM $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 10ss
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void ldm(const UDSPInstruction& opc)
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void ldm(const UDSPInstruction opc)
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{
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u8 dreg = (opc.hex >> 5) & 0x1;
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u8 rreg = (opc.hex >> 4) & 0x1;
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u8 sreg = opc.hex & 0x3;
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u8 dreg = (opc >> 5) & 0x1;
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u8 rreg = (opc >> 4) & 0x1;
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u8 sreg = opc & 0x3;
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if (sreg != DSP_REG_AR3) {
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writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r[sreg]));
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@@ -411,11 +411,11 @@ void ldm(const UDSPInstruction& opc)
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// LDNM $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 11ss
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void ldnm(const UDSPInstruction& opc)
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void ldnm(const UDSPInstruction opc)
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{
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u8 dreg = (opc.hex >> 5) & 0x1;
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u8 rreg = (opc.hex >> 4) & 0x1;
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u8 sreg = opc.hex & 0x3;
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u8 dreg = (opc >> 5) & 0x1;
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u8 rreg = (opc >> 4) & 0x1;
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u8 sreg = opc & 0x3;
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if (sreg != DSP_REG_AR3) {
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writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, dsp_dmem_read(g_dsp.r[sreg]));
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@@ -442,7 +442,7 @@ void ldnm(const UDSPInstruction& opc)
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}
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void nop(const UDSPInstruction& opc)
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void nop(const UDSPInstruction opc)
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{
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}
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@@ -36,27 +36,27 @@ namespace DSPInterpreter
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{
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namespace Ext
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{
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void l(const UDSPInstruction& opc);
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void ln(const UDSPInstruction& opc);
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void ls(const UDSPInstruction& opc);
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void lsn(const UDSPInstruction& opc);
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void lsm(const UDSPInstruction& opc);
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void lsnm(const UDSPInstruction& opc);
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void sl(const UDSPInstruction& opc);
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void sln(const UDSPInstruction& opc);
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void slm(const UDSPInstruction& opc);
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void slnm(const UDSPInstruction& opc);
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void s(const UDSPInstruction& opc);
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void sn(const UDSPInstruction& opc);
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void ld(const UDSPInstruction& opc);
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void ldn(const UDSPInstruction& opc);
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void ldm(const UDSPInstruction& opc);
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void ldnm(const UDSPInstruction& opc);
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void mv(const UDSPInstruction& opc);
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void dr(const UDSPInstruction& opc);
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void ir(const UDSPInstruction& opc);
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void nr(const UDSPInstruction& opc);
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void nop(const UDSPInstruction& opc);
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void l(const UDSPInstruction opc);
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void ln(const UDSPInstruction opc);
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void ls(const UDSPInstruction opc);
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void lsn(const UDSPInstruction opc);
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void lsm(const UDSPInstruction opc);
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void lsnm(const UDSPInstruction opc);
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void sl(const UDSPInstruction opc);
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void sln(const UDSPInstruction opc);
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void slm(const UDSPInstruction opc);
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void slnm(const UDSPInstruction opc);
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void s(const UDSPInstruction opc);
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void sn(const UDSPInstruction opc);
|
||||
void ld(const UDSPInstruction opc);
|
||||
void ldn(const UDSPInstruction opc);
|
||||
void ldm(const UDSPInstruction opc);
|
||||
void ldnm(const UDSPInstruction opc);
|
||||
void mv(const UDSPInstruction opc);
|
||||
void dr(const UDSPInstruction opc);
|
||||
void ir(const UDSPInstruction opc);
|
||||
void nr(const UDSPInstruction opc);
|
||||
void nop(const UDSPInstruction opc);
|
||||
|
||||
} // end namespace Ext
|
||||
} // end namespace DSPinterpeter
|
||||
|
||||
@@ -42,128 +42,128 @@ void WriteCR(u16 val);
|
||||
u16 ReadCR();
|
||||
|
||||
|
||||
typedef void (*DSPInterpreterFunc)(const UDSPInstruction& opc);
|
||||
typedef void (*DSPInterpreterFunc)(const UDSPInstruction opc);
|
||||
|
||||
// All the opcode functions.
|
||||
void unknown(const UDSPInstruction& opc);
|
||||
void call(const UDSPInstruction& opc);
|
||||
void callr(const UDSPInstruction& opc);
|
||||
void ifcc(const UDSPInstruction& opc);
|
||||
void jcc(const UDSPInstruction& opc);
|
||||
void jmprcc(const UDSPInstruction& opc);
|
||||
void ret(const UDSPInstruction& opc);
|
||||
void halt(const UDSPInstruction& opc);
|
||||
void loop(const UDSPInstruction& opc);
|
||||
void loopi(const UDSPInstruction& opc);
|
||||
void bloop(const UDSPInstruction& opc);
|
||||
void bloopi(const UDSPInstruction& opc);
|
||||
void mrr(const UDSPInstruction& opc);
|
||||
void lrr(const UDSPInstruction& opc);
|
||||
void lrrd(const UDSPInstruction& opc);
|
||||
void lrri(const UDSPInstruction& opc);
|
||||
void lrrn(const UDSPInstruction& opc);
|
||||
void srr(const UDSPInstruction& opc);
|
||||
void srrd(const UDSPInstruction& opc);
|
||||
void srri(const UDSPInstruction& opc);
|
||||
void srrn(const UDSPInstruction& opc);
|
||||
void lri(const UDSPInstruction& opc);
|
||||
void lris(const UDSPInstruction& opc);
|
||||
void lr(const UDSPInstruction& opc);
|
||||
void sr(const UDSPInstruction& opc);
|
||||
void si(const UDSPInstruction& opc);
|
||||
void tstaxh(const UDSPInstruction& opc);
|
||||
void clr(const UDSPInstruction& opc);
|
||||
void clrl(const UDSPInstruction& opc);
|
||||
void clrp(const UDSPInstruction& opc);
|
||||
void mulc(const UDSPInstruction& opc);
|
||||
void cmpar(const UDSPInstruction& opc);
|
||||
void cmp(const UDSPInstruction& opc);
|
||||
void tst(const UDSPInstruction& opc);
|
||||
void addaxl(const UDSPInstruction& opc);
|
||||
void addarn(const UDSPInstruction& opc);
|
||||
void mulcac(const UDSPInstruction& opc);
|
||||
void movr(const UDSPInstruction& opc);
|
||||
void movax(const UDSPInstruction& opc);
|
||||
void xorr(const UDSPInstruction& opc);
|
||||
void andr(const UDSPInstruction& opc);
|
||||
void orr(const UDSPInstruction& opc);
|
||||
void andc(const UDSPInstruction& opc);
|
||||
void orc(const UDSPInstruction& opc);
|
||||
void xorc(const UDSPInstruction& opc);
|
||||
void notc(const UDSPInstruction& opc);
|
||||
void lsrnrx(const UDSPInstruction& opc);
|
||||
void asrnrx(const UDSPInstruction& opc);
|
||||
void lsrnr(const UDSPInstruction& opc);
|
||||
void asrnr(const UDSPInstruction& opc);
|
||||
void add(const UDSPInstruction& opc);
|
||||
void addp(const UDSPInstruction& opc);
|
||||
void cmpis(const UDSPInstruction& opc);
|
||||
void addpaxz(const UDSPInstruction& opc);
|
||||
void movpz(const UDSPInstruction& opc);
|
||||
void decm(const UDSPInstruction& opc);
|
||||
void dec(const UDSPInstruction& opc);
|
||||
void inc(const UDSPInstruction& opc);
|
||||
void incm(const UDSPInstruction& opc);
|
||||
void neg(const UDSPInstruction& opc);
|
||||
void addax(const UDSPInstruction& opc);
|
||||
void addr(const UDSPInstruction& opc);
|
||||
void subr(const UDSPInstruction& opc);
|
||||
void subp(const UDSPInstruction& opc);
|
||||
void subax(const UDSPInstruction& opc);
|
||||
void addis(const UDSPInstruction& opc);
|
||||
void addi(const UDSPInstruction& opc);
|
||||
void lsl16(const UDSPInstruction& opc);
|
||||
void madd(const UDSPInstruction& opc);
|
||||
void msub(const UDSPInstruction& opc);
|
||||
void lsr16(const UDSPInstruction& opc);
|
||||
void asr16(const UDSPInstruction& opc);
|
||||
void lsl(const UDSPInstruction& opc);
|
||||
void lsr(const UDSPInstruction& opc);
|
||||
void asl(const UDSPInstruction& opc);
|
||||
void asr(const UDSPInstruction& opc);
|
||||
void lsrn(const UDSPInstruction& opc);
|
||||
void asrn(const UDSPInstruction& opc);
|
||||
void dar(const UDSPInstruction& opc);
|
||||
void iar(const UDSPInstruction& opc);
|
||||
void subarn(const UDSPInstruction& opc);
|
||||
void sbclr(const UDSPInstruction& opc);
|
||||
void sbset(const UDSPInstruction& opc);
|
||||
void mov(const UDSPInstruction& opc);
|
||||
void movp(const UDSPInstruction& opc);
|
||||
void mul(const UDSPInstruction& opc);
|
||||
void mulac(const UDSPInstruction& opc);
|
||||
void mulmv(const UDSPInstruction& opc);
|
||||
void mulmvz(const UDSPInstruction& opc);
|
||||
void mulx(const UDSPInstruction& opc);
|
||||
void mulxac(const UDSPInstruction& opc);
|
||||
void mulxmv(const UDSPInstruction& opc);
|
||||
void mulxmvz(const UDSPInstruction& opc);
|
||||
void mulcmvz(const UDSPInstruction& opc);
|
||||
void mulcmv(const UDSPInstruction& opc);
|
||||
void movnp(const UDSPInstruction& opc);
|
||||
void sub(const UDSPInstruction& opc);
|
||||
void maddx(const UDSPInstruction& opc);
|
||||
void msubx(const UDSPInstruction& opc);
|
||||
void maddc(const UDSPInstruction& opc);
|
||||
void msubc(const UDSPInstruction& opc);
|
||||
void srs(const UDSPInstruction& opc);
|
||||
void lrs(const UDSPInstruction& opc);
|
||||
void nx(const UDSPInstruction& opc);
|
||||
void cmpi(const UDSPInstruction& opc);
|
||||
void rti(const UDSPInstruction& opc);
|
||||
void ilrr(const UDSPInstruction& opc);
|
||||
void ilrrd(const UDSPInstruction& opc);
|
||||
void ilrri(const UDSPInstruction& opc);
|
||||
void ilrrn(const UDSPInstruction& opc);
|
||||
void andcf(const UDSPInstruction& opc);
|
||||
void andf(const UDSPInstruction& opc);
|
||||
void xori(const UDSPInstruction& opc);
|
||||
void andi(const UDSPInstruction& opc);
|
||||
void ori(const UDSPInstruction& opc);
|
||||
void srbith(const UDSPInstruction& opc);
|
||||
void mulaxh(const UDSPInstruction& opc);
|
||||
void tstprod(const UDSPInstruction& opc);
|
||||
void abs(const UDSPInstruction& opc);
|
||||
void unknown(const UDSPInstruction opc);
|
||||
void call(const UDSPInstruction opc);
|
||||
void callr(const UDSPInstruction opc);
|
||||
void ifcc(const UDSPInstruction opc);
|
||||
void jcc(const UDSPInstruction opc);
|
||||
void jmprcc(const UDSPInstruction opc);
|
||||
void ret(const UDSPInstruction opc);
|
||||
void halt(const UDSPInstruction opc);
|
||||
void loop(const UDSPInstruction opc);
|
||||
void loopi(const UDSPInstruction opc);
|
||||
void bloop(const UDSPInstruction opc);
|
||||
void bloopi(const UDSPInstruction opc);
|
||||
void mrr(const UDSPInstruction opc);
|
||||
void lrr(const UDSPInstruction opc);
|
||||
void lrrd(const UDSPInstruction opc);
|
||||
void lrri(const UDSPInstruction opc);
|
||||
void lrrn(const UDSPInstruction opc);
|
||||
void srr(const UDSPInstruction opc);
|
||||
void srrd(const UDSPInstruction opc);
|
||||
void srri(const UDSPInstruction opc);
|
||||
void srrn(const UDSPInstruction opc);
|
||||
void lri(const UDSPInstruction opc);
|
||||
void lris(const UDSPInstruction opc);
|
||||
void lr(const UDSPInstruction opc);
|
||||
void sr(const UDSPInstruction opc);
|
||||
void si(const UDSPInstruction opc);
|
||||
void tstaxh(const UDSPInstruction opc);
|
||||
void clr(const UDSPInstruction opc);
|
||||
void clrl(const UDSPInstruction opc);
|
||||
void clrp(const UDSPInstruction opc);
|
||||
void mulc(const UDSPInstruction opc);
|
||||
void cmpar(const UDSPInstruction opc);
|
||||
void cmp(const UDSPInstruction opc);
|
||||
void tst(const UDSPInstruction opc);
|
||||
void addaxl(const UDSPInstruction opc);
|
||||
void addarn(const UDSPInstruction opc);
|
||||
void mulcac(const UDSPInstruction opc);
|
||||
void movr(const UDSPInstruction opc);
|
||||
void movax(const UDSPInstruction opc);
|
||||
void xorr(const UDSPInstruction opc);
|
||||
void andr(const UDSPInstruction opc);
|
||||
void orr(const UDSPInstruction opc);
|
||||
void andc(const UDSPInstruction opc);
|
||||
void orc(const UDSPInstruction opc);
|
||||
void xorc(const UDSPInstruction opc);
|
||||
void notc(const UDSPInstruction opc);
|
||||
void lsrnrx(const UDSPInstruction opc);
|
||||
void asrnrx(const UDSPInstruction opc);
|
||||
void lsrnr(const UDSPInstruction opc);
|
||||
void asrnr(const UDSPInstruction opc);
|
||||
void add(const UDSPInstruction opc);
|
||||
void addp(const UDSPInstruction opc);
|
||||
void cmpis(const UDSPInstruction opc);
|
||||
void addpaxz(const UDSPInstruction opc);
|
||||
void movpz(const UDSPInstruction opc);
|
||||
void decm(const UDSPInstruction opc);
|
||||
void dec(const UDSPInstruction opc);
|
||||
void inc(const UDSPInstruction opc);
|
||||
void incm(const UDSPInstruction opc);
|
||||
void neg(const UDSPInstruction opc);
|
||||
void addax(const UDSPInstruction opc);
|
||||
void addr(const UDSPInstruction opc);
|
||||
void subr(const UDSPInstruction opc);
|
||||
void subp(const UDSPInstruction opc);
|
||||
void subax(const UDSPInstruction opc);
|
||||
void addis(const UDSPInstruction opc);
|
||||
void addi(const UDSPInstruction opc);
|
||||
void lsl16(const UDSPInstruction opc);
|
||||
void madd(const UDSPInstruction opc);
|
||||
void msub(const UDSPInstruction opc);
|
||||
void lsr16(const UDSPInstruction opc);
|
||||
void asr16(const UDSPInstruction opc);
|
||||
void lsl(const UDSPInstruction opc);
|
||||
void lsr(const UDSPInstruction opc);
|
||||
void asl(const UDSPInstruction opc);
|
||||
void asr(const UDSPInstruction opc);
|
||||
void lsrn(const UDSPInstruction opc);
|
||||
void asrn(const UDSPInstruction opc);
|
||||
void dar(const UDSPInstruction opc);
|
||||
void iar(const UDSPInstruction opc);
|
||||
void subarn(const UDSPInstruction opc);
|
||||
void sbclr(const UDSPInstruction opc);
|
||||
void sbset(const UDSPInstruction opc);
|
||||
void mov(const UDSPInstruction opc);
|
||||
void movp(const UDSPInstruction opc);
|
||||
void mul(const UDSPInstruction opc);
|
||||
void mulac(const UDSPInstruction opc);
|
||||
void mulmv(const UDSPInstruction opc);
|
||||
void mulmvz(const UDSPInstruction opc);
|
||||
void mulx(const UDSPInstruction opc);
|
||||
void mulxac(const UDSPInstruction opc);
|
||||
void mulxmv(const UDSPInstruction opc);
|
||||
void mulxmvz(const UDSPInstruction opc);
|
||||
void mulcmvz(const UDSPInstruction opc);
|
||||
void mulcmv(const UDSPInstruction opc);
|
||||
void movnp(const UDSPInstruction opc);
|
||||
void sub(const UDSPInstruction opc);
|
||||
void maddx(const UDSPInstruction opc);
|
||||
void msubx(const UDSPInstruction opc);
|
||||
void maddc(const UDSPInstruction opc);
|
||||
void msubc(const UDSPInstruction opc);
|
||||
void srs(const UDSPInstruction opc);
|
||||
void lrs(const UDSPInstruction opc);
|
||||
void nx(const UDSPInstruction opc);
|
||||
void cmpi(const UDSPInstruction opc);
|
||||
void rti(const UDSPInstruction opc);
|
||||
void ilrr(const UDSPInstruction opc);
|
||||
void ilrrd(const UDSPInstruction opc);
|
||||
void ilrri(const UDSPInstruction opc);
|
||||
void ilrrn(const UDSPInstruction opc);
|
||||
void andcf(const UDSPInstruction opc);
|
||||
void andf(const UDSPInstruction opc);
|
||||
void xori(const UDSPInstruction opc);
|
||||
void andi(const UDSPInstruction opc);
|
||||
void ori(const UDSPInstruction opc);
|
||||
void srbith(const UDSPInstruction opc);
|
||||
void mulaxh(const UDSPInstruction opc);
|
||||
void tstprod(const UDSPInstruction opc);
|
||||
void abs(const UDSPInstruction opc);
|
||||
|
||||
} // namespace
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -67,7 +67,8 @@ enum partype_t
|
||||
#define OPTABLE_SIZE 0xffff + 1
|
||||
#define EXT_OPTABLE_SIZE 0xff + 1
|
||||
|
||||
union UDSPInstruction
|
||||
typedef u16 UDSPInstruction;
|
||||
/*/union UDSPInstruction
|
||||
{
|
||||
u16 hex;
|
||||
|
||||
@@ -88,9 +89,9 @@ union UDSPInstruction
|
||||
};
|
||||
|
||||
// TODO: Figure out more instruction structures (add structs here)
|
||||
};
|
||||
};*/
|
||||
|
||||
typedef void (*dspInstFunc)(const UDSPInstruction&);
|
||||
typedef void (*dspInstFunc)(const UDSPInstruction);
|
||||
|
||||
struct param2_t
|
||||
{
|
||||
@@ -114,6 +115,7 @@ typedef struct
|
||||
u8 param_count;
|
||||
param2_t params[8];
|
||||
bool extended;
|
||||
bool branch;
|
||||
} DSPOPCTemplate;
|
||||
|
||||
typedef DSPOPCTemplate opc_t;
|
||||
@@ -155,16 +157,16 @@ void applyWriteBackLog();
|
||||
void zeroWriteBackLog();
|
||||
void zeroWriteBackLogPreserveAcc(u8 acc);
|
||||
|
||||
inline void ExecuteInstruction(const UDSPInstruction& inst)
|
||||
inline void ExecuteInstruction(const UDSPInstruction inst)
|
||||
{
|
||||
if (opTableUseExt[inst.hex]) {
|
||||
if ((inst.hex >> 12) == 0x3)
|
||||
extOpTable[inst.hex & 0x7F](inst);
|
||||
if (opTableUseExt[inst]) {
|
||||
if ((inst >> 12) == 0x3)
|
||||
extOpTable[inst & 0x7F](inst);
|
||||
else
|
||||
extOpTable[inst.hex & 0xFF](inst);
|
||||
extOpTable[inst & 0xFF](inst);
|
||||
}
|
||||
opTable[inst.hex](inst);
|
||||
if (opTableUseExt[inst.hex]) {
|
||||
opTable[inst](inst);
|
||||
if (opTableUseExt[inst]) {
|
||||
applyWriteBackLog();
|
||||
}
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -34,11 +34,11 @@ namespace DSPInterpreter {
|
||||
// Call function if condition cc has been met. Push program counter of
|
||||
// instruction following "call" to $st0. Set program counter to address
|
||||
// represented by value that follows this "call" instruction.
|
||||
void call(const UDSPInstruction& opc)
|
||||
void call(const UDSPInstruction opc)
|
||||
{
|
||||
// must be outside the if.
|
||||
u16 dest = dsp_fetch_code();
|
||||
if (CheckCondition(opc.hex & 0xf))
|
||||
if (CheckCondition(opc & 0xf))
|
||||
{
|
||||
dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
|
||||
g_dsp.pc = dest;
|
||||
@@ -51,11 +51,11 @@ void call(const UDSPInstruction& opc)
|
||||
// Call function if condition cc has been met. Push program counter of
|
||||
// instruction following "call" to call stack $st0. Set program counter to
|
||||
// register $R.
|
||||
void callr(const UDSPInstruction& opc)
|
||||
void callr(const UDSPInstruction opc)
|
||||
{
|
||||
if (CheckCondition(opc.hex & 0xf))
|
||||
if (CheckCondition(opc & 0xf))
|
||||
{
|
||||
u8 reg = (opc.hex >> 5) & 0x7;
|
||||
u8 reg = (opc >> 5) & 0x7;
|
||||
u16 addr = dsp_op_read_reg(reg);
|
||||
dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
|
||||
g_dsp.pc = addr;
|
||||
@@ -66,9 +66,9 @@ void callr(const UDSPInstruction& opc)
|
||||
// IFcc
|
||||
// 0000 0010 0111 cccc
|
||||
// Execute following opcode if the condition has been met.
|
||||
void ifcc(const UDSPInstruction& opc)
|
||||
void ifcc(const UDSPInstruction opc)
|
||||
{
|
||||
if (!CheckCondition(opc.hex & 0xf))
|
||||
if (!CheckCondition(opc & 0xf))
|
||||
{
|
||||
// skip the next opcode - we have to lookup its size.
|
||||
g_dsp.pc += opSize[dsp_peek_code()];
|
||||
@@ -81,10 +81,10 @@ void ifcc(const UDSPInstruction& opc)
|
||||
// aaaa aaaa aaaa aaaa
|
||||
// Jump to addressA if condition cc has been met. Set program counter to
|
||||
// address represented by value that follows this "jmp" instruction.
|
||||
void jcc(const UDSPInstruction& opc)
|
||||
void jcc(const UDSPInstruction opc)
|
||||
{
|
||||
u16 dest = dsp_fetch_code();
|
||||
if (CheckCondition(opc.hex & 0xf))
|
||||
if (CheckCondition(opc & 0xf))
|
||||
{
|
||||
g_dsp.pc = dest;
|
||||
}
|
||||
@@ -94,11 +94,11 @@ void jcc(const UDSPInstruction& opc)
|
||||
// JMPcc $R
|
||||
// 0001 0111 rrr0 cccc
|
||||
// Jump to address; set program counter to a value from register $R.
|
||||
void jmprcc(const UDSPInstruction& opc)
|
||||
void jmprcc(const UDSPInstruction opc)
|
||||
{
|
||||
if (CheckCondition(opc.hex & 0xf))
|
||||
if (CheckCondition(opc & 0xf))
|
||||
{
|
||||
u8 reg = (opc.hex >> 5) & 0x7;
|
||||
u8 reg = (opc >> 5) & 0x7;
|
||||
g_dsp.pc = dsp_op_read_reg(reg);
|
||||
}
|
||||
}
|
||||
@@ -108,9 +108,9 @@ void jmprcc(const UDSPInstruction& opc)
|
||||
// 0000 0010 1101 cccc
|
||||
// Return from subroutine if condition cc has been met. Pops stored PC
|
||||
// from call stack $st0 and sets $pc to this location.
|
||||
void ret(const UDSPInstruction& opc)
|
||||
void ret(const UDSPInstruction opc)
|
||||
{
|
||||
if (CheckCondition(opc.hex & 0xf))
|
||||
if (CheckCondition(opc & 0xf))
|
||||
{
|
||||
g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
|
||||
}
|
||||
@@ -121,7 +121,7 @@ void ret(const UDSPInstruction& opc)
|
||||
// Return from exception. Pops stored status register $sr from data stack
|
||||
// $st1 and program counter PC from call stack $st0 and sets $pc to this
|
||||
// location.
|
||||
void rti(const UDSPInstruction& opc)
|
||||
void rti(const UDSPInstruction opc)
|
||||
{
|
||||
g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
|
||||
g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
|
||||
@@ -132,7 +132,7 @@ void rti(const UDSPInstruction& opc)
|
||||
// HALT
|
||||
// 0000 0000 0020 0001
|
||||
// Stops execution of DSP code. Sets bit DSP_CR_HALT in register DREG_CR.
|
||||
void halt(const UDSPInstruction& opc)
|
||||
void halt(const UDSPInstruction opc)
|
||||
{
|
||||
g_dsp.cr |= 0x4;
|
||||
g_dsp.pc--;
|
||||
@@ -182,9 +182,9 @@ void HandleLoop()
|
||||
// then looped instruction will not get executed.
|
||||
// Actually, this instruction simply prepares the loop stacks for the above.
|
||||
// The looping hardware takes care of the rest.
|
||||
void loop(const UDSPInstruction& opc)
|
||||
void loop(const UDSPInstruction opc)
|
||||
{
|
||||
u16 reg = opc.hex & 0x1f;
|
||||
u16 reg = opc & 0x1f;
|
||||
u16 cnt = g_dsp.r[reg];
|
||||
u16 loop_pc = g_dsp.pc;
|
||||
|
||||
@@ -204,9 +204,9 @@ void loop(const UDSPInstruction& opc)
|
||||
// instruction will not get executed.
|
||||
// Actually, this instruction simply prepares the loop stacks for the above.
|
||||
// The looping hardware takes care of the rest.
|
||||
void loopi(const UDSPInstruction& opc)
|
||||
void loopi(const UDSPInstruction opc)
|
||||
{
|
||||
u16 cnt = opc.hex & 0xff;
|
||||
u16 cnt = opc & 0xff;
|
||||
u16 loop_pc = g_dsp.pc;
|
||||
|
||||
if (cnt)
|
||||
@@ -227,9 +227,9 @@ void loopi(const UDSPInstruction& opc)
|
||||
// included in loop. Counter is pushed on loop stack $st3, end of block address
|
||||
// is pushed on loop stack $st2 and repeat address is pushed on call stack $st0.
|
||||
// Up to 4 nested loops is allowed.
|
||||
void bloop(const UDSPInstruction& opc)
|
||||
void bloop(const UDSPInstruction opc)
|
||||
{
|
||||
u16 reg = opc.hex & 0x1f;
|
||||
u16 reg = opc & 0x1f;
|
||||
u16 cnt = g_dsp.r[reg];
|
||||
u16 loop_pc = dsp_fetch_code();
|
||||
|
||||
@@ -255,9 +255,9 @@ void bloop(const UDSPInstruction& opc)
|
||||
// loop. Counter is pushed on loop stack $st3, end of block address is pushed
|
||||
// on loop stack $st2 and repeat address is pushed on call stack $st0. Up to 4
|
||||
// nested loops is allowed.
|
||||
void bloopi(const UDSPInstruction& opc)
|
||||
void bloopi(const UDSPInstruction opc)
|
||||
{
|
||||
u16 cnt = opc.hex & 0xff;
|
||||
u16 cnt = opc & 0xff;
|
||||
u16 loop_pc = dsp_fetch_code();
|
||||
|
||||
if (cnt)
|
||||
|
||||
@@ -30,10 +30,10 @@ namespace DSPInterpreter {
|
||||
// CR[0-7] | M. That is, the upper 8 bits of the address are the
|
||||
// bottom 8 bits from CR, and the lower 8 bits are from the 8-bit immediate.
|
||||
// Note: pc+=2 in duddie's doc seems wrong
|
||||
void srs(const UDSPInstruction& opc)
|
||||
void srs(const UDSPInstruction opc)
|
||||
{
|
||||
u8 reg = ((opc.hex >> 8) & 0x7) + 0x18;
|
||||
u16 addr = (g_dsp.r[DSP_REG_CR] << 8) | (opc.hex & 0xFF);
|
||||
u8 reg = ((opc >> 8) & 0x7) + 0x18;
|
||||
u16 addr = (g_dsp.r[DSP_REG_CR] << 8) | (opc & 0xFF);
|
||||
dsp_dmem_write(addr, g_dsp.r[reg]);
|
||||
}
|
||||
|
||||
@@ -42,10 +42,10 @@ void srs(const UDSPInstruction& opc)
|
||||
// Move value from data memory pointed by address CR[0-7] | M to register
|
||||
// $(0x18+D). That is, the upper 8 bits of the address are the bottom 8 bits
|
||||
// from CR, and the lower 8 bits are from the 8-bit immediate.
|
||||
void lrs(const UDSPInstruction& opc)
|
||||
void lrs(const UDSPInstruction opc)
|
||||
{
|
||||
u8 reg = ((opc.hex >> 8) & 0x7) + 0x18;
|
||||
u16 addr = (g_dsp.r[DSP_REG_CR] << 8) | (opc.hex & 0xFF);
|
||||
u8 reg = ((opc >> 8) & 0x7) + 0x18;
|
||||
u16 addr = (g_dsp.r[DSP_REG_CR] << 8) | (opc & 0xFF);
|
||||
g_dsp.r[reg] = dsp_dmem_read(addr);
|
||||
dsp_conditional_extend_accum(reg);
|
||||
}
|
||||
@@ -55,9 +55,9 @@ void lrs(const UDSPInstruction& opc)
|
||||
// mmmm mmmm mmmm mmmm
|
||||
// Move value from data memory pointed by address M to register $D.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void lr(const UDSPInstruction& opc)
|
||||
void lr(const UDSPInstruction opc)
|
||||
{
|
||||
u8 reg = opc.hex & DSP_REG_MASK;
|
||||
u8 reg = opc & DSP_REG_MASK;
|
||||
u16 addr = dsp_fetch_code();
|
||||
u16 val = dsp_dmem_read(addr);
|
||||
dsp_op_write_reg(reg, val);
|
||||
@@ -69,9 +69,9 @@ void lr(const UDSPInstruction& opc)
|
||||
// mmmm mmmm mmmm mmmm
|
||||
// Store value from register $S to a memory pointed by address M.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void sr(const UDSPInstruction& opc)
|
||||
void sr(const UDSPInstruction opc)
|
||||
{
|
||||
u8 reg = opc.hex & DSP_REG_MASK;
|
||||
u8 reg = opc & DSP_REG_MASK;
|
||||
u16 addr = dsp_fetch_code();
|
||||
u16 val = dsp_op_read_reg(reg);
|
||||
dsp_dmem_write(addr, val);
|
||||
@@ -82,9 +82,9 @@ void sr(const UDSPInstruction& opc)
|
||||
// iiii iiii iiii iiii
|
||||
// Store 16-bit immediate value I to a memory location pointed by address
|
||||
// M (M is 8-bit value sign extended).
|
||||
void si(const UDSPInstruction& opc)
|
||||
void si(const UDSPInstruction opc)
|
||||
{
|
||||
u16 addr = (s8)opc.hex;
|
||||
u16 addr = (s8)opc;
|
||||
u16 imm = dsp_fetch_code();
|
||||
dsp_dmem_write(addr, imm);
|
||||
}
|
||||
@@ -93,10 +93,10 @@ void si(const UDSPInstruction& opc)
|
||||
// 0001 1000 0ssd dddd
|
||||
// Move value from data memory pointed by addressing register $S to register $D.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void lrr(const UDSPInstruction& opc)
|
||||
void lrr(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 5) & 0x3;
|
||||
u8 dreg = opc.hex & 0x1f;
|
||||
u8 sreg = (opc >> 5) & 0x3;
|
||||
u8 dreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
|
||||
dsp_op_write_reg(dreg, val);
|
||||
@@ -108,10 +108,10 @@ void lrr(const UDSPInstruction& opc)
|
||||
// Move value from data memory pointed by addressing register $S toregister $D.
|
||||
// Decrement register $S.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void lrrd(const UDSPInstruction& opc)
|
||||
void lrrd(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 5) & 0x3;
|
||||
u8 dreg = opc.hex & 0x1f;
|
||||
u8 sreg = (opc >> 5) & 0x3;
|
||||
u8 dreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
|
||||
dsp_op_write_reg(dreg, val);
|
||||
@@ -124,10 +124,10 @@ void lrrd(const UDSPInstruction& opc)
|
||||
// Move value from data memory pointed by addressing register $S to register $D.
|
||||
// Increment register $S.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void lrri(const UDSPInstruction& opc)
|
||||
void lrri(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 5) & 0x3;
|
||||
u8 dreg = opc.hex & 0x1f;
|
||||
u8 sreg = (opc >> 5) & 0x3;
|
||||
u8 dreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
|
||||
dsp_op_write_reg(dreg, val);
|
||||
@@ -140,10 +140,10 @@ void lrri(const UDSPInstruction& opc)
|
||||
// Move value from data memory pointed by addressing register $S to register $D.
|
||||
// Add indexing register $(0x4+S) to register $S.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void lrrn(const UDSPInstruction& opc)
|
||||
void lrrn(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 5) & 0x3;
|
||||
u8 dreg = opc.hex & 0x1f;
|
||||
u8 sreg = (opc >> 5) & 0x3;
|
||||
u8 dreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_dmem_read(dsp_op_read_reg(sreg));
|
||||
dsp_op_write_reg(dreg, val);
|
||||
@@ -156,10 +156,10 @@ void lrrn(const UDSPInstruction& opc)
|
||||
// Store value from source register $S to a memory location pointed by
|
||||
// addressing register $D.
|
||||
// FIXME: Perform additional operation depending on source register.
|
||||
void srr(const UDSPInstruction& opc)
|
||||
void srr(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 5) & 0x3;
|
||||
u8 sreg = opc.hex & 0x1f;
|
||||
u8 dreg = (opc >> 5) & 0x3;
|
||||
u8 sreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_op_read_reg(sreg);
|
||||
dsp_dmem_write(g_dsp.r[dreg], val);
|
||||
@@ -170,10 +170,10 @@ void srr(const UDSPInstruction& opc)
|
||||
// Store value from source register $S to a memory location pointed by
|
||||
// addressing register $D. Decrement register $D.
|
||||
// FIXME: Perform additional operation depending on source register.
|
||||
void srrd(const UDSPInstruction& opc)
|
||||
void srrd(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 5) & 0x3;
|
||||
u8 sreg = opc.hex & 0x1f;
|
||||
u8 dreg = (opc >> 5) & 0x3;
|
||||
u8 sreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_op_read_reg(sreg);
|
||||
dsp_dmem_write(g_dsp.r[dreg], val);
|
||||
@@ -185,12 +185,13 @@ void srrd(const UDSPInstruction& opc)
|
||||
// Store value from source register $S to a memory location pointed by
|
||||
// addressing register $D. Increment register $D.
|
||||
// FIXME: Perform additional operation depending on source register.
|
||||
void srri(const UDSPInstruction& opc)
|
||||
void srri(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 5) & 0x3;
|
||||
u8 sreg = opc.hex & 0x1f;
|
||||
u8 dreg = (opc >> 5) & 0x3;
|
||||
u8 sreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_op_read_reg(sreg);
|
||||
|
||||
dsp_dmem_write(g_dsp.r[dreg], val);
|
||||
g_dsp.r[dreg] = dsp_increment_addr_reg(dreg);
|
||||
}
|
||||
@@ -200,10 +201,10 @@ void srri(const UDSPInstruction& opc)
|
||||
// Store value from source register $S to a memory location pointed by
|
||||
// addressing register $D. Add DSP_REG_IX0 register to register $D.
|
||||
// FIXME: Perform additional operation depending on source register.
|
||||
void srrn(const UDSPInstruction& opc)
|
||||
void srrn(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 5) & 0x3;
|
||||
u8 sreg = opc.hex & 0x1f;
|
||||
u8 dreg = (opc >> 5) & 0x3;
|
||||
u8 sreg = opc & 0x1f;
|
||||
|
||||
u16 val = dsp_op_read_reg(sreg);
|
||||
dsp_dmem_write(g_dsp.r[dreg], val);
|
||||
@@ -214,10 +215,10 @@ void srrn(const UDSPInstruction& opc)
|
||||
// 0000 001d 0001 00ss
|
||||
// Move value from instruction memory pointed by addressing register
|
||||
// $arS to mid accumulator register $acD.m.
|
||||
void ilrr(const UDSPInstruction& opc)
|
||||
void ilrr(const UDSPInstruction opc)
|
||||
{
|
||||
u16 reg = opc.hex & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
|
||||
u16 reg = opc & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
|
||||
|
||||
g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
|
||||
dsp_conditional_extend_accum(dreg);
|
||||
@@ -227,10 +228,10 @@ void ilrr(const UDSPInstruction& opc)
|
||||
// 0000 001d 0001 01ss
|
||||
// Move value from instruction memory pointed by addressing register
|
||||
// $arS to mid accumulator register $acD.m. Decrement addressing register $arS.
|
||||
void ilrrd(const UDSPInstruction& opc)
|
||||
void ilrrd(const UDSPInstruction opc)
|
||||
{
|
||||
u16 reg = opc.hex & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
|
||||
u16 reg = opc & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
|
||||
|
||||
g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
|
||||
dsp_conditional_extend_accum(dreg);
|
||||
@@ -241,10 +242,10 @@ void ilrrd(const UDSPInstruction& opc)
|
||||
// 0000 001d 0001 10ss
|
||||
// Move value from instruction memory pointed by addressing register
|
||||
// $arS to mid accumulator register $acD.m. Increment addressing register $arS.
|
||||
void ilrri(const UDSPInstruction& opc)
|
||||
void ilrri(const UDSPInstruction opc)
|
||||
{
|
||||
u16 reg = opc.hex & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
|
||||
u16 reg = opc & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
|
||||
|
||||
g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
|
||||
dsp_conditional_extend_accum(dreg);
|
||||
@@ -256,10 +257,10 @@ void ilrri(const UDSPInstruction& opc)
|
||||
// Move value from instruction memory pointed by addressing register
|
||||
// $arS to mid accumulator register $acD.m. Add corresponding indexing
|
||||
// register $ixS to addressing register $arS.
|
||||
void ilrrn(const UDSPInstruction& opc)
|
||||
void ilrrn(const UDSPInstruction opc)
|
||||
{
|
||||
u16 reg = opc.hex & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc.hex >> 8) & 1);
|
||||
u16 reg = opc & 0x3;
|
||||
u16 dreg = DSP_REG_ACM0 + ((opc >> 8) & 1);
|
||||
|
||||
g_dsp.r[dreg] = dsp_imem_read(g_dsp.r[reg]);
|
||||
dsp_conditional_extend_accum(dreg);
|
||||
|
||||
@@ -29,10 +29,10 @@ namespace DSPInterpreter {
|
||||
// 0001 11dd ddds ssss
|
||||
// Move value from register $S to register $D.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void mrr(const UDSPInstruction& opc)
|
||||
void mrr(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = opc.hex & 0x1f;
|
||||
u8 dreg = (opc.hex >> 5) & 0x1f;
|
||||
u8 sreg = opc & 0x1f;
|
||||
u8 dreg = (opc >> 5) & 0x1f;
|
||||
|
||||
u16 val = dsp_op_read_reg(sreg);
|
||||
dsp_op_write_reg(dreg, val);
|
||||
@@ -49,9 +49,9 @@ void mrr(const UDSPInstruction& opc)
|
||||
// register, has a different behaviour in S40 mode if loaded to AC0.M: The
|
||||
// value gets sign extended to the whole accumulator! This does not happen in
|
||||
// S16 mode.
|
||||
void lri(const UDSPInstruction& opc)
|
||||
void lri(const UDSPInstruction opc)
|
||||
{
|
||||
u8 reg = opc.hex & DSP_REG_MASK;
|
||||
u8 reg = opc & DSP_REG_MASK;
|
||||
u16 imm = dsp_fetch_code();
|
||||
dsp_op_write_reg(reg, imm);
|
||||
dsp_conditional_extend_accum(reg);
|
||||
@@ -61,10 +61,10 @@ void lri(const UDSPInstruction& opc)
|
||||
// 0000 1ddd iiii iiii
|
||||
// Load immediate value I (8-bit sign extended) to accumulator register.
|
||||
// FIXME: Perform additional operation depending on destination register.
|
||||
void lris(const UDSPInstruction& opc)
|
||||
void lris(const UDSPInstruction opc)
|
||||
{
|
||||
u8 reg = ((opc.hex >> 8) & 0x7) + DSP_REG_AXL0;
|
||||
u16 imm = (s8)opc.hex;
|
||||
u8 reg = ((opc >> 8) & 0x7) + DSP_REG_AXL0;
|
||||
u16 imm = (s8)opc;
|
||||
dsp_op_write_reg(reg, imm);
|
||||
dsp_conditional_extend_accum(reg);
|
||||
}
|
||||
@@ -76,7 +76,7 @@ void lris(const UDSPInstruction& opc)
|
||||
// No operation, but can be extended with extended opcode.
|
||||
// This opcode is supposed to do nothing - it's used if you want to use
|
||||
// an opcode extension but not do anything. At least according to duddie.
|
||||
void nx(const UDSPInstruction& opc)
|
||||
void nx(const UDSPInstruction opc)
|
||||
{
|
||||
zeroWriteBackLog();
|
||||
}
|
||||
@@ -86,26 +86,26 @@ void nx(const UDSPInstruction& opc)
|
||||
// DAR $arD
|
||||
// 0000 0000 0000 01dd
|
||||
// Decrement address register $arD.
|
||||
void dar(const UDSPInstruction& opc)
|
||||
void dar(const UDSPInstruction opc)
|
||||
{
|
||||
g_dsp.r[opc.hex & 0x3] = dsp_decrement_addr_reg(opc.hex & 0x3);
|
||||
g_dsp.r[opc & 0x3] = dsp_decrement_addr_reg(opc & 0x3);
|
||||
}
|
||||
|
||||
// IAR $arD
|
||||
// 0000 0000 0000 10dd
|
||||
// Increment address register $arD.
|
||||
void iar(const UDSPInstruction& opc)
|
||||
void iar(const UDSPInstruction opc)
|
||||
{
|
||||
g_dsp.r[opc.hex & 0x3] = dsp_increment_addr_reg(opc.hex & 0x3);
|
||||
g_dsp.r[opc & 0x3] = dsp_increment_addr_reg(opc & 0x3);
|
||||
}
|
||||
|
||||
// SUBARN $arD
|
||||
// 0000 0000 0000 11dd
|
||||
// Subtract indexing register $ixD from an addressing register $arD.
|
||||
// used only in IPL-NTSC ucode
|
||||
void subarn(const UDSPInstruction& opc)
|
||||
void subarn(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = opc.hex & 0x3;
|
||||
u8 dreg = opc & 0x3;
|
||||
g_dsp.r[dreg] = dsp_decrease_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + dreg]);
|
||||
}
|
||||
|
||||
@@ -113,10 +113,10 @@ void subarn(const UDSPInstruction& opc)
|
||||
// 0000 0000 0001 ssdd
|
||||
// Adds indexing register $ixS to an addressing register $arD.
|
||||
// It is critical for the Zelda ucode that this one wraps correctly.
|
||||
void addarn(const UDSPInstruction& opc)
|
||||
void addarn(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = opc.hex & 0x3;
|
||||
u8 sreg = (opc.hex >> 2) & 0x3;
|
||||
u8 dreg = opc & 0x3;
|
||||
u8 sreg = (opc >> 2) & 0x3;
|
||||
g_dsp.r[dreg] = dsp_increase_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]);
|
||||
}
|
||||
|
||||
@@ -126,9 +126,9 @@ void addarn(const UDSPInstruction& opc)
|
||||
// 0001 0011 aaaa aiii
|
||||
// bit of status register $sr. Bit number is calculated by adding 6 to
|
||||
// immediate value I.
|
||||
void sbclr(const UDSPInstruction& opc)
|
||||
void sbclr(const UDSPInstruction opc)
|
||||
{
|
||||
u8 bit = (opc.hex & 0x7) + 6;
|
||||
u8 bit = (opc & 0x7) + 6;
|
||||
g_dsp.r[DSP_REG_SR] &= ~(1 << bit);
|
||||
}
|
||||
|
||||
@@ -136,18 +136,18 @@ void sbclr(const UDSPInstruction& opc)
|
||||
// 0001 0010 aaaa aiii
|
||||
// Set bit of status register $sr. Bit number is calculated by adding 6 to
|
||||
// immediate value I.
|
||||
void sbset(const UDSPInstruction& opc)
|
||||
void sbset(const UDSPInstruction opc)
|
||||
{
|
||||
u8 bit = (opc.hex & 0x7) + 6;
|
||||
u8 bit = (opc & 0x7) + 6;
|
||||
g_dsp.r[DSP_REG_SR] |= (1 << bit);
|
||||
}
|
||||
|
||||
// This is a bunch of flag setters, flipping bits in SR. So far so good,
|
||||
// but it's harder to know exactly what effect they have.
|
||||
void srbith(const UDSPInstruction& opc)
|
||||
void srbith(const UDSPInstruction opc)
|
||||
{
|
||||
zeroWriteBackLog();
|
||||
switch ((opc.hex >> 8) & 0xf)
|
||||
switch ((opc >> 8) & 0xf)
|
||||
{
|
||||
// M0/M2 change the multiplier mode (it can multiply by 2 for free).
|
||||
case 0xa: // M2
|
||||
@@ -183,9 +183,9 @@ void srbith(const UDSPInstruction& opc)
|
||||
|
||||
//----
|
||||
|
||||
void unknown(const UDSPInstruction& opc)
|
||||
void unknown(const UDSPInstruction opc)
|
||||
{
|
||||
ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc.hex, g_dsp.pc);
|
||||
ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc, g_dsp.pc);
|
||||
}
|
||||
|
||||
} // namespace
|
||||
|
||||
@@ -103,7 +103,7 @@ s64 dsp_multiply_mulx(u8 axh0, u8 axh1, u16 val1, u16 val2)
|
||||
// CLRP
|
||||
// 1000 0100 xxxx xxxx
|
||||
// Clears product register $prod.
|
||||
void clrp(const UDSPInstruction& opc)
|
||||
void clrp(const UDSPInstruction opc)
|
||||
{
|
||||
// Magic numbers taken from duddie's doc
|
||||
// These are probably a bad idea to put here.
|
||||
@@ -123,7 +123,7 @@ void clrp(const UDSPInstruction& opc)
|
||||
// Test prod regs value.
|
||||
//
|
||||
// flags out: xx xx0x <- CF??
|
||||
void tstprod(const UDSPInstruction& opc)
|
||||
void tstprod(const UDSPInstruction opc)
|
||||
{
|
||||
s64 prod = dsp_get_long_prod();
|
||||
Update_SR_Register64(prod);
|
||||
@@ -137,9 +137,9 @@ void tstprod(const UDSPInstruction& opc)
|
||||
// Moves multiply product from $prod register to accumulator $acD register.
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void movp(const UDSPInstruction& opc)
|
||||
void movp(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 8) & 0x1;
|
||||
u8 dreg = (opc >> 8) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_prod();
|
||||
|
||||
@@ -155,9 +155,9 @@ void movp(const UDSPInstruction& opc)
|
||||
// $acD register.
|
||||
//
|
||||
// flags out: xx xx0x <- CF??
|
||||
void movnp(const UDSPInstruction& opc)
|
||||
void movnp(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 8) & 0x1;
|
||||
u8 dreg = (opc >> 8) & 0x1;
|
||||
|
||||
s64 acc = -dsp_get_long_prod();
|
||||
|
||||
@@ -173,9 +173,9 @@ void movnp(const UDSPInstruction& opc)
|
||||
// register and sets $acD.l to 0
|
||||
//
|
||||
// flags out: xx xx0x <- CF??
|
||||
void movpz(const UDSPInstruction& opc)
|
||||
void movpz(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 8) & 0x01;
|
||||
u8 dreg = (opc >> 8) & 0x01;
|
||||
|
||||
s64 acc = dsp_get_long_prod_round_prodl();
|
||||
|
||||
@@ -191,10 +191,10 @@ void movpz(const UDSPInstruction& opc)
|
||||
// in accumulator register. Low 16-bits of $acD ($acD.l) are set to 0.
|
||||
//
|
||||
// flags out: ?-xx xx??
|
||||
void addpaxz(const UDSPInstruction& opc)
|
||||
void addpaxz(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 9) & 0x1;
|
||||
u8 dreg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 9) & 0x1;
|
||||
|
||||
s64 prod = dsp_get_long_prod_round_prodl();
|
||||
s64 ax = dsp_get_long_acx(sreg);
|
||||
@@ -212,7 +212,7 @@ void addpaxz(const UDSPInstruction& opc)
|
||||
// MULAXH
|
||||
// 1000 0011 xxxx xxxx
|
||||
// Multiply $ax0.h by $ax0.h
|
||||
void mulaxh(const UDSPInstruction& opc)
|
||||
void mulaxh(const UDSPInstruction opc)
|
||||
{
|
||||
s64 prod = dsp_multiply(dsp_get_ax_h(0), dsp_get_ax_h(0));
|
||||
|
||||
@@ -227,9 +227,9 @@ void mulaxh(const UDSPInstruction& opc)
|
||||
// 1001 s000 xxxx xxxx
|
||||
// Multiply low part $axS.l of secondary accumulator $axS by high part
|
||||
// $axS.h of secondary accumulator $axS (treat them both as signed).
|
||||
void mul(const UDSPInstruction& opc)
|
||||
void mul(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 11) & 0x1;
|
||||
|
||||
u16 axl = dsp_get_ax_l(sreg);
|
||||
u16 axh = dsp_get_ax_h(sreg);
|
||||
@@ -247,10 +247,10 @@ void mul(const UDSPInstruction& opc)
|
||||
// accumulator $axS (treat them both as signed).
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulac(const UDSPInstruction& opc)
|
||||
void mulac(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 11) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 11) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_acc(rreg) + dsp_get_long_prod();
|
||||
u16 axl = dsp_get_ax_l(sreg);
|
||||
@@ -271,10 +271,10 @@ void mulac(const UDSPInstruction& opc)
|
||||
// accumulator $axS (treat them both as signed).
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulmv(const UDSPInstruction& opc)
|
||||
void mulmv(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = ((opc.hex >> 11) & 0x1);
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 sreg = ((opc >> 11) & 0x1);
|
||||
|
||||
s64 acc = dsp_get_long_prod();
|
||||
u16 axl = dsp_get_ax_l(sreg);
|
||||
@@ -296,10 +296,10 @@ void mulmv(const UDSPInstruction& opc)
|
||||
// them both as signed).
|
||||
//
|
||||
// flags out: xx xx0x
|
||||
void mulmvz(const UDSPInstruction& opc)
|
||||
void mulmvz(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 11) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 11) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_prod_round_prodl();
|
||||
u16 axl = dsp_get_ax_l(sreg);
|
||||
@@ -319,10 +319,10 @@ void mulmvz(const UDSPInstruction& opc)
|
||||
// 101s t000 xxxx xxxx
|
||||
// Multiply one part $ax0 by one part $ax1.
|
||||
// Part is selected by S and T bits. Zero selects low part, one selects high part.
|
||||
void mulx(const UDSPInstruction& opc)
|
||||
void mulx(const UDSPInstruction opc)
|
||||
{
|
||||
u8 treg = ((opc.hex >> 11) & 0x1);
|
||||
u8 sreg = ((opc.hex >> 12) & 0x1);
|
||||
u8 treg = ((opc >> 11) & 0x1);
|
||||
u8 sreg = ((opc >> 12) & 0x1);
|
||||
|
||||
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
||||
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
|
||||
@@ -340,11 +340,11 @@ void mulx(const UDSPInstruction& opc)
|
||||
// T bits. Zero selects low part, one selects high part.
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulxac(const UDSPInstruction& opc)
|
||||
void mulxac(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_acc(rreg) + dsp_get_long_prod();
|
||||
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
||||
@@ -365,11 +365,11 @@ void mulxac(const UDSPInstruction& opc)
|
||||
// T bits. Zero selects low part, one selects high part.
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulxmv(const UDSPInstruction& opc)
|
||||
void mulxmv(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = ((opc.hex >> 8) & 0x1);
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 rreg = ((opc >> 8) & 0x1);
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_prod();
|
||||
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
||||
@@ -391,11 +391,11 @@ void mulxmv(const UDSPInstruction& opc)
|
||||
// one selects high part.
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulxmvz(const UDSPInstruction& opc)
|
||||
void mulxmvz(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_prod_round_prodl();
|
||||
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
||||
@@ -415,10 +415,10 @@ void mulxmvz(const UDSPInstruction& opc)
|
||||
// 110s t000 xxxx xxxx
|
||||
// Multiply mid part of accumulator register $acS.m by high part $axS.h of
|
||||
// secondary accumulator $axS (treat them both as signed).
|
||||
void mulc(const UDSPInstruction& opc)
|
||||
void mulc(const UDSPInstruction opc)
|
||||
{
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
u16 accm = dsp_get_acc_m(sreg);
|
||||
u16 axh = dsp_get_ax_h(treg);
|
||||
@@ -436,11 +436,11 @@ void mulc(const UDSPInstruction& opc)
|
||||
// register before multiplication to accumulator $acR.
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulcac(const UDSPInstruction& opc)
|
||||
void mulcac(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_acc(rreg) + dsp_get_long_prod();
|
||||
u16 accm = dsp_get_acc_m(sreg);
|
||||
@@ -462,11 +462,11 @@ void mulcac(const UDSPInstruction& opc)
|
||||
// possible mistake in duddie's doc axT.h rather than axS.h
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulcmv(const UDSPInstruction& opc)
|
||||
void mulcmv(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_prod();
|
||||
u16 accm = dsp_get_acc_m(sreg);
|
||||
@@ -489,11 +489,11 @@ void mulcmv(const UDSPInstruction& opc)
|
||||
// accumulator $acR.l to zero.
|
||||
//
|
||||
// flags out: xx xx00
|
||||
void mulcmvz(const UDSPInstruction& opc)
|
||||
void mulcmvz(const UDSPInstruction opc)
|
||||
{
|
||||
u8 rreg = (opc.hex >> 8) & 0x1;
|
||||
u8 treg = (opc.hex >> 11) & 0x1;
|
||||
u8 sreg = (opc.hex >> 12) & 0x1;
|
||||
u8 rreg = (opc >> 8) & 0x1;
|
||||
u8 treg = (opc >> 11) & 0x1;
|
||||
u8 sreg = (opc >> 12) & 0x1;
|
||||
|
||||
s64 acc = dsp_get_long_prod_round_prodl();
|
||||
u16 accm = dsp_get_acc_m(sreg);
|
||||
@@ -514,10 +514,10 @@ void mulcmvz(const UDSPInstruction& opc)
|
||||
// Multiply one part of secondary accumulator $ax0 (selected by S) by
|
||||
// one part of secondary accumulator $ax1 (selected by T) (treat them both as
|
||||
// signed) and add result to product register.
|
||||
void maddx(const UDSPInstruction& opc)
|
||||
void maddx(const UDSPInstruction opc)
|
||||
{
|
||||
u8 treg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 9) & 0x1;
|
||||
u8 treg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 9) & 0x1;
|
||||
|
||||
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
||||
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
|
||||
@@ -533,10 +533,10 @@ void maddx(const UDSPInstruction& opc)
|
||||
// Multiply one part of secondary accumulator $ax0 (selected by S) by
|
||||
// one part of secondary accumulator $ax1 (selected by T) (treat them both as
|
||||
// signed) and subtract result from product register.
|
||||
void msubx(const UDSPInstruction& opc)
|
||||
void msubx(const UDSPInstruction opc)
|
||||
{
|
||||
u8 treg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 9) & 0x1;
|
||||
u8 treg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 9) & 0x1;
|
||||
|
||||
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
||||
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
|
||||
@@ -552,10 +552,10 @@ void msubx(const UDSPInstruction& opc)
|
||||
// Multiply middle part of accumulator $acS.m by high part of secondary
|
||||
// accumulator $axT.h (treat them both as signed) and add result to product
|
||||
// register.
|
||||
void maddc(const UDSPInstruction& opc)
|
||||
void maddc(const UDSPInstruction opc)
|
||||
{
|
||||
u8 treg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 9) & 0x1;
|
||||
u8 treg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 9) & 0x1;
|
||||
|
||||
u16 accm = dsp_get_acc_m(sreg);
|
||||
u16 axh = dsp_get_ax_h(treg);
|
||||
@@ -571,10 +571,10 @@ void maddc(const UDSPInstruction& opc)
|
||||
// Multiply middle part of accumulator $acS.m by high part of secondary
|
||||
// accumulator $axT.h (treat them both as signed) and subtract result from
|
||||
// product register.
|
||||
void msubc(const UDSPInstruction& opc)
|
||||
void msubc(const UDSPInstruction opc)
|
||||
{
|
||||
u8 treg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc.hex >> 9) & 0x1;
|
||||
u8 treg = (opc >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 9) & 0x1;
|
||||
|
||||
u16 accm = dsp_get_acc_m(sreg);
|
||||
u16 axh = dsp_get_ax_h(treg);
|
||||
@@ -590,9 +590,9 @@ void msubc(const UDSPInstruction& opc)
|
||||
// Multiply low part $axS.l of secondary accumulator $axS by high part
|
||||
// $axS.h of secondary accumulator $axS (treat them both as signed) and add
|
||||
// result to product register.
|
||||
void madd(const UDSPInstruction& opc)
|
||||
void madd(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 8) & 0x1;
|
||||
|
||||
u16 axl = dsp_get_ax_l(sreg);
|
||||
u16 axh = dsp_get_ax_h(sreg);
|
||||
@@ -608,9 +608,9 @@ void madd(const UDSPInstruction& opc)
|
||||
// Multiply low part $axS.l of secondary accumulator $axS by high part
|
||||
// $axS.h of secondary accumulator $axS (treat them both as signed) and
|
||||
// subtract result from product register.
|
||||
void msub(const UDSPInstruction& opc)
|
||||
void msub(const UDSPInstruction opc)
|
||||
{
|
||||
u8 sreg = (opc.hex >> 8) & 0x1;
|
||||
u8 sreg = (opc >> 8) & 0x1;
|
||||
|
||||
u16 axl = dsp_get_ax_l(sreg);
|
||||
u16 axh = dsp_get_ax_h(sreg);
|
||||
|
||||
@@ -39,7 +39,7 @@
|
||||
#include <Windows.h> // For MAX_PATH
|
||||
#endif
|
||||
|
||||
extern void nop(const UDSPInstruction& opc);
|
||||
extern void nop(const UDSPInstruction opc);
|
||||
|
||||
DSPDisassembler::DSPDisassembler(const AssemblerSettings &settings)
|
||||
: settings_(settings)
|
||||
|
||||
Reference in New Issue
Block a user