DSP: Add the interpreter to the DSP namespace

This commit is contained in:
Lioncash
2016-12-29 07:05:17 -05:00
parent c79cc3f470
commit 2aefa29941
16 changed files with 322 additions and 281 deletions
+5 -5
View File
@@ -193,7 +193,7 @@ void DSPCore_SetExternalInterrupt(bool val)
// Coming from the CPU
void DSPCore_CheckExternalInterrupt()
{
if (!dsp_SR_is_flag_set(SR_EXT_INT_ENABLE))
if (!DSP::Interpreter::dsp_SR_is_flag_set(SR_EXT_INT_ENABLE))
return;
// Signal the SPU about new mail
@@ -213,7 +213,7 @@ void DSPCore_CheckExceptions()
// Seems exp int are not masked by sr_int_enable
if (g_dsp.exceptions & (1 << i))
{
if (dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT))
if (DSP::Interpreter::dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT))
{
// store pc and sr until RTI
dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
@@ -267,9 +267,9 @@ int DSPCore_RunCycles(int cycles)
case DSPCORE_RUNNING:
// Seems to slow things down
#if defined(_DEBUG) || defined(DEBUGFAST)
cycles = DSPInterpreter::RunCyclesDebug(cycles);
cycles = DSP::Interpreter::RunCyclesDebug(cycles);
#else
cycles = DSPInterpreter::RunCycles(cycles);
cycles = DSP::Interpreter::RunCycles(cycles);
#endif
break;
@@ -278,7 +278,7 @@ int DSPCore_RunCycles(int cycles)
if (core_state != DSPCORE_STEPPING)
continue;
DSPInterpreter::Step();
DSP::Interpreter::Step();
cycles--;
DSPHost::UpdateDebugger();
+1 -1
View File
@@ -194,7 +194,7 @@ bool DSPDisassembler::DisassembleOpcode(const u16* binbuf, int base_addr, int pa
break;
}
}
const DSPOPCTemplate fake_op = {"CW", 0x0000, 0x0000, DSPInterpreter::nop,
const DSPOPCTemplate fake_op = {"CW", 0x0000, 0x0000, DSP::Interpreter::nop,
nullptr, 1, 1, {{P_VAL, 2, 0, 0, 0xffff}},
false, false, false, false,
false};
File diff suppressed because it is too large Load Diff
@@ -12,7 +12,9 @@
// Arithmetic and accumulator control.
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
// CLR $acR
// 1000 r001 xxxx xxxx
@@ -1158,4 +1160,5 @@ void asrnr(const UDSPInstruction opc)
Update_SR_Register64(dsp_get_long_acc(dreg));
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -11,7 +11,9 @@
#include "Core/DSP/Interpreter/DSPIntUtil.h"
#include "Core/DSP/Interpreter/DSPInterpreter.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
// Generic call implementation
// CALLcc addressA
@@ -262,4 +264,5 @@ void bloopi(const UDSPInstruction opc)
}
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -9,7 +9,9 @@
#include "Core/DSP/Interpreter/DSPIntCCUtil.h"
#include "Core/DSP/DSPCore.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
void Update_SR_Register64(s64 _Value, bool carry, bool overflow)
{
@@ -181,4 +183,5 @@ bool CheckCondition(u8 _Condition)
}
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -10,7 +10,9 @@
#include "Common/CommonTypes.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
bool CheckCondition(u8 _Condition);
@@ -39,4 +41,5 @@ inline bool isOverS32(s64 acc)
return (acc != (s32)acc) ? true : false;
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -29,7 +29,9 @@ inline static void writeToBackLog(int i, int idx, u16 value)
writeBackLogIdx[i] = idx;
}
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
namespace Ext
{
@@ -496,8 +498,9 @@ void nop(const UDSPInstruction opc)
{
}
} // end namespace ext
} // end namespace DSPInterpeter
} // namespace Ext
} // namespace Interpeter
} // namespace DSP
// The ext ops are calculated in parallel with the actual op. That means that
// both the main op and the ext op see the same register state as input. The
@@ -513,11 +516,12 @@ void applyWriteBackLog()
// infinitive loops
for (int i = 0; writeBackLogIdx[i] != -1; i++)
{
u16 value = writeBackLog[i];
#ifdef PRECISE_BACKLOG
dsp_op_write_reg(writeBackLogIdx[i], dsp_op_read_reg(writeBackLogIdx[i]) | writeBackLog[i]);
#else
dsp_op_write_reg(writeBackLogIdx[i], writeBackLog[i]);
value |= DSP::Interpreter::dsp_op_read_reg(writeBackLogIdx[i]);
#endif
DSP::Interpreter::dsp_op_write_reg(writeBackLogIdx[i], value);
// Clear back log
writeBackLogIdx[i] = -1;
}
@@ -537,7 +541,7 @@ void zeroWriteBackLog()
// infinitive loops
for (int i = 0; writeBackLogIdx[i] != -1; i++)
{
dsp_op_write_reg(writeBackLogIdx[i], 0);
DSP::Interpreter::dsp_op_write_reg(writeBackLogIdx[i], 0);
}
#endif
}
@@ -559,7 +563,7 @@ void zeroWriteBackLogPreserveAcc(u8 acc)
(writeBackLogIdx[i] == DSP_REG_ACH1)))
continue;
dsp_op_write_reg(writeBackLogIdx[i], 0);
DSP::Interpreter::dsp_op_write_reg(writeBackLogIdx[i], 0);
}
#endif
}
@@ -11,7 +11,9 @@
// Many opcode have the lower 0xFF (some only 0x7f) free - there, an opcode extension
// can be stored.
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
namespace Ext
{
@@ -41,5 +43,6 @@ void ir(const UDSPInstruction opc);
void nr(const UDSPInstruction opc);
void nop(const UDSPInstruction opc);
} // end namespace Ext
} // end namespace DSPinterpeter
} // namespace Ext
} // namespace Interpeter
} // namespace DSP
@@ -8,7 +8,9 @@
#include "Core/DSP/Interpreter/DSPIntUtil.h"
#include "Core/DSP/Interpreter/DSPInterpreter.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
// SRS @M, $(0x18+S)
// 0010 1sss mmmm mmmm
@@ -260,4 +262,5 @@ void ilrrn(const UDSPInstruction opc)
g_dsp.r.ar[reg] = dsp_increase_addr_reg(reg, (s16)g_dsp.r.ix[reg]);
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -10,7 +10,9 @@
#include "Core/DSP/Interpreter/DSPIntUtil.h"
#include "Core/DSP/Interpreter/DSPInterpreter.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
// MRR $D, $S
// 0001 11dd ddds ssss
@@ -158,4 +160,5 @@ void srbith(const UDSPInstruction opc)
}
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -11,7 +11,9 @@
#include "Core/DSP/Interpreter/DSPIntUtil.h"
#include "Core/DSP/Interpreter/DSPInterpreter.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
// Only MULX family instructions have unsigned/mixed support.
inline s64 dsp_get_multiply_prod(u16 a, u16 b, u8 sign)
@@ -592,4 +594,5 @@ void msub(const UDSPInstruction opc)
dsp_set_long_prod(prod);
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -11,6 +11,10 @@
#include "Core/DSP/DSPCore.h"
#include "Core/DSP/DSPStacks.h"
namespace DSP
{
namespace Interpreter
{
// ---------------------------------------------------------------------------------------
// --- SR
// ---------------------------------------------------------------------------------------
@@ -375,3 +379,6 @@ inline s16 dsp_get_ax_h(int _reg)
{
return (s16)g_dsp.r.ax[_reg].h;
}
} // namespace Interpreter
} // namespace DSP
@@ -13,7 +13,9 @@
#include "Core/DSP/DSPMemoryMap.h"
#include "Core/DSP/DSPTables.h"
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
namespace
{
@@ -238,4 +240,5 @@ void nop(const UDSPInstruction opc)
ERROR_LOG(DSPLLE, "LLE: Unrecognized opcode 0x%04x", opc);
}
} // namespace
} // namespace Interpreter
} // namespace DSP
@@ -8,7 +8,9 @@
#define DSP_REG_MASK 0x1f
namespace DSPInterpreter
namespace DSP
{
namespace Interpreter
{
void Step();
@@ -146,4 +148,5 @@ void xorc(const UDSPInstruction opc);
void xori(const UDSPInstruction opc);
void xorr(const UDSPInstruction opc);
} // namespace
} // namespace Interpreter
} // namespace DSP
+4 -4
View File
@@ -91,7 +91,7 @@ void DSPLLE::DSPThread(DSPLLE* dsp_lle)
}
else
{
DSPInterpreter::RunCyclesThread(cycles);
DSP::Interpreter::RunCyclesThread(cycles);
}
dsp_lle->m_cycle_count.store(0);
}
@@ -203,7 +203,7 @@ void DSPLLE::Shutdown()
u16 DSPLLE::DSP_WriteControlRegister(u16 _uFlag)
{
DSPInterpreter::WriteCR(_uFlag);
DSP::Interpreter::WriteCR(_uFlag);
if (_uFlag & 2)
{
@@ -222,12 +222,12 @@ u16 DSPLLE::DSP_WriteControlRegister(u16 _uFlag)
}
}
return DSPInterpreter::ReadCR();
return DSP::Interpreter::ReadCR();
}
u16 DSPLLE::DSP_ReadControlRegister()
{
return DSPInterpreter::ReadCR();
return DSP::Interpreter::ReadCR();
}
u16 DSPLLE::DSP_ReadMailBoxHigh(bool _CPUMailbox)