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https://github.com/izzy2lost/WeeU.git
synced 2026-07-06 00:19:59 -07:00
PPCRec: Move analyzer file + move some funcs to IMLInstruction
This commit is contained in:
@@ -65,7 +65,7 @@ add_library(CemuCafe
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HW/Espresso/Recompiler/IML/IMLInstruction.cpp
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HW/Espresso/Recompiler/IML/IMLInstruction.h
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HW/Espresso/Recompiler/IML/IMLDebug.cpp
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HW/Espresso/Recompiler/PPCRecompilerImlAnalyzer.cpp
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HW/Espresso/Recompiler/IML/IMLAnalyzer.cpp
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HW/Espresso/Recompiler/PPCRecompilerImlGen.cpp
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HW/Espresso/Recompiler/PPCRecompilerImlGenFPU.cpp
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HW/Espresso/Recompiler/PPCRecompilerIml.h
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@@ -1,3 +1,18 @@
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#pragma once
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#include "IMLInstruction.h"
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#include "IMLSegment.h"
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// analyzer
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struct PPCRecCRTracking_t
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{
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uint32 readCRBits;
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uint32 writtenCRBits;
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};
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bool IMLAnalyzer_IsTightFiniteLoop(IMLSegment* imlSegment);
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bool IMLAnalyzer_CanTypeWriteCR(IMLInstruction* imlInstruction);
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void IMLAnalyzer_GetCRTracking(IMLInstruction* imlInstruction, PPCRecCRTracking_t* crTracking);
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// debug
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void IMLDebug_DumpSegment(struct IMLSegment* imlSegment, sint32 segmentIndex, bool printLivenessRangeInfo = false);
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+10
-9
@@ -1,12 +1,13 @@
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#include "PPCRecompiler.h"
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#include "PPCRecompilerIml.h"
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#include "IML.h"
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//#include "PPCRecompilerIml.h"
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#include "util/helpers/fixedSizeList.h"
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#include "Cafe/HW/Espresso/Interpreter/PPCInterpreterInternal.h"
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/*
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* Initializes a single segment and returns true if it is a finite loop
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*/
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bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(IMLSegment* imlSegment)
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bool IMLAnalyzer_IsTightFiniteLoop(IMLSegment* imlSegment)
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{
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bool isTightFiniteLoop = false;
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// base criteria, must jump to beginning of same segment
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@@ -35,12 +36,12 @@ bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(IMLSegment* imlSegment)
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{
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// remove all registers from the list that are modified by non-ADD/SUB instructions
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// todo: We should also cover the case where ADD+SUB on the same register cancel the effect out
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PPCImlOptimizerUsedRegisters_t registersUsed;
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IMLUsedRegisters registersUsed;
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for (const IMLInstruction& instIt : imlSegment->imlList)
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{
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if (instIt.type == PPCREC_IML_TYPE_R_S32 && (instIt.operation == PPCREC_IML_OP_ADD || instIt.operation == PPCREC_IML_OP_SUB))
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continue;
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PPCRecompiler_checkRegisterUsage(nullptr, &instIt, ®istersUsed);
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instIt.CheckRegisterUsage(®istersUsed);
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if(registersUsed.writtenNamedReg1 < 0)
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continue;
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list_modifiedRegisters.remove(registersUsed.writtenNamedReg1);
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@@ -56,7 +57,7 @@ bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(IMLSegment* imlSegment)
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/*
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* Returns true if the imlInstruction can overwrite CR (depending on value of ->crRegister)
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*/
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bool PPCRecompilerImlAnalyzer_canTypeWriteCR(IMLInstruction* imlInstruction)
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bool IMLAnalyzer_CanTypeWriteCR(IMLInstruction* imlInstruction)
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{
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if (imlInstruction->type == PPCREC_IML_TYPE_R_R)
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return true;
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@@ -77,7 +78,7 @@ bool PPCRecompilerImlAnalyzer_canTypeWriteCR(IMLInstruction* imlInstruction)
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return false;
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}
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void PPCRecompilerImlAnalyzer_getCRTracking(IMLInstruction* imlInstruction, PPCRecCRTracking_t* crTracking)
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void IMLAnalyzer_GetCRTracking(IMLInstruction* imlInstruction, PPCRecCRTracking_t* crTracking)
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{
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crTracking->readCRBits = 0;
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crTracking->writtenCRBits = 0;
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@@ -125,7 +126,7 @@ void PPCRecompilerImlAnalyzer_getCRTracking(IMLInstruction* imlInstruction, PPCR
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else
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assert_dbg();
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}
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else if (PPCRecompilerImlAnalyzer_canTypeWriteCR(imlInstruction) && imlInstruction->crRegister >= 0 && imlInstruction->crRegister <= 7)
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else if (IMLAnalyzer_CanTypeWriteCR(imlInstruction) && imlInstruction->crRegister >= 0 && imlInstruction->crRegister <= 7)
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{
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crTracking->writtenCRBits |= (0xF << (imlInstruction->crRegister * 4));
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}
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@@ -134,4 +135,4 @@ void PPCRecompilerImlAnalyzer_getCRTracking(IMLInstruction* imlInstruction, PPCR
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// overwrites CR0
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crTracking->writtenCRBits |= (0xF << 0);
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}
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}
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}
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File diff suppressed because it is too large
Load Diff
@@ -236,6 +236,35 @@ enum
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PPCREC_FPR_ST_MODE_PSQ_S16_PS0_PS1,
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};
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struct IMLUsedRegisters
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{
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union
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{
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struct
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{
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sint16 readNamedReg1;
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sint16 readNamedReg2;
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sint16 readNamedReg3;
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sint16 writtenNamedReg1;
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};
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sint16 gpr[4]; // 3 read + 1 write
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};
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// FPR
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union
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{
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struct
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{
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// note: If destination operand is not fully written (PS0 and PS1) it will be added to the read registers
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sint16 readFPR1;
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sint16 readFPR2;
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sint16 readFPR3;
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sint16 readFPR4;
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sint16 writtenFPR1;
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};
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sint16 fpr[4];
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};
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};
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struct IMLInstruction
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{
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uint8 type;
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@@ -409,4 +438,9 @@ struct IMLInstruction
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associatedPPCAddress = 0;
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}
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void CheckRegisterUsage(IMLUsedRegisters* registersUsed) const;
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void ReplaceGPRRegisterUsageMultiple(sint32 gprRegisterSearched[4], sint32 gprRegisterReplaced[4]);
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void ReplaceFPRRegisterUsageMultiple(sint32 fprRegisterSearched[4], sint32 fprRegisterReplaced[4]);
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void ReplaceFPRRegisterUsage(sint32 fprRegisterSearched, sint32 fprRegisterReplaced);
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};
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@@ -122,17 +122,6 @@ void PPCRecompilerIML_isolateEnterableSegments(ppcImlGenContext_t* ppcImlGenCont
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IMLInstruction* PPCRecompilerIML_getLastInstruction(IMLSegment* imlSegment);
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// IML analyzer
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typedef struct
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{
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uint32 readCRBits;
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uint32 writtenCRBits;
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}PPCRecCRTracking_t;
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bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(IMLSegment* imlSegment);
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bool PPCRecompilerImlAnalyzer_canTypeWriteCR(IMLInstruction* imlInstruction);
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void PPCRecompilerImlAnalyzer_getCRTracking(IMLInstruction* imlInstruction, PPCRecCRTracking_t* crTracking);
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// IML optimizer
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bool PPCRecompiler_reduceNumberOfFPRRegisters(ppcImlGenContext_t* ppcImlGenContext);
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@@ -149,34 +138,3 @@ void PPCRecompilerImm_allocateRegisters(ppcImlGenContext_t* ppcImlGenContext);
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// late optimizations
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void PPCRecompiler_reorderConditionModifyInstructions(ppcImlGenContext_t* ppcImlGenContext);
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typedef struct
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{
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union
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{
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struct
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{
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sint16 readNamedReg1;
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sint16 readNamedReg2;
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sint16 readNamedReg3;
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sint16 writtenNamedReg1;
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};
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sint16 gpr[4]; // 3 read + 1 write
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};
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// FPR
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union
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{
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struct
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{
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// note: If destination operand is not fully written, it will be added as a read FPR as well
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sint16 readFPR1;
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sint16 readFPR2;
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sint16 readFPR3;
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sint16 readFPR4; // usually this is set to the result FPR if only partially overwritten
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sint16 writtenFPR1;
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};
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sint16 fpr[4];
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};
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}PPCImlOptimizerUsedRegisters_t;
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void PPCRecompiler_checkRegisterUsage(ppcImlGenContext_t* ppcImlGenContext, const IMLInstruction* imlInstruction, PPCImlOptimizerUsedRegisters_t* registersUsed);
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@@ -2,8 +2,8 @@
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#include "Cafe/HW/Espresso/Interpreter/PPCInterpreterHelper.h"
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#include "PPCRecompiler.h"
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#include "PPCRecompilerIml.h"
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#include "PPCRecompilerX64.h"
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#include "PPCRecompilerImlRanges.h"
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#include "IML/IML.h"
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bool PPCRecompiler_decodePPCInstruction(ppcImlGenContext_t* ppcImlGenContext);
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uint32 PPCRecompiler_iterateCurrentInstruction(ppcImlGenContext_t* ppcImlGenContext);
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@@ -4277,7 +4277,7 @@ bool PPCRecompiler_generateIntermediateCode(ppcImlGenContext_t& ppcImlGenContext
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if (imlSegment->imlList[imlSegment->imlList.size() - 1].type != PPCREC_IML_TYPE_CJUMP || imlSegment->imlList[imlSegment->imlList.size() - 1].op_conditionalJump.jumpAccordingToSegment)
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continue;
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// exclude non-infinite tight loops
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if (PPCRecompilerImlAnalyzer_isTightFiniteLoop(imlSegment))
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if (IMLAnalyzer_IsTightFiniteLoop(imlSegment))
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continue;
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// potential loop segment found, split this segment into four:
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// P0: This segment checks if the remaining cycles counter is still above zero. If yes, it jumps to segment P2 (it's also the jump destination for other segments)
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@@ -4376,11 +4376,10 @@ bool PPCRecompiler_generateIntermediateCode(ppcImlGenContext_t& ppcImlGenContext
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if(segIt->imlList.size() == 0 )
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continue; // ignore empty segments
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// analyze segment for register usage
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PPCImlOptimizerUsedRegisters_t registersUsed;
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IMLUsedRegisters registersUsed;
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for(sint32 i=0; i<segIt->imlList.size(); i++)
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{
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PPCRecompiler_checkRegisterUsage(&ppcImlGenContext, segIt->imlList.data() + i, ®istersUsed);
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//PPCRecompilerImlGen_findRegisterByMappedName(ppcImlGenContext, registersUsed.readGPR1);
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segIt->imlList[i].CheckRegisterUsage(®istersUsed);
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sint32 accessedTempReg[5];
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// intermediate FPRs
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accessedTempReg[0] = registersUsed.readFPR1;
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File diff suppressed because it is too large
Load Diff
@@ -1,10 +1,10 @@
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#include "./IML/IML.h"
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#include "PPCRecompiler.h"
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#include "PPCRecompilerIml.h"
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#include "PPCRecompilerX64.h"
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#include "PPCRecompilerImlRanges.h"
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void PPCRecompiler_replaceGPRRegisterUsageMultiple(ppcImlGenContext_t* ppcImlGenContext, IMLInstruction* imlInstruction, sint32 gprRegisterSearched[4], sint32 gprRegisterReplaced[4]);
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uint32 recRACurrentIterationIndex = 0;
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uint32 PPCRecRA_getNextIterationIndex()
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@@ -831,8 +831,8 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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// replace registers
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if (index < imlSegment->imlList.size())
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{
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PPCImlOptimizerUsedRegisters_t gprTracking;
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PPCRecompiler_checkRegisterUsage(nullptr, imlSegment->imlList.data() + index, &gprTracking);
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IMLUsedRegisters gprTracking;
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imlSegment->imlList[index].CheckRegisterUsage(&gprTracking);
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sint32 inputGpr[4];
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inputGpr[0] = gprTracking.gpr[0];
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@@ -853,7 +853,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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replaceGpr[f] = virtualReg2PhysReg[virtualRegister];
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cemu_assert_debug(replaceGpr[f] >= 0);
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}
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PPCRecompiler_replaceGPRRegisterUsageMultiple(ppcImlGenContext, imlSegment->imlList.data() + index, inputGpr, replaceGpr);
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imlSegment->imlList[index].ReplaceGPRRegisterUsageMultiple(inputGpr, replaceGpr);
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}
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// next iml instruction
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index++;
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@@ -1014,14 +1014,14 @@ void PPCRecRA_calculateSegmentMinMaxRanges(ppcImlGenContext_t* ppcImlGenContext,
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}
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// scan instructions for usage range
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size_t index = 0;
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PPCImlOptimizerUsedRegisters_t gprTracking;
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IMLUsedRegisters gprTracking;
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while (index < imlSegment->imlList.size())
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{
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// end loop at suffix instruction
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if (imlSegment->imlList[index].IsSuffixInstruction())
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break;
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// get accessed GPRs
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList.data() + index, &gprTracking);
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imlSegment->imlList[index].CheckRegisterUsage(&gprTracking);
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for (sint32 t = 0; t < 4; t++)
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{
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sint32 virtualRegister = gprTracking.gpr[t];
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@@ -1107,14 +1107,14 @@ void PPCRecRA_createSegmentLivenessRanges(ppcImlGenContext_t* ppcImlGenContext,
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}
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// parse instructions and convert to locations
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size_t index = 0;
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PPCImlOptimizerUsedRegisters_t gprTracking;
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IMLUsedRegisters gprTracking;
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while (index < imlSegment->imlList.size())
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{
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// end loop at suffix instruction
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if (imlSegment->imlList[index].IsSuffixInstruction())
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break;
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// get accessed GPRs
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList.data() + index, &gprTracking);
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imlSegment->imlList[index].CheckRegisterUsage(&gprTracking);
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// handle accessed GPR
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for (sint32 t = 0; t < 4; t++)
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{
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