mirror of
https://github.com/izzy2lost/WeeU.git
synced 2026-07-06 00:19:59 -07:00
PPCRec: Use vector for instruction list
This commit is contained in:
@@ -269,9 +269,7 @@ typedef struct _PPCRecImlSegment_t
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uint32 x64Offset{}; // x64 code offset of segment start
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uint32 cycleCount{}; // number of PPC cycles required to execute this segment (roughly)
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// list of intermediate instructions in this segment
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PPCRecImlInstruction_t* imlList{};
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sint32 imlListSize{};
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sint32 imlListCount{};
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std::vector<PPCRecImlInstruction_t> imlList;
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// segment link
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_PPCRecImlSegment_t* nextSegmentBranchNotTaken{}; // this is also the default for segments where there is no branch
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_PPCRecImlSegment_t* nextSegmentBranchTaken{};
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@@ -419,4 +419,4 @@ typedef struct
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};
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}PPCImlOptimizerUsedRegisters_t;
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void PPCRecompiler_checkRegisterUsage(ppcImlGenContext_t* ppcImlGenContext, PPCRecImlInstruction_t* imlInstruction, PPCImlOptimizerUsedRegisters_t* registersUsed);
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void PPCRecompiler_checkRegisterUsage(ppcImlGenContext_t* ppcImlGenContext, const PPCRecImlInstruction_t* imlInstruction, PPCImlOptimizerUsedRegisters_t* registersUsed);
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@@ -13,9 +13,9 @@ bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(PPCRecImlSegment_t* imlSegment)
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if (imlSegment->nextSegmentBranchTaken != imlSegment)
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return false;
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// loops using BDNZ are assumed to always be finite
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for (sint32 t = 0; t < imlSegment->imlListCount; t++)
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for(const PPCRecImlInstruction_t& instIt : imlSegment->imlList)
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{
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if (imlSegment->imlList[t].type == PPCREC_IML_TYPE_R_S32 && imlSegment->imlList[t].operation == PPCREC_IML_OP_SUB && imlSegment->imlList[t].crRegister == 8)
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if (instIt.type == PPCREC_IML_TYPE_R_S32 && instIt.operation == PPCREC_IML_OP_SUB && instIt.crRegister == 8)
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{
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return true;
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}
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@@ -24,11 +24,11 @@ bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(PPCRecImlSegment_t* imlSegment)
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// risky approach, look for ADD/SUB operations and assume that potential overflow means finite (does not include r_r_s32 ADD/SUB)
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// this catches most loops with load-update and store-update instructions, but also those with decrementing counters
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FixedSizeList<sint32, 64, true> list_modifiedRegisters;
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for (sint32 t = 0; t < imlSegment->imlListCount; t++)
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for (const PPCRecImlInstruction_t& instIt : imlSegment->imlList)
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{
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if (imlSegment->imlList[t].type == PPCREC_IML_TYPE_R_S32 && (imlSegment->imlList[t].operation == PPCREC_IML_OP_ADD || imlSegment->imlList[t].operation == PPCREC_IML_OP_SUB) )
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if (instIt.type == PPCREC_IML_TYPE_R_S32 && (instIt.operation == PPCREC_IML_OP_ADD || instIt.operation == PPCREC_IML_OP_SUB) )
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{
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list_modifiedRegisters.addUnique(imlSegment->imlList[t].op_r_immS32.registerIndex);
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list_modifiedRegisters.addUnique(instIt.op_r_immS32.registerIndex);
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}
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}
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if (list_modifiedRegisters.count > 0)
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@@ -36,11 +36,11 @@ bool PPCRecompilerImlAnalyzer_isTightFiniteLoop(PPCRecImlSegment_t* imlSegment)
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// remove all registers from the list that are modified by non-ADD/SUB instructions
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// todo: We should also cover the case where ADD+SUB on the same register cancel the effect out
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PPCImlOptimizerUsedRegisters_t registersUsed;
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for (sint32 t = 0; t < imlSegment->imlListCount; t++)
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for (const PPCRecImlInstruction_t& instIt : imlSegment->imlList)
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{
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if (imlSegment->imlList[t].type == PPCREC_IML_TYPE_R_S32 && (imlSegment->imlList[t].operation == PPCREC_IML_OP_ADD || imlSegment->imlList[t].operation == PPCREC_IML_OP_SUB))
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if (instIt.type == PPCREC_IML_TYPE_R_S32 && (instIt.operation == PPCREC_IML_OP_ADD || instIt.operation == PPCREC_IML_OP_SUB))
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continue;
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList + t, ®istersUsed);
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PPCRecompiler_checkRegisterUsage(nullptr, &instIt, ®istersUsed);
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if(registersUsed.writtenNamedReg1 < 0)
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continue;
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list_modifiedRegisters.remove(registersUsed.writtenNamedReg1);
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -123,7 +123,7 @@ typedef struct
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void PPCRecRA_insertGPRLoadInstruction(PPCRecImlSegment_t* imlSegment, sint32 insertIndex, sint32 registerIndex, sint32 registerName)
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{
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PPCRecompiler_pushBackIMLInstructions(imlSegment, insertIndex, 1);
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList + (insertIndex + 0);
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList.data() + (insertIndex + 0);
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memset(imlInstructionItr, 0x00, sizeof(PPCRecImlInstruction_t));
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imlInstructionItr->type = PPCREC_IML_TYPE_R_NAME;
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imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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@@ -136,10 +136,10 @@ void PPCRecRA_insertGPRLoadInstruction(PPCRecImlSegment_t* imlSegment, sint32 in
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void PPCRecRA_insertGPRLoadInstructions(PPCRecImlSegment_t* imlSegment, sint32 insertIndex, raLoadStoreInfo_t* loadList, sint32 loadCount)
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{
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PPCRecompiler_pushBackIMLInstructions(imlSegment, insertIndex, loadCount);
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memset(imlSegment->imlList + (insertIndex + 0), 0x00, sizeof(PPCRecImlInstruction_t)*loadCount);
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memset(imlSegment->imlList.data() + (insertIndex + 0), 0x00, sizeof(PPCRecImlInstruction_t)*loadCount);
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for (sint32 i = 0; i < loadCount; i++)
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{
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList + (insertIndex + i);
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList.data() + (insertIndex + i);
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imlInstructionItr->type = PPCREC_IML_TYPE_R_NAME;
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imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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imlInstructionItr->op_r_name.registerIndex = (uint8)loadList[i].registerIndex;
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@@ -152,7 +152,7 @@ void PPCRecRA_insertGPRLoadInstructions(PPCRecImlSegment_t* imlSegment, sint32 i
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void PPCRecRA_insertGPRStoreInstruction(PPCRecImlSegment_t* imlSegment, sint32 insertIndex, sint32 registerIndex, sint32 registerName)
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{
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PPCRecompiler_pushBackIMLInstructions(imlSegment, insertIndex, 1);
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList + (insertIndex + 0);
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList.data() + (insertIndex + 0);
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memset(imlInstructionItr, 0x00, sizeof(PPCRecImlInstruction_t));
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imlInstructionItr->type = PPCREC_IML_TYPE_NAME_R;
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imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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@@ -165,10 +165,10 @@ void PPCRecRA_insertGPRStoreInstruction(PPCRecImlSegment_t* imlSegment, sint32 i
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void PPCRecRA_insertGPRStoreInstructions(PPCRecImlSegment_t* imlSegment, sint32 insertIndex, raLoadStoreInfo_t* storeList, sint32 storeCount)
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{
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PPCRecompiler_pushBackIMLInstructions(imlSegment, insertIndex, storeCount);
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memset(imlSegment->imlList + (insertIndex + 0), 0x00, sizeof(PPCRecImlInstruction_t)*storeCount);
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memset(imlSegment->imlList.data() + (insertIndex + 0), 0x00, sizeof(PPCRecImlInstruction_t)*storeCount);
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for (sint32 i = 0; i < storeCount; i++)
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{
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList + (insertIndex + i);
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PPCRecImlInstruction_t* imlInstructionItr = imlSegment->imlList.data() + (insertIndex + i);
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memset(imlInstructionItr, 0x00, sizeof(PPCRecImlInstruction_t));
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imlInstructionItr->type = PPCREC_IML_TYPE_NAME_R;
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imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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@@ -767,7 +767,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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raLiveRangeInfo_t liveInfo;
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liveInfo.liveRangesCount = 0;
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sint32 index = 0;
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sint32 suffixInstructionCount = (imlSegment->imlListCount > 0 && PPCRecompiler_isSuffixInstruction(imlSegment->imlList + imlSegment->imlListCount - 1)) ? 1 : 0;
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sint32 suffixInstructionCount = (imlSegment->imlList.size() > 0 && PPCRecompiler_isSuffixInstruction(imlSegment->imlList.data() + imlSegment->imlList.size() - 1)) ? 1 : 0;
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// load register ranges that are supplied from previous segments
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raLivenessSubrange_t* subrangeItr = imlSegment->raInfo.linkedList_allSubranges;
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//for (auto& subrange : imlSegment->raInfo.list_subranges)
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@@ -793,7 +793,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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subrangeItr = subrangeItr->link_segmentSubrangesGPR.next;
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}
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// process instructions
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while(index < imlSegment->imlListCount+1)
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while(index < imlSegment->imlList.size() + 1)
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{
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// expire ranges
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for (sint32 f = 0; f < liveInfo.liveRangesCount; f++)
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@@ -808,7 +808,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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// store GPR
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if (liverange->hasStore)
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{
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PPCRecRA_insertGPRStoreInstruction(imlSegment, std::min(index, imlSegment->imlListCount - suffixInstructionCount), liverange->range->physicalRegister, liverange->range->name);
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PPCRecRA_insertGPRStoreInstruction(imlSegment, std::min<sint32>(index, imlSegment->imlList.size() - suffixInstructionCount), liverange->range->physicalRegister, liverange->range->name);
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index++;
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}
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// remove entry
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@@ -828,7 +828,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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// load GPR
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if (subrangeItr->_noLoad == false)
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{
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PPCRecRA_insertGPRLoadInstruction(imlSegment, std::min(index, imlSegment->imlListCount - suffixInstructionCount), subrangeItr->range->physicalRegister, subrangeItr->range->name);
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PPCRecRA_insertGPRLoadInstruction(imlSegment, std::min<sint32>(index, imlSegment->imlList.size() - suffixInstructionCount), subrangeItr->range->physicalRegister, subrangeItr->range->name);
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index++;
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subrangeItr->start.index--;
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}
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@@ -839,10 +839,10 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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subrangeItr = subrangeItr->link_segmentSubrangesGPR.next;
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}
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// replace registers
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if (index < imlSegment->imlListCount)
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if (index < imlSegment->imlList.size())
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{
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PPCImlOptimizerUsedRegisters_t gprTracking;
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList + index, &gprTracking);
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PPCRecompiler_checkRegisterUsage(nullptr, imlSegment->imlList.data() + index, &gprTracking);
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sint32 inputGpr[4];
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inputGpr[0] = gprTracking.gpr[0];
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@@ -863,7 +863,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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replaceGpr[f] = virtualReg2PhysReg[virtualRegister];
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cemu_assert_debug(replaceGpr[f] >= 0);
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}
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PPCRecompiler_replaceGPRRegisterUsageMultiple(ppcImlGenContext, imlSegment->imlList + index, inputGpr, replaceGpr);
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PPCRecompiler_replaceGPRRegisterUsageMultiple(ppcImlGenContext, imlSegment->imlList.data() + index, inputGpr, replaceGpr);
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}
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// next iml instruction
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index++;
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@@ -898,7 +898,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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}
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if (storeLoadListLength > 0)
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{
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PPCRecRA_insertGPRStoreInstructions(imlSegment, imlSegment->imlListCount - suffixInstructionCount, loadStoreList, storeLoadListLength);
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PPCRecRA_insertGPRStoreInstructions(imlSegment, imlSegment->imlList.size() - suffixInstructionCount, loadStoreList, storeLoadListLength);
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}
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// load subranges for next segments
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subrangeItr = imlSegment->raInfo.linkedList_allSubranges;
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@@ -925,7 +925,7 @@ void PPCRecRA_generateSegmentInstructions(ppcImlGenContext_t* ppcImlGenContext,
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}
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if (storeLoadListLength > 0)
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{
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PPCRecRA_insertGPRLoadInstructions(imlSegment, imlSegment->imlListCount - suffixInstructionCount, loadStoreList, storeLoadListLength);
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PPCRecRA_insertGPRLoadInstructions(imlSegment, imlSegment->imlList.size() - suffixInstructionCount, loadStoreList, storeLoadListLength);
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}
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}
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@@ -998,7 +998,6 @@ void PPCRecompilerImm_allocateRegisters(ppcImlGenContext_t* ppcImlGenContext)
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ppcImlGenContext->raInfo.list_ranges = std::vector<raLivenessRange_t*>();
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// calculate liveness
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PPCRecRA_calculateLivenessRangesV2(ppcImlGenContext);
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PPCRecRA_processFlowAndCalculateLivenessRangesV2(ppcImlGenContext);
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@@ -1024,23 +1023,23 @@ void PPCRecRA_calculateSegmentMinMaxRanges(ppcImlGenContext_t* ppcImlGenContext,
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imlSegment->raDistances.reg[i].usageEnd = INT_MIN;
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}
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// scan instructions for usage range
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sint32 index = 0;
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size_t index = 0;
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PPCImlOptimizerUsedRegisters_t gprTracking;
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while (index < imlSegment->imlListCount)
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while (index < imlSegment->imlList.size())
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{
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// end loop at suffix instruction
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if (PPCRecompiler_isSuffixInstruction(imlSegment->imlList + index))
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if (PPCRecompiler_isSuffixInstruction(imlSegment->imlList.data() + index))
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break;
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// get accessed GPRs
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList + index, &gprTracking);
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList.data() + index, &gprTracking);
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for (sint32 t = 0; t < 4; t++)
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{
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sint32 virtualRegister = gprTracking.gpr[t];
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if (virtualRegister < 0)
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continue;
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cemu_assert_debug(virtualRegister < PPC_REC_MAX_VIRTUAL_GPR);
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imlSegment->raDistances.reg[virtualRegister].usageStart = std::min(imlSegment->raDistances.reg[virtualRegister].usageStart, index); // index before/at instruction
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imlSegment->raDistances.reg[virtualRegister].usageEnd = std::max(imlSegment->raDistances.reg[virtualRegister].usageEnd, index + 1); // index after instruction
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imlSegment->raDistances.reg[virtualRegister].usageStart = std::min<sint32>(imlSegment->raDistances.reg[virtualRegister].usageStart, index); // index before/at instruction
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imlSegment->raDistances.reg[virtualRegister].usageEnd = std::max<sint32>(imlSegment->raDistances.reg[virtualRegister].usageEnd, index + 1); // index after instruction
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}
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// next instruction
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index++;
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@@ -1117,15 +1116,15 @@ void PPCRecRA_createSegmentLivenessRanges(ppcImlGenContext_t* ppcImlGenContext,
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#endif
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}
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// parse instructions and convert to locations
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sint32 index = 0;
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size_t index = 0;
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PPCImlOptimizerUsedRegisters_t gprTracking;
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while (index < imlSegment->imlListCount)
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while (index < imlSegment->imlList.size())
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{
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// end loop at suffix instruction
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if (PPCRecompiler_isSuffixInstruction(imlSegment->imlList + index))
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if (PPCRecompiler_isSuffixInstruction(imlSegment->imlList.data() + index))
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break;
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// get accessed GPRs
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList + index, &gprTracking);
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PPCRecompiler_checkRegisterUsage(NULL, imlSegment->imlList.data() + index, &gprTracking);
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// handle accessed GPR
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for (sint32 t = 0; t < 4; t++)
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{
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@@ -1136,9 +1135,9 @@ void PPCRecRA_createSegmentLivenessRanges(ppcImlGenContext_t* ppcImlGenContext,
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// add location
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PPCRecRA_updateOrAddSubrangeLocation(vGPR2Subrange[virtualRegister], index, isWrite == false, isWrite);
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#ifdef CEMU_DEBUG_ASSERT
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if (index < vGPR2Subrange[virtualRegister]->start.index)
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if ((sint32)index < vGPR2Subrange[virtualRegister]->start.index)
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assert_dbg();
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if (index + 1 > vGPR2Subrange[virtualRegister]->end.index)
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if ((sint32)index + 1 > vGPR2Subrange[virtualRegister]->end.index)
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assert_dbg();
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#endif
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}
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@@ -1205,7 +1204,7 @@ void _PPCRecRA_checkAndTryExtendRange(ppcImlGenContext_t* ppcImlGenContext, PPCR
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if (currentSegment->raDistances.reg[vGPR].usageStart == INT_MAX)
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{
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// measure distance to end of segment
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distanceLeft -= currentSegment->imlListCount;
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distanceLeft -= (sint32)currentSegment->imlList.size();
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if (distanceLeft > 0)
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{
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if (currentSegment->nextSegmentBranchNotTaken)
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@@ -1220,7 +1219,7 @@ void _PPCRecRA_checkAndTryExtendRange(ppcImlGenContext_t* ppcImlGenContext, PPCR
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// measure distance to range
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if (currentSegment->raDistances.reg[vGPR].usageStart == RA_INTER_RANGE_END)
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{
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if (distanceLeft < currentSegment->imlListCount)
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if (distanceLeft < (sint32)currentSegment->imlList.size())
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return; // range too far away
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}
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else if (currentSegment->raDistances.reg[vGPR].usageStart != RA_INTER_RANGE_START && currentSegment->raDistances.reg[vGPR].usageStart > distanceLeft)
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@@ -1243,7 +1242,7 @@ void PPCRecRA_checkAndTryExtendRange(ppcImlGenContext_t* ppcImlGenContext, PPCRe
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if (currentSegment->raDistances.reg[vGPR].usageEnd == RA_INTER_RANGE_END)
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instructionsUntilEndOfSeg = 0;
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else
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instructionsUntilEndOfSeg = currentSegment->imlListCount - currentSegment->raDistances.reg[vGPR].usageEnd;
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instructionsUntilEndOfSeg = (sint32)currentSegment->imlList.size() - currentSegment->raDistances.reg[vGPR].usageEnd;
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#ifdef CEMU_DEBUG_ASSERT
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if (instructionsUntilEndOfSeg < 0)
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@@ -102,7 +102,7 @@ void PPCRecompilerIML_linkSegments(ppcImlGenContext_t* ppcImlGenContext)
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bool isLastSegment = (s+1)>=ppcImlGenContext->segmentList2.size();
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PPCRecImlSegment_t* nextSegment = isLastSegment?nullptr:ppcImlGenContext->segmentList2[s+1];
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// handle empty segment
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if( imlSegment->imlListCount == 0 )
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if( imlSegment->imlList.empty())
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{
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if (isLastSegment == false)
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PPCRecompilerIml_setLinkBranchNotTaken(imlSegment, ppcImlGenContext->segmentList2[s+1]); // continue execution to next segment
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@@ -111,7 +111,7 @@ void PPCRecompilerIML_linkSegments(ppcImlGenContext_t* ppcImlGenContext)
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continue;
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}
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// check last instruction of segment
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PPCRecImlInstruction_t* imlInstruction = imlSegment->imlList+(imlSegment->imlListCount-1);
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PPCRecImlInstruction_t* imlInstruction = imlSegment->imlList.data() + (imlSegment->imlList.size() - 1);
|
||||
if( imlInstruction->type == PPCREC_IML_TYPE_CJUMP || imlInstruction->type == PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK )
|
||||
{
|
||||
// find destination segment by ppc jump address
|
||||
@@ -135,9 +135,7 @@ void PPCRecompilerIML_linkSegments(ppcImlGenContext_t* ppcImlGenContext)
|
||||
else
|
||||
{
|
||||
// all other instruction types do not branch
|
||||
//imlSegment->nextSegment[0] = nextSegment;
|
||||
PPCRecompilerIml_setLinkBranchNotTaken(imlSegment, nextSegment);
|
||||
//imlSegment->nextSegmentIsUncertain = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -157,7 +155,7 @@ void PPCRecompilerIML_isolateEnterableSegments(ppcImlGenContext_t* ppcImlGenCont
|
||||
entrySegment->enterPPCAddress = imlSegment->enterPPCAddress;
|
||||
// create jump instruction
|
||||
PPCRecompiler_pushBackIMLInstructions(entrySegment, 0, 1);
|
||||
PPCRecompilerImlGen_generateNewInstruction_jumpSegment(ppcImlGenContext, entrySegment->imlList + 0);
|
||||
PPCRecompilerImlGen_generateNewInstruction_jumpSegment(ppcImlGenContext, entrySegment->imlList.data() + 0);
|
||||
PPCRecompilerIml_setLinkBranchTaken(entrySegment, imlSegment);
|
||||
// remove enterable flag from original segment
|
||||
imlSegment->isEnterable = false;
|
||||
@@ -168,7 +166,7 @@ void PPCRecompilerIML_isolateEnterableSegments(ppcImlGenContext_t* ppcImlGenCont
|
||||
|
||||
PPCRecImlInstruction_t* PPCRecompilerIML_getLastInstruction(PPCRecImlSegment_t* imlSegment)
|
||||
{
|
||||
if (imlSegment->imlListCount == 0)
|
||||
if (imlSegment->imlList.empty())
|
||||
return nullptr;
|
||||
return imlSegment->imlList + (imlSegment->imlListCount - 1);
|
||||
return imlSegment->imlList.data() + (imlSegment->imlList.size() - 1);
|
||||
}
|
||||
|
||||
@@ -2302,9 +2302,9 @@ bool PPCRecompiler_generateX64Code(PPCRecFunction_t* PPCRecFunction, ppcImlGenCo
|
||||
for (PPCRecImlSegment_t* segIt : ppcImlGenContext->segmentList2)
|
||||
{
|
||||
segIt->x64Offset = x64GenContext.codeBufferIndex;
|
||||
for(sint32 i=0; i<segIt->imlListCount; i++)
|
||||
for(size_t i=0; i<segIt->imlList.size(); i++)
|
||||
{
|
||||
PPCRecImlInstruction_t* imlInstruction = segIt->imlList+i;
|
||||
PPCRecImlInstruction_t* imlInstruction = segIt->imlList.data() + i;
|
||||
|
||||
if( imlInstruction->type == PPCREC_IML_TYPE_R_NAME )
|
||||
{
|
||||
|
||||
Reference in New Issue
Block a user