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303 lines
9.4 KiB
Plaintext
303 lines
9.4 KiB
Plaintext
// Copyright Epic Games, Inc. All Rights Reserved.
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/*=============================================================================
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ComputeShaderOutputCommon.ush: To allow CS input/output passed into functions
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through a single struct, allowing for a more readable code
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(less #ifdefs, reducing the boolean hell)
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=============================================================================*/
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COMPILER_ALLOW_CS_DERIVATIVES
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#if IS_NANITE_PASS
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MAX_OCCUPANCY
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#endif
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#include "ShaderOutputCommon.ush"
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#include "GammaCorrectionCommon.ush"
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#include "VariableRateShading/VRSShadingRateCommon.ush"
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#include "Nanite/NaniteShadeCommon.ush"
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#if WORKGRAPH_NODE
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#include "ShaderBundleWorkGraphCommon.ush"
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#endif
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#include "/Engine/Public/RootConstants.ush"
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uint GetShadingBin() { return GetRootConstant0(); }
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uint GetQuadBinning() { return GetRootConstant1(); }
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uint GetHighPrecision() { return GetRootConstant2(); }
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uint GetDataByteOffset() { return GetRootConstant3(); }
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#if SUBSTRATE_OPAQUE_DEFERRED
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#if SUBSTRATE_BASE_PASS_MRT_OUTPUT_COUNT != 3
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#error Substrate SUBSTRATE_BASE_PASS_MRT_OUTPUT_COUNT has been updated but not the uint MRTs
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#endif
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#if PIXELSHADEROUTPUT_MRT4
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#error Substrate cannot map to such a case
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#endif
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#if SUBSTRATE_FIRST_MRT_INDEX > 4
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#error Substrate doesn't currently handle more than 4 base GBuffer MRTs
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#endif
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#endif
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FPixelShaderOut ShadePixel(const float2 SVPositionXY, uint QuadIndex, uint PixelWriteMask)
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{
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// Note: Driven by bHighPrecisionGBuffers in GBufferInfo.cpp
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const bool bHighPrecision = GetHighPrecision() != 0u;
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#if PIXELSHADEROUTPUT_INTERPOLANTS || PIXELSHADEROUTPUT_BASEPASS
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#if IS_NANITE_PASS
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FNaniteFullscreenVSToPS NaniteInterpolants = (FNaniteFullscreenVSToPS)0;
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NaniteInterpolants.TileIndex = QuadIndex;
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#else
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FVertexFactoryInterpolantsVSToPS Interpolants = (FVertexFactoryInterpolantsVSToPS)0;
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#endif
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#endif
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const float4 SvPosition = float4(SVPositionXY, 0.0f, 1.0f);
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#if IS_NANITE_PASS && (PIXELSHADEROUTPUT_INTERPOLANTS || PIXELSHADEROUTPUT_BASEPASS)
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FVertexFactoryInterpolantsVSToPS Interpolants = (FVertexFactoryInterpolantsVSToPS)0;
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Interpolants.ViewIndex = NaniteInterpolants.ViewIndex; // TODO: NANITE_MATERIAL_MULTIVIEW
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#if INSTANCED_STEREO
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// Revisit if we need to support > 1 instanced view or non side-by-side views
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Interpolants.EyeIndex = (SvPosition.x >= (View.ViewRectMin.x + View.ViewSizeAndInvSize.x)) ? 1 : 0;
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#endif
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#endif
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FPixelShaderIn PixelShaderIn = (FPixelShaderIn)0;
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FPixelShaderOut PixelShaderOut = (FPixelShaderOut)0;
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PixelShaderIn.SvPosition = SvPosition;
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// Nanite does not support OPTIONAL_IsFrontFace, Instead, Nanite determines this in GetMaterialPixelParameters().
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PixelShaderIn.bIsFrontFace = false;
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#if PIXELSHADEROUTPUT_BASEPASS
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FBasePassInterpolantsVSToPS BasePassInterpolants = (FBasePassInterpolantsVSToPS)0;
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FPixelShaderInOut_MainPS(Interpolants, BasePassInterpolants, PixelShaderIn, PixelShaderOut, PixelWriteMask != 0);
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#endif
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if (!bHighPrecision)
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{
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PixelShaderOut.MRT[3] = float4(LinearToSrgb(PixelShaderOut.MRT[3].rgb), PixelShaderOut.MRT[3].a); // BaseColor is sRGB
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}
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return PixelShaderOut;
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}
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#define CONDITIONAL_EXPORT 1
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#if SUBSTRATE_OPAQUE_DEFERRED
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void ConditionalExport(bool Forced, uint2 PixelPos, FPixelShaderOut ShadedPixel, uint Index)
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{
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#if CONDITIONAL_EXPORT
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BRANCH
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if (Forced || ShadedPixel.SubstrateOutput[Index] != 0)
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#endif
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{
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ComputeShadingOutputs.OutTargets[uint3(PixelPos, Index)] = ShadedPixel.SubstrateOutput[Index];
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}
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}
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void ConditionalExport(bool Forced, uint2 PixelPos, SUBSTRATE_TOP_LAYER_TYPE TopLayerData)
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{
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#if CONDITIONAL_EXPORT
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BRANCH
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if (Forced || any(TopLayerData != 0))
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#endif
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{
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ComputeShadingOutputs.OutTopLayerTarget[PixelPos] = TopLayerData;
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}
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}
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#endif
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void ExportPixel(const uint2 PixelPos, FPixelShaderOut ShadedPixel)
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{
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#if PIXELSHADEROUTPUT_COVERAGE || PIXELSHADEROUTPUT_A2C
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// TODO: OutCoverage = PixelShaderOut.Coverage;
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#endif
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#if OUTPUT_PIXEL_DEPTH_OFFSET
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// TODO: OutDepth = PixelShaderOut.Depth;
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#endif
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#if PIXELSHADEROUTPUT_MRT0
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ComputeShadingOutputs.OutTarget0[PixelPos] = ShadedPixel.MRT[0];
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#endif
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#if PIXELSHADEROUTPUT_MRT1
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ComputeShadingOutputs.OutTarget1[PixelPos] = ShadedPixel.MRT[1];
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#endif
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#if PIXELSHADEROUTPUT_MRT2
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ComputeShadingOutputs.OutTarget2[PixelPos] = ShadedPixel.MRT[2];
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#endif
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#if PIXELSHADEROUTPUT_MRT3
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ComputeShadingOutputs.OutTarget3[PixelPos] = ShadedPixel.MRT[3];
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#endif
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#if SUBSTRATE_OPAQUE_DEFERRED
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// In this case, here is the gbuffer pattern
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// MRT0 is pixel color
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// MRT1 is velocity if enabled or precomputed shadow if velocity if disabled and precomputed shadow enabled
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// MRT2 is precomputed shadow if both velocity and prec shadow are enabled.
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// After, Substrate top layer data appended. Remaining Substrate outputs are in the 2d array UAV
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ConditionalExport(true, PixelPos, ShadedPixel, 0);
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ConditionalExport(false, PixelPos, ShadedPixel, 1);
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ConditionalExport(false, PixelPos, ShadedPixel, 2);
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ConditionalExport(true, PixelPos, ShadedPixel.SubstrateTopLayerData);
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#else // SUBSTRATE_OPAQUE_DEFERRED
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#if PIXELSHADEROUTPUT_MRT4
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ComputeShadingOutputs.OutTarget4[PixelPos] = ShadedPixel.MRT[4];
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#endif
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#if PIXELSHADEROUTPUT_MRT5
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ComputeShadingOutputs.OutTarget5[PixelPos] = ShadedPixel.MRT[5];
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#endif
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#if PIXELSHADEROUTPUT_MRT6
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ComputeShadingOutputs.OutTarget6[PixelPos] = ShadedPixel.MRT[6];
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#endif
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#if PIXELSHADEROUTPUT_MRT7
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ComputeShadingOutputs.OutTarget7[PixelPos] = ShadedPixel.MRT[7];
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#endif
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#endif // SUBSTRATE_OPAQUE_DEFERRED
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}
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#define VIS_HELPER_LANES 0
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void ProcessPixel(uint ShadingBin, const uint2 PixelPos, const float2 SVPositionXY, uint QuadIndex, uint DispatchIndex, uint PixelWriteMask, uint HelperLaneCount)
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{
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// All lanes shade (regardless of export - so ddx/ddy are valid)
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FPixelShaderOut ShadedPixel = ShadePixel(SVPositionXY, QuadIndex, PixelWriteMask);
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#if VIS_HELPER_LANES
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ShadedPixel.MRT[3].rgb = ColorMapTurbo(float(HelperLaneCount) / 4.0f);
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#elif 0
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ShadedPixel.MRT[3].rgb = ColorMapTurbo(50.0);
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#elif 0
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// Coherency vis
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float R = (DispatchIndex & 0xFFu) / 255.0f;
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float G = ((DispatchIndex & 0xFF00u) >> 8u) / 255.0f;
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float B = ((DispatchIndex & 0xFF0000u) >> 16u) / 255.0f;
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ShadedPixel.MRT[3].rgb = float3(R, G, B);
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#elif 0
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ShadedPixel.MRT[3].rgb = IntToColor(ShadingBin);
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#elif 0
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ShadedPixel.MRT[3].rgb = IntToColor(QuadIndex);
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#elif 0
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ShadedPixel.MRT[3].rgb = VisualizeShadingRate(ShadingRate).rgb;
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#endif
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// Disable helper lanes from final export
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BRANCH
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if (PixelWriteMask & 1u)
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{
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ExportPixel(PixelPos, ShadedPixel);
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}
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BRANCH
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if (PixelWriteMask & 2u) // Copy H
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{
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ExportPixel(PixelPos + uint2(1, 0), ShadedPixel);
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}
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BRANCH
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if (PixelWriteMask & 4u) // Copy V
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{
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ExportPixel(PixelPos + uint2(0, 1), ShadedPixel);
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}
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BRANCH
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if (PixelWriteMask & 8u) // Copy D
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{
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ExportPixel(PixelPos + uint2(1, 1), ShadedPixel);
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}
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}
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#if WORKGRAPH_NODE
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[Shader("node")]
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[NodeLaunch("broadcasting")]
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[NodeMaxDispatchGrid(65535,1,1)]
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#endif
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[numthreads(COMPUTE_MATERIAL_GROUP_SIZE, 1, 1)]
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void MainCS(
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uint ThreadIndex : SV_GroupIndex,
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uint GroupID : SV_GroupID
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#if WORKGRAPH_NODE
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, DispatchNodeInputRecord<FShaderBundleNodeRecord> InputRecord
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#endif
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)
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{
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const uint ShadingBin = GetShadingBin();
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const bool bQuadBinning = GetQuadBinning() != 0u;
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const uint DataByteOffset = GetDataByteOffset();
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const uint PixelIndex = (GroupID * COMPUTE_MATERIAL_GROUP_SIZE) + ThreadIndex;
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const uint3 ShadingBinMeta = NaniteShading.ShadingBinData.Load3(ShadingBin * NANITE_SHADING_BIN_META_BYTES);
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const uint ElementCount = ShadingBinMeta.x;
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const uint ElementIndex = bQuadBinning ? (PixelIndex >> 2) : PixelIndex;
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BRANCH
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if (ElementIndex >= ElementCount)
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{
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return;
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}
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uint2 PixelPos;
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uint2 VRSShift;
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uint PixelWriteMask;
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uint HelperLaneCount;
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BRANCH
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if (bQuadBinning)
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{
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const uint2 PackedElement = NaniteShading.ShadingBinData.Load2(DataByteOffset + (ShadingBinMeta.z * 4 + ElementIndex * 8));
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const uint CornerIndex = (ThreadIndex & 3u);
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const uint2 TopLeft = uint2(BitFieldExtractU32(PackedElement.x, 14, 0), BitFieldExtractU32(PackedElement.x, 14, 14));
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VRSShift = uint2(BitFieldExtractU32(PackedElement.x, 1, 28), BitFieldExtractU32(PackedElement.x, 1, 29));
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PixelWriteMask = BitFieldExtractU32(PackedElement.y, 4, CornerIndex * 4u);
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PixelPos = TopLeft + (uint2(CornerIndex & 1u, CornerIndex >> 1u) << VRSShift);
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uint NumActiveLanes = ((PackedElement.y & 0xF) != 0) + ((PackedElement.y & 0xF0) != 0) + ((PackedElement.y & 0xF00) != 0) + ((PackedElement.y & 0xF000) != 0);
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HelperLaneCount = (VIS_HELPER_LANES && bQuadBinning) ? (4u - NumActiveLanes) : 0u;
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}
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else
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{
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const uint PackedElement= NaniteShading.ShadingBinData.Load(DataByteOffset + (ShadingBinMeta.z * 4 + ElementIndex * 4));
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PixelPos = uint2(BitFieldExtractU32(PackedElement, 13, 0), BitFieldExtractU32(PackedElement, 13, 13));
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VRSShift = uint2(BitFieldExtractU32(PackedElement, 1, 26), BitFieldExtractU32(PackedElement, 1, 27));
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PixelWriteMask = PackedElement >> 28;
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HelperLaneCount = 0;
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}
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const float2 SVPositionXY = PixelPos + ((1u << VRSShift) * 0.5f);
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#if WORKGRAPH_NODE
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// Fix for GPU hang. Without this a lack of out of bounds checking in Work Graph shaders causes out of bounds access of VisBuffer.
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// Note that derivatives can be incorrect on odd edge pixels, and VRS edge pixels may get rejected.
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// But that's also true in general for the standard compute path.
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BRANCH
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if (any(SVPositionXY > float2(View.ViewRectMinAndSize.xy + View.ViewRectMinAndSize.zw)))
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{
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return;
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}
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#endif
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ProcessPixel(ShadingBin, PixelPos, SVPositionXY, ElementIndex, PixelIndex, PixelWriteMask, HelperLaneCount);
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}
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