Files
Simon Tovey b94c834c78 Fixed assert in NDC read buffer access due to mis-matched pre/post stage.(UE-227619)
Fixed Sim Cache writes for CPU and engine tests reliant on it. (GPU sim cache write will have to wait given current timing) (UE-225994)

Fixed shader error due to redundant defaulting shader code. (UE-227814)

Fixed editor interactions with NDC assets (UE-227810)
- Inserting into variables array breaks existing entries
- Undo/Redo doesn't work in many cases
- Edits to NDC assets would not take effect for running systems until GC or re-init.

Made GPU/CPU Reads and Writes behave consistently in response to missing NDC data or OOB access. (UE-227886)
- Missing data returns defaulted values. (previously could be uninitialized)
- Valid params are correctly read/written even if there are missing params. Previously one missing parameter could prevent other access functioning.
- Overall success returns false if there are any missing params or access is OOB.


#jira UE-227619, UE-225994, UE-227814, UE-227810, UE-227886
#rb Stu.McKenna
#lockdown marc.audy

[CL 37203014 by Simon Tovey in 5.5 branch]
2024-10-16 17:09:35 -04:00
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