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Android project - Change stack x86(xPUSH) => arm64(armAsm->Push)

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This commit is contained in:
k2154
2025-07-21 01:19:02 +09:00
parent e5ce561449
commit ca2ac82c83
5 changed files with 91 additions and 108 deletions
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app/src/main/cpp/common/emitter/x86types.h
+1
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@@ -27,6 +27,7 @@ extern thread_local XMMSSEType g_xmmtypes[iREGCNT_XMM];
#if defined(__ANDROID__)
static const int wordsize = sizeof(sptr);
static constexpr int SHADOW_STACK_SIZE = 0;
extern const a64::VRegister
xmm0, xmm1, xmm2, xmm3,
app/src/main/cpp/pcsx2/x86/iR3000A.cpp
+2 -4
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@@ -938,8 +938,7 @@ void recResetIOP()
DevCon.WriteLn("iR3000A Recompiler reset.");
// xSetPtr(SysMemory::GetIOPRec());
// armSetAsmPtr(SysMemory::GetIOPRec(), __pagesize, nullptr);
armSetAsmPtr(SysMemory::GetIOPRec(), SysMemory::GetIOPRecEnd() - SysMemory::GetIOPRec(), nullptr);
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armStartBlock();
_DynGen_Dispatchers();
@@ -1670,7 +1669,6 @@ static void PreBlockCheck(u32 blockpc)
}
#endif
int kktt002 = 0;
static void iopRecRecompile(const u32 startpc)
{
u32 i;
@@ -1704,7 +1702,7 @@ static void iopRecRecompile(const u32 startpc)
}
// xSetPtr(recPtr);
armSetAsmPtr(recPtr, SysMemory::GetIOPRecEnd() - recPtr, armConstantPool);
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
// recPtr = xGetAlignedCallTarget();
recPtr = armStartBlock();
app/src/main/cpp/pcsx2/x86/ix86-32/iR5900.cpp
+1 -2
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@@ -653,8 +653,7 @@ static void recResetRaw()
EE::Profiler.Reset();
// xSetPtr(SysMemory::GetEERec());
// armSetAsmPtr(SysMemory::GetEERec(), __pagesize, nullptr);
armSetAsmPtr(SysMemory::GetEERec(), recPtrEnd - SysMemory::GetEERec(), nullptr);
armSetAsmPtr(recPtr, recPtrEnd - recPtr, nullptr);
armStartBlock();
_DynGen_Dispatchers();
app/src/main/cpp/pcsx2/x86/microVU_Execute.inl
+76 -87
View File
@@ -195,94 +195,83 @@ static void mVUGenerateWaitMTVU(mV)
{
mVU.waitMTVU = armStartBlock();
armBeginStackFrame();
armEmitCall(reinterpret_cast<void *>(mVUwaitMTVU));
armEndStackFrame();
int i, num_xmms = 0, num_gprs = 0;
// int num_xmms = 0, num_gprs = 0;
//
// a64::CPURegList regListX1(a64::CPURegister::RegisterType::kRegister, a64::kXRegSize, 0);
// for (uint i = 0; i < static_cast<int>(iREGCNT_GPR); i++)
// {
// if (!armIsCallerSaved(i) || i == 4)
// continue;
//
// // T1 often contains the address we're loading when waiting for VU1.
// // T2 isn't used until afterwards, so don't bother saving it.
// if (i == gprT2.GetCode())
// continue;
//
//// xPUSH(xRegister64(i));
// regListX1.Combine(a64::XRegister(i));
// num_gprs++;
// }
// armAsm->PushCPURegList(regListX1);
//
// for (int i = 0; i < static_cast<int>(iREGCNT_XMM); i++)
// {
// if (!armIsCallerSavedXmm(i))
// continue;
//
// num_xmms++;
// }
//
// // We need 16 byte alignment on the stack.
// // Since the stack is unaligned at entry to this function, we add 8 when it's even, not odd.
// const int stack_size = (num_xmms * sizeof(u128)) + ((~num_gprs & 1) * sizeof(u128)) + SHADOW_STACK_SIZE;
// int stack_offset = SHADOW_STACK_SIZE;
//
// if (stack_size > 0)
// {
//// xSUB(rsp, stack_size);
// armAsm->Sub(a64::sp, a64::sp, stack_size);
// for (int i = 0; i < static_cast<int>(iREGCNT_XMM); i++)
// {
// if (!armIsCallerSavedXmm(i))
// continue;
//
//// xMOVAPS(ptr128[rsp + stack_offset], xRegisterSSE(i));
// armAsm->Str(a64::QRegister(i).Q(), a64::MemOperand(a64::sp, stack_offset));
// stack_offset += sizeof(u128);
// }
// }
//
////// xFastCall((void*)mVUwaitMTVU);
// const a64::Register old_stack_pointer = armAsm->StackPointer();
// armAsm->SetStackPointer(a64::sp);
// armAsm->Str(a64::lr, a64::MemOperand(a64::sp, 8));
//
// armAsm->Mov(RXVIXLSCRATCH, reinterpret_cast<intptr_t>(mVUwaitMTVU));
// armAsm->Blr(RXVIXLSCRATCH);
//
// armAsm->Ldr(a64::lr, a64::MemOperand(a64::sp, 8));
// armAsm->SetStackPointer(old_stack_pointer);
//
// stack_offset = (num_xmms - 1) * sizeof(u128) + SHADOW_STACK_SIZE;
// for (int i = static_cast<int>(iREGCNT_XMM - 1); i >= 0; i--)
// {
// if (!armIsCallerSavedXmm(i))
// continue;
//
//// xMOVAPS(xRegisterSSE(i), ptr128[rsp + stack_offset]);
// armAsm->Ldr(a64::QRegister(i).Q(), a64::MemOperand(a64::sp, stack_offset));
// stack_offset -= sizeof(u128);
// }
//// xADD(rsp, stack_size);
// armAsm->Add(a64::sp, a64::sp, stack_size);
//
// a64::CPURegList regListX2(a64::CPURegister::RegisterType::kRegister, a64::kXRegSize, 0);
// for (int i = static_cast<int>(iREGCNT_GPR - 1); i >= 0; i--)
// {
// if (!armIsCallerSaved(i) || i == 4)
// continue;
//
// if (i == gprT2.GetCode())
// continue;
//
//// xPOP(xRegister64(i));
// regListX2.Combine(a64::XRegister(i));
// }
// armAsm->PopCPURegList(regListX2);
for (i = 0; i < static_cast<int>(iREGCNT_GPR); ++i)
{
if (!armIsCallerSaved(i) || i == 4)
continue;
// T1 often contains the address we're loading when waiting for VU1.
// T2 isn't used until afterwards, so don't bother saving it.
if (i == gprT2.GetCode())
continue;
// xPUSH(xRegister64(i));
armAsm->Push(a64::xzr, a64::Register(i, a64::kXRegSize));
num_gprs++;
}
for (i = 0; i < static_cast<int>(iREGCNT_XMM); ++i)
{
if (!armIsCallerSavedXmm(i))
continue;
num_xmms++;
}
// We need 16 byte alignment on the stack.
// Since the stack is unaligned at entry to this function, we add 8 when it's even, not odd.
const int stack_size = (num_xmms * sizeof(u128)) + ((~num_gprs & 1) * sizeof(u128)) + SHADOW_STACK_SIZE;
int stack_offset = SHADOW_STACK_SIZE;
if (stack_size > 0)
{
// xSUB(rsp, stack_size);
armAsm->Sub(a64::sp, a64::sp, stack_size);
for (i = 0; i < static_cast<int>(iREGCNT_XMM); i++)
{
if (!armIsCallerSavedXmm(i))
continue;
// xMOVAPS(ptr128[rsp + stack_offset], xRegisterSSE(i));
armAsm->Str(a64::QRegister(i).Q(), a64::MemOperand(a64::sp, stack_offset));
stack_offset += sizeof(u128);
}
}
////
// xFastCall((void*)mVUwaitMTVU);
armAsm->Push(a64::xzr, a64::lr);
armAsm->Mov(RXVIXLSCRATCH, reinterpret_cast<intptr_t>(mVUwaitMTVU));
armAsm->Blr(RXVIXLSCRATCH);
armAsm->Pop(a64::lr, a64::xzr);
////
stack_offset = (num_xmms - 1) * sizeof(u128) + SHADOW_STACK_SIZE;
for (i = static_cast<int>(iREGCNT_XMM - 1); i >= 0; --i)
{
if (!armIsCallerSavedXmm(i))
continue;
// xMOVAPS(xRegisterSSE(i), ptr128[rsp + stack_offset]);
armAsm->Ldr(a64::QRegister(i).Q(), a64::MemOperand(a64::sp, stack_offset));
stack_offset -= sizeof(u128);
}
// xADD(rsp, stack_size);
armAsm->Add(a64::sp, a64::sp, stack_size);
for (i = static_cast<int>(iREGCNT_GPR - 1); i >= 0; --i)
{
if (!armIsCallerSaved(i) || i == 4)
continue;
if (i == gprT2.GetCode())
continue;
// xPOP(xRegister64(i));
armAsm->Pop(a64::Register(i, a64::kXRegSize), a64::xzr);
}
// xRET();
armAsm->Ret();
app/src/main/cpp/pcsx2/x86/microVU_Misc.inl
+11 -15
View File
@@ -255,10 +255,9 @@ __fi void mVUbackupRegs(microVU& mVU, bool toMemory = false, bool onlyNeeded = f
{
if (toMemory)
{
int num_xmms = 0, num_gprs = 0;
int i, num_xmms = 0, num_gprs = 0;
a64::CPURegList regListX1(a64::CPURegister::RegisterType::kRegister, a64::kXRegSize, 0);
for (uint i = 0; i < static_cast<int>(iREGCNT_GPR); i++)
for (i = 0; i < static_cast<int>(iREGCNT_GPR); ++i)
{
if (!armIsCallerSaved(i) || i == 4)
continue;
@@ -267,15 +266,14 @@ __fi void mVUbackupRegs(microVU& mVU, bool toMemory = false, bool onlyNeeded = f
{
num_gprs++;
// xPUSH(xRegister64(i));
regListX1.Combine(a64::XRegister(i));
armAsm->Push(a64::xzr, a64::Register(i, a64::kXRegSize));
}
}
armAsm->PushCPURegList(regListX1);
////
std::bitset<iREGCNT_XMM> save_xmms;
for (uint i = 0; i < static_cast<int>(iREGCNT_XMM); i++)
for (i = 0; i < static_cast<int>(iREGCNT_XMM); ++i)
{
if (!armIsCallerSavedXmm(i))
continue;
@@ -295,7 +293,7 @@ __fi void mVUbackupRegs(microVU& mVU, bool toMemory = false, bool onlyNeeded = f
{
// xSUB(rsp, stack_size);
armAsm->Sub(a64::sp, a64::sp, stack_size);
for (int i = 0; i < static_cast<int>(iREGCNT_XMM); i++)
for (i = 0; i < static_cast<int>(iREGCNT_XMM); ++i)
{
if (save_xmms[i])
{
@@ -320,10 +318,10 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false, bool onlyNeeded
{
if (fromMemory)
{
int num_xmms = 0, num_gprs = 0;
int i, num_xmms = 0, num_gprs = 0;
std::bitset<iREGCNT_GPR> save_gprs;
for (uint i = 0; i < static_cast<int>(iREGCNT_GPR); i++)
for (i = 0; i < static_cast<int>(iREGCNT_GPR); ++i)
{
if (!armIsCallerSaved(i) || i == 4)
continue;
@@ -336,7 +334,7 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false, bool onlyNeeded
}
std::bitset<iREGCNT_XMM> save_xmms;
for (uint i = 0; i < static_cast<int>(iREGCNT_XMM); i++)
for (i = 0; i < static_cast<int>(iREGCNT_XMM); ++i)
{
if (!armIsCallerSavedXmm(i))
continue;
@@ -353,7 +351,7 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false, bool onlyNeeded
if (num_xmms > 0)
{
int stack_offset = (num_xmms - 1) * sizeof(u128) + stack_extra;
for (int i = static_cast<int>(iREGCNT_XMM - 1); i >= 0; i--)
for (i = static_cast<int>(iREGCNT_XMM - 1); i >= 0; --i)
{
if (!save_xmms[i])
continue;
@@ -368,15 +366,13 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false, bool onlyNeeded
armAsm->Add(a64::sp, a64::sp, stack_size);
}
a64::CPURegList regListX2(a64::CPURegister::RegisterType::kRegister, a64::kXRegSize, 0);
for (int i = static_cast<int>(iREGCNT_GPR - 1); i >= 0; i--)
for (i = static_cast<int>(iREGCNT_GPR - 1); i >= 0; --i)
{
if (save_gprs[i]) {
// xPOP(xRegister64(i));
regListX2.Combine(a64::XRegister(i));
armAsm->Pop(a64::Register(i, a64::kXRegSize), a64::xzr);
}
}
armAsm->PopCPURegList(regListX2);
}
else
{