Decompiled osEPiRawStartDma

This commit is contained in:
Ryan Myers
2021-09-21 22:10:15 -04:00
parent b335bb56d0
commit cbcab5e384
4 changed files with 27 additions and 69 deletions
+1 -1
View File
@@ -23,7 +23,7 @@ typedef struct {
s32 sectorNum; // 8
uintptr_t devAddr; // c
#if defined(VERSION_EU) || defined(VERSION_SH)
u32 unk10; //error status added moved to blockinfo
u32 errStatus; //error status added moved to blockinfo
#endif
u32 bmCtlShadow; // 10
u32 seqCtlShadow; // 14
@@ -1,65 +0,0 @@
glabel osEPiRawStartDma
/* 0D3280 800D2680 27BDFFD8 */ addiu $sp, $sp, -0x28
/* 0D3284 800D2684 AFBF001C */ sw $ra, 0x1c($sp)
/* 0D3288 800D2688 AFA40028 */ sw $a0, 0x28($sp)
/* 0D328C 800D268C AFA5002C */ sw $a1, 0x2c($sp)
/* 0D3290 800D2690 AFA60030 */ sw $a2, 0x30($sp)
/* 0D3294 800D2694 AFA70034 */ sw $a3, 0x34($sp)
/* 0D3298 800D2698 AFB10018 */ sw $s1, 0x18($sp)
/* 0D329C 800D269C AFB00014 */ sw $s0, 0x14($sp)
/* 0D32A0 800D26A0 3C0EA460 */ lui $t6, %hi(D_A4600010) # $t6, 0xa460
/* 0D32A4 800D26A4 8DD00010 */ lw $s0, %lo(D_A4600010)($t6)
/* 0D32A8 800D26A8 320F0003 */ andi $t7, $s0, 3
/* 0D32AC 800D26AC 11E00006 */ beqz $t7, .L800D26C8
/* 0D32B0 800D26B0 00000000 */ nop
.L800D26B4:
/* 0D32B4 800D26B4 3C18A460 */ lui $t8, %hi(D_A4600010) # $t8, 0xa460
/* 0D32B8 800D26B8 8F100010 */ lw $s0, %lo(D_A4600010)($t8)
/* 0D32BC 800D26BC 32190003 */ andi $t9, $s0, 3
/* 0D32C0 800D26C0 1720FFFC */ bnez $t9, .L800D26B4
/* 0D32C4 800D26C4 00000000 */ nop
.L800D26C8:
/* 0D32C8 800D26C8 0C03233C */ jal osVirtualToPhysical
/* 0D32CC 800D26CC 8FA40034 */ lw $a0, 0x34($sp)
/* 0D32D0 800D26D0 3C08A460 */ lui $t0, 0xa460
/* 0D32D4 800D26D4 AD020000 */ sw $v0, ($t0)
/* 0D32D8 800D26D8 8FA90028 */ lw $t1, 0x28($sp)
/* 0D32DC 800D26DC 8FAB0030 */ lw $t3, 0x30($sp)
/* 0D32E0 800D26E0 3C011FFF */ lui $at, (0x1FFFFFFF >> 16) # lui $at, 0x1fff
/* 0D32E4 800D26E4 8D2A000C */ lw $t2, 0xc($t1)
/* 0D32E8 800D26E8 3421FFFF */ ori $at, (0x1FFFFFFF & 0xFFFF) # ori $at, $at, 0xffff
/* 0D32EC 800D26EC 3C0EA460 */ lui $t6, %hi(D_A4600004) # $t6, 0xa460
/* 0D32F0 800D26F0 014B6025 */ or $t4, $t2, $t3
/* 0D32F4 800D26F4 01816824 */ and $t5, $t4, $at
/* 0D32F8 800D26F8 ADCD0004 */ sw $t5, %lo(D_A4600004)($t6)
/* 0D32FC 800D26FC 8FB1002C */ lw $s1, 0x2c($sp)
/* 0D3300 800D2700 12200005 */ beqz $s1, .L800D2718
/* 0D3304 800D2704 24010001 */ li $at, 1
/* 0D3308 800D2708 12210008 */ beq $s1, $at, .L800D272C
/* 0D330C 800D270C 00000000 */ nop
/* 0D3310 800D2710 1000000B */ b .L800D2740
/* 0D3314 800D2714 00000000 */ nop
.L800D2718:
/* 0D3318 800D2718 8FAF0038 */ lw $t7, 0x38($sp)
/* 0D331C 800D271C 3C19A460 */ lui $t9, %hi(D_A460000C) # $t9, 0xa460
/* 0D3320 800D2720 25F8FFFF */ addiu $t8, $t7, -1
/* 0D3324 800D2724 10000008 */ b .L800D2748
/* 0D3328 800D2728 AF38000C */ sw $t8, %lo(D_A460000C)($t9)
.L800D272C:
/* 0D332C 800D272C 8FA80038 */ lw $t0, 0x38($sp)
/* 0D3330 800D2730 3C0AA460 */ lui $t2, %hi(D_A4600008) # $t2, 0xa460
/* 0D3334 800D2734 2509FFFF */ addiu $t1, $t0, -1
/* 0D3338 800D2738 10000003 */ b .L800D2748
/* 0D333C 800D273C AD490008 */ sw $t1, %lo(D_A4600008)($t2)
.L800D2740:
/* 0D3340 800D2740 10000002 */ b .L800D274C
/* 0D3344 800D2744 2402FFFF */ li $v0, -1
.L800D2748:
/* 0D3348 800D2748 00001025 */ move $v0, $zero
.L800D274C:
/* 0D334C 800D274C 8FBF001C */ lw $ra, 0x1c($sp)
/* 0D3350 800D2750 8FB00014 */ lw $s0, 0x14($sp)
/* 0D3354 800D2754 8FB10018 */ lw $s1, 0x18($sp)
/* 0D3358 800D2758 03E00008 */ jr $ra
/* 0D335C 800D275C 27BD0028 */ addiu $sp, $sp, 0x28
+25 -1
View File
@@ -33,4 +33,28 @@ s32 osPiRawStartDma(s32 direction, u32 devAddr, void *dramAddr, u32 size) {
return 0;
}
GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3160/osEPiRawStartDma.s")
s32 osEPiRawStartDma(OSPiHandle *pihandle, s32 dir, u32 cart_addr, void *dram_addr, u32 size) {
register int status;
status = IO_READ(PI_STATUS_REG);
while (status & PI_STATUS_ERROR) {
status = IO_READ(PI_STATUS_REG);
}
IO_WRITE(PI_DRAM_ADDR_REG, osVirtualToPhysical(dram_addr));
IO_WRITE(PI_CART_ADDR_REG, K1_TO_PHYS(pihandle->baseAddress | cart_addr));
switch (dir) {
case OS_READ:
IO_WRITE(PI_WR_LEN_REG, size - 1);
break;
case OS_WRITE:
IO_WRITE(PI_RD_LEN_REG, size - 1);
break;
default:
return -1;
}
return 0;
}
+1 -2
View File
@@ -9,8 +9,7 @@ GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3160/__osDevMgrMain.s")
GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3160/__osViInit.s")
GLOBAL_ASM("lib/asm/non_matchings/unknown_0D3160/alSynDelete.s")
void __osDequeueThread(OSThread **queue, OSThread *t)
{
void __osDequeueThread(OSThread **queue, OSThread *t) {
register OSThread *pred;
register OSThread *succ;
pred = (OSThread *)queue; //this is actually legit..