mirror of
https://github.com/izzy2lost/Diddy-Kong-Racing.git
synced 2026-06-19 01:16:26 -07:00
Match motor functions
This commit is contained in:
Ryan Myers
@@ -267,6 +267,7 @@ $(BUILD_DIR)/lib/src/al/%.o: OPT_FLAGS := -O3
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$(BUILD_DIR)/lib/src/os/%.o: OPT_FLAGS := -O1
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$(BUILD_DIR)/lib/src/os/osViMgr.o: OPT_FLAGS := -O2
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$(BUILD_DIR)/lib/src/os/osCreatePiManager.o: OPT_FLAGS := -O2
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$(BUILD_DIR)/lib/src/os/osMotor.o: OPT_FLAGS := -O2
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$(BUILD_DIR)/lib/src/libc/xprintf.o : OPT_FLAGS := -O3
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$(BUILD_DIR)/lib/src/al/unknown_0C9C90.o: OPT_FLAGS := -O2 -Wo,-loopunroll,0
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#$(BUILD_DIR)/lib/src/libc/llcvt.o: OPT_FLAGS :=
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@@ -274,6 +275,7 @@ $(BUILD_DIR)/lib/src/al/unknown_0C9C90.o: OPT_FLAGS := -O2 -Wo,-loopunroll,0
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$(BUILD_DIR)/lib/%.o: MIPSISET := -mips2
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$(BUILD_DIR)/lib/src/mips1/%.o: MIPSISET := -mips1
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$(BUILD_DIR)/lib/src/os/osMotor.o: MIPSISET := -mips1
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# asm-processor currently does not support -O3, so this is my workaround.
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$(BUILD_DIR)/lib/src/al/global_asm/%.o: OPT_FLAGS := -O2
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@@ -1,95 +0,0 @@
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glabel _MakeMotorData
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/* 072B80 80071F80 27BDFFA8 */ addiu $sp, $sp, -0x58
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/* 072B84 80071F84 AFB00018 */ sw $s0, 0x18($sp)
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/* 072B88 80071F88 00808025 */ move $s0, $a0
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/* 072B8C 80071F8C AFBF001C */ sw $ra, 0x1c($sp)
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/* 072B90 80071F90 AFA5005C */ sw $a1, 0x5c($sp)
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/* 072B94 80071F94 00E01825 */ move $v1, $a3
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/* 072B98 80071F98 00004025 */ move $t0, $zero
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/* 072B9C 80071F9C 00E01025 */ move $v0, $a3
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.L80071FA0:
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/* 072BA0 80071FA0 25080001 */ addiu $t0, $t0, 1
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/* 072BA4 80071FA4 2901000F */ slti $at, $t0, 0xf
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/* 072BA8 80071FA8 24420004 */ addiu $v0, $v0, 4
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/* 072BAC 80071FAC 1420FFFC */ bnez $at, .L80071FA0
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/* 072BB0 80071FB0 AC40FFFC */ sw $zero, -4($v0)
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/* 072BB4 80071FB4 240E0001 */ li $t6, 1
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/* 072BB8 80071FB8 ACEE003C */ sw $t6, 0x3c($a3)
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/* 072BBC 80071FBC 240F00FF */ li $t7, 255
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/* 072BC0 80071FC0 24180023 */ li $t8, 35
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/* 072BC4 80071FC4 24190001 */ li $t9, 1
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/* 072BC8 80071FC8 24090003 */ li $t1, 3
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/* 072BCC 80071FCC 97A4005E */ lhu $a0, 0x5e($sp)
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/* 072BD0 80071FD0 A3AF002C */ sb $t7, 0x2c($sp)
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/* 072BD4 80071FD4 A3B8002D */ sb $t8, 0x2d($sp)
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/* 072BD8 80071FD8 A3B9002E */ sb $t9, 0x2e($sp)
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/* 072BDC 80071FDC A3A9002F */ sb $t1, 0x2f($sp)
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/* 072BE0 80071FE0 AFA60060 */ sw $a2, 0x60($sp)
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/* 072BE4 80071FE4 0C0335DC */ jal __osContAddressCrc
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/* 072BE8 80071FE8 AFA30054 */ sw $v1, 0x54($sp)
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/* 072BEC 80071FEC 97AA005E */ lhu $t2, 0x5e($sp)
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/* 072BF0 80071FF0 240D00FF */ li $t5, 255
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/* 072BF4 80071FF4 000A5940 */ sll $t3, $t2, 5
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/* 072BF8 80071FF8 004B6025 */ or $t4, $v0, $t3
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/* 072BFC 80071FFC 8FA30054 */ lw $v1, 0x54($sp)
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/* 072C00 80072000 8FA60060 */ lw $a2, 0x60($sp)
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/* 072C04 80072004 A7AC0030 */ sh $t4, 0x30($sp)
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/* 072C08 80072008 A3AD0052 */ sb $t5, 0x52($sp)
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/* 072C0C 8007200C 27A2004C */ addiu $v0, $sp, 0x4c
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/* 072C10 80072010 27A4002C */ addiu $a0, $sp, 0x2c
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.L80072014:
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/* 072C14 80072014 90CE0000 */ lbu $t6, ($a2)
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/* 072C18 80072018 24840001 */ addiu $a0, $a0, 1
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/* 072C1C 8007201C 0082082B */ sltu $at, $a0, $v0
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/* 072C20 80072020 24C60001 */ addiu $a2, $a2, 1
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/* 072C24 80072024 1420FFFB */ bnez $at, .L80072014
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/* 072C28 80072028 A08E0005 */ sb $t6, 5($a0)
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/* 072C2C 8007202C 12000012 */ beqz $s0, .L80072078
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/* 072C30 80072030 27AF002C */ addiu $t7, $sp, 0x2c
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/* 072C34 80072034 1A000010 */ blez $s0, .L80072078
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/* 072C38 80072038 00004025 */ move $t0, $zero
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/* 072C3C 8007203C 32040003 */ andi $a0, $s0, 3
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/* 072C40 80072040 10800006 */ beqz $a0, .L8007205C
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/* 072C44 80072044 00801025 */ move $v0, $a0
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.L80072048:
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/* 072C48 80072048 25080001 */ addiu $t0, $t0, 1
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/* 072C4C 8007204C A0600000 */ sb $zero, ($v1)
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/* 072C50 80072050 1448FFFD */ bne $v0, $t0, .L80072048
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/* 072C54 80072054 24630001 */ addiu $v1, $v1, 1
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/* 072C58 80072058 11100007 */ beq $t0, $s0, .L80072078
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.L8007205C:
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/* 072C5C 8007205C 25080004 */ addiu $t0, $t0, 4
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/* 072C60 80072060 A0600001 */ sb $zero, 1($v1)
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/* 072C64 80072064 A0600002 */ sb $zero, 2($v1)
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/* 072C68 80072068 A0600003 */ sb $zero, 3($v1)
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/* 072C6C 8007206C 24630004 */ addiu $v1, $v1, 4
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/* 072C70 80072070 1510FFFA */ bne $t0, $s0, .L8007205C
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/* 072C74 80072074 A060FFFC */ sb $zero, -4($v1)
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.L80072078:
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/* 072C78 80072078 00604825 */ move $t1, $v1
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/* 072C7C 8007207C 25F90024 */ addiu $t9, $t7, 0x24
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.L80072080:
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/* 072C80 80072080 8DE10000 */ lw $at, ($t7)
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/* 072C84 80072084 25EF000C */ addiu $t7, $t7, 0xc
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/* 072C88 80072088 A9210000 */ swl $at, ($t1)
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/* 072C8C 8007208C B9210003 */ swr $at, 3($t1)
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/* 072C90 80072090 8DE1FFF8 */ lw $at, -8($t7)
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/* 072C94 80072094 2529000C */ addiu $t1, $t1, 0xc
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/* 072C98 80072098 A921FFF8 */ swl $at, -8($t1)
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/* 072C9C 8007209C B921FFFB */ swr $at, -5($t1)
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/* 072CA0 800720A0 8DE1FFFC */ lw $at, -4($t7)
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/* 072CA4 800720A4 00000000 */ nop
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/* 072CA8 800720A8 A921FFFC */ swl $at, -4($t1)
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/* 072CAC 800720AC 15F9FFF4 */ bne $t7, $t9, .L80072080
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/* 072CB0 800720B0 B921FFFF */ swr $at, -1($t1)
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/* 072CB4 800720B4 8DE10000 */ lw $at, ($t7)
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/* 072CB8 800720B8 240A00FE */ li $t2, 254
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/* 072CBC 800720BC A9210000 */ swl $at, ($t1)
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/* 072CC0 800720C0 B9210003 */ swr $at, 3($t1)
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/* 072CC4 800720C4 A06A0028 */ sb $t2, 0x28($v1)
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/* 072CC8 800720C8 8FBF001C */ lw $ra, 0x1c($sp)
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/* 072CCC 800720CC 8FB00018 */ lw $s0, 0x18($sp)
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/* 072CD0 800720D0 24630028 */ addiu $v1, $v1, 0x28
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/* 072CD4 800720D4 03E00008 */ jr $ra
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/* 072CD8 800720D8 27BD0058 */ addiu $sp, $sp, 0x58
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@@ -1,104 +0,0 @@
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glabel osMotorInit
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/* 072CDC 800720DC 27BDFFA8 */ addiu $sp, $sp, -0x58
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/* 072CE0 800720E0 AFB00020 */ sw $s0, 0x20($sp)
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/* 072CE4 800720E4 AFBF0024 */ sw $ra, 0x24($sp)
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/* 072CE8 800720E8 24070080 */ li $a3, 128
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/* 072CEC 800720EC 00C08025 */ move $s0, $a2
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/* 072CF0 800720F0 ACA40004 */ sw $a0, 4($a1)
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/* 072CF4 800720F4 ACA60008 */ sw $a2, 8($a1)
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/* 072CF8 800720F8 ACA00000 */ sw $zero, ($a1)
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/* 072CFC 800720FC A0A70065 */ sb $a3, 0x65($a1)
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/* 072D00 80072100 27A20030 */ addiu $v0, $sp, 0x30
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/* 072D04 80072104 27A30050 */ addiu $v1, $sp, 0x50
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.L80072108:
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/* 072D08 80072108 24420001 */ addiu $v0, $v0, 1
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/* 072D0C 8007210C 0043082B */ sltu $at, $v0, $v1
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/* 072D10 80072110 1420FFFD */ bnez $at, .L80072108
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/* 072D14 80072114 A047FFFF */ sb $a3, -1($v0)
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/* 072D18 80072118 02002825 */ move $a1, $s0
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/* 072D1C 8007211C 24060400 */ li $a2, 1024
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/* 072D20 80072120 27A70030 */ addiu $a3, $sp, 0x30
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/* 072D24 80072124 AFA00010 */ sw $zero, 0x10($sp)
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/* 072D28 80072128 0C03363C */ jal __osContRamWrite
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/* 072D2C 8007212C AFA40058 */ sw $a0, 0x58($sp)
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/* 072D30 80072130 24010002 */ li $at, 2
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/* 072D34 80072134 14410008 */ bne $v0, $at, .L80072158
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/* 072D38 80072138 00401825 */ move $v1, $v0
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/* 072D3C 8007213C 8FA40058 */ lw $a0, 0x58($sp)
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/* 072D40 80072140 02002825 */ move $a1, $s0
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/* 072D44 80072144 24060400 */ li $a2, 1024
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/* 072D48 80072148 27A70030 */ addiu $a3, $sp, 0x30
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/* 072D4C 8007214C 0C03363C */ jal __osContRamWrite
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/* 072D50 80072150 AFA00010 */ sw $zero, 0x10($sp)
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/* 072D54 80072154 00401825 */ move $v1, $v0
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.L80072158:
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/* 072D58 80072158 10400003 */ beqz $v0, .L80072168
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/* 072D5C 8007215C 02002825 */ move $a1, $s0
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/* 072D60 80072160 10000034 */ b .L80072234
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/* 072D64 80072164 00601025 */ move $v0, $v1
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.L80072168:
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/* 072D68 80072168 8FA40058 */ lw $a0, 0x58($sp)
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/* 072D6C 8007216C 24060400 */ li $a2, 1024
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/* 072D70 80072170 0C033728 */ jal __osContRamRead
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/* 072D74 80072174 27A70030 */ addiu $a3, $sp, 0x30
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/* 072D78 80072178 10400004 */ beqz $v0, .L8007218C
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/* 072D7C 8007217C 93AE004F */ lbu $t6, 0x4f($sp)
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/* 072D80 80072180 1000002D */ b .L80072238
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/* 072D84 80072184 8FBF0024 */ lw $ra, 0x24($sp)
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/* 072D88 80072188 93AE004F */ lbu $t6, 0x4f($sp)
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.L8007218C:
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/* 072D8C 8007218C 24010080 */ li $at, 128
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/* 072D90 80072190 11C10003 */ beq $t6, $at, .L800721A0
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/* 072D94 80072194 3C048012 */ lui $a0, %hi(_motorstartbuf) # $a0, 0x8012
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/* 072D98 80072198 10000026 */ b .L80072234
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/* 072D9C 8007219C 2402000B */ li $v0, 11
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.L800721A0:
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/* 072DA0 800721A0 3C038012 */ lui $v1, %hi(_motorstopbuf) # $v1, 0x8012
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/* 072DA4 800721A4 3C058012 */ lui $a1, %hi(_motorstartbuf) # $a1, 0x8012
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/* 072DA8 800721A8 24A53FF0 */ addiu $a1, %lo(_motorstartbuf) # addiu $a1, $a1, 0x3ff0
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/* 072DAC 800721AC 24633FD0 */ addiu $v1, %lo(_motorstopbuf) # addiu $v1, $v1, 0x3fd0
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/* 072DB0 800721B0 24843FF0 */ addiu $a0, %lo(_motorstartbuf) # addiu $a0, $a0, 0x3ff0
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/* 072DB4 800721B4 24020001 */ li $v0, 1
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.L800721B8:
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/* 072DB8 800721B8 24630004 */ addiu $v1, $v1, 4
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/* 072DBC 800721BC A0820001 */ sb $v0, 1($a0)
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/* 072DC0 800721C0 A060FFFD */ sb $zero, -3($v1)
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/* 072DC4 800721C4 A0820002 */ sb $v0, 2($a0)
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/* 072DC8 800721C8 A060FFFE */ sb $zero, -2($v1)
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/* 072DCC 800721CC A0820003 */ sb $v0, 3($a0)
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/* 072DD0 800721D0 A060FFFF */ sb $zero, -1($v1)
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/* 072DD4 800721D4 24840004 */ addiu $a0, $a0, 4
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/* 072DD8 800721D8 A082FFFC */ sb $v0, -4($a0)
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/* 072DDC 800721DC 1465FFF6 */ bne $v1, $a1, .L800721B8
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/* 072DE0 800721E0 A060FFFC */ sb $zero, -4($v1)
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/* 072DE4 800721E4 3C0F8012 */ lui $t7, %hi(_MotorStartData) # $t7, 0x8012
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/* 072DE8 800721E8 25EF3ED0 */ addiu $t7, %lo(_MotorStartData) # addiu $t7, $t7, 0x3ed0
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/* 072DEC 800721EC 3C068012 */ lui $a2, %hi(_motorstartbuf) # $a2, 0x8012
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/* 072DF0 800721F0 00101180 */ sll $v0, $s0, 6
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/* 072DF4 800721F4 004F3821 */ addu $a3, $v0, $t7
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/* 072DF8 800721F8 AFA2002C */ sw $v0, 0x2c($sp)
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/* 072DFC 800721FC 24C63FF0 */ addiu $a2, %lo(_motorstartbuf) # addiu $a2, $a2, 0x3ff0
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/* 072E00 80072200 02002025 */ move $a0, $s0
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/* 072E04 80072204 0C01C7E0 */ jal _MakeMotorData
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/* 072E08 80072208 24050600 */ li $a1, 1536
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/* 072E0C 8007220C 8FA2002C */ lw $v0, 0x2c($sp)
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/* 072E10 80072210 3C188012 */ lui $t8, %hi(_MotorStopData) # $t8, 0x8012
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/* 072E14 80072214 27183DD0 */ addiu $t8, %lo(_MotorStopData) # addiu $t8, $t8, 0x3dd0
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/* 072E18 80072218 3C068012 */ lui $a2, %hi(_motorstopbuf) # $a2, 0x8012
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/* 072E1C 8007221C 24C63FD0 */ addiu $a2, %lo(_motorstopbuf) # addiu $a2, $a2, 0x3fd0
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/* 072E20 80072220 02002025 */ move $a0, $s0
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/* 072E24 80072224 24050600 */ li $a1, 1536
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/* 072E28 80072228 0C01C7E0 */ jal _MakeMotorData
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/* 072E2C 8007222C 00583821 */ addu $a3, $v0, $t8
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/* 072E30 80072230 00001025 */ move $v0, $zero
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.L80072234:
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/* 072E34 80072234 8FBF0024 */ lw $ra, 0x24($sp)
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.L80072238:
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/* 072E38 80072238 8FB00020 */ lw $s0, 0x20($sp)
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/* 072E3C 8007223C 03E00008 */ jr $ra
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/* 072E40 80072240 27BD0058 */ addiu $sp, $sp, 0x58
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||||
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/* 072E44 80072244 00000000 */ nop
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||||
/* 072E48 80072248 00000000 */ nop
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||||
/* 072E4C 8007224C 00000000 */ nop
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||||
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@@ -1,80 +0,0 @@
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glabel osMotorStart
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/* 072A58 80071E58 27BDFFB0 */ addiu $sp, $sp, -0x50
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/* 072A5C 80071E5C AFBF0014 */ sw $ra, 0x14($sp)
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/* 072A60 80071E60 0C033594 */ jal __osSiGetAccess
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/* 072A64 80071E64 AFA40050 */ sw $a0, 0x50($sp)
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/* 072A68 80071E68 8FAF0050 */ lw $t7, 0x50($sp)
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||||
/* 072A6C 80071E6C 240E0003 */ li $t6, 3
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/* 072A70 80071E70 3C018013 */ lui $at, %hi(__osContLastCmd) # $at, 0x8013
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/* 072A74 80071E74 A02ECD90 */ sb $t6, %lo(__osContLastCmd)($at)
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/* 072A78 80071E78 8DF80008 */ lw $t8, 8($t7)
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/* 072A7C 80071E7C 3C088012 */ lui $t0, %hi(_MotorStartData) # $t0, 0x8012
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/* 072A80 80071E80 25083ED0 */ addiu $t0, %lo(_MotorStartData) # addiu $t0, $t0, 0x3ed0
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/* 072A84 80071E84 0018C980 */ sll $t9, $t8, 6
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/* 072A88 80071E88 03282821 */ addu $a1, $t9, $t0
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/* 072A8C 80071E8C 0C0335B0 */ jal __osSiRawStartDma
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/* 072A90 80071E90 24040001 */ li $a0, 1
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/* 072A94 80071E94 8FA90050 */ lw $t1, 0x50($sp)
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/* 072A98 80071E98 00002825 */ move $a1, $zero
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||||
/* 072A9C 80071E9C 8D240004 */ lw $a0, 4($t1)
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/* 072AA0 80071EA0 0C0322EC */ jal osRecvMesg
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/* 072AA4 80071EA4 24060001 */ li $a2, 1
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/* 072AA8 80071EA8 3C058013 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8013
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/* 072AAC 80071EAC 24A5CDE0 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, -0x3220
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/* 072AB0 80071EB0 0C0335B0 */ jal __osSiRawStartDma
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||||
/* 072AB4 80071EB4 00002025 */ move $a0, $zero
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||||
/* 072AB8 80071EB8 8FAA0050 */ lw $t2, 0x50($sp)
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||||
/* 072ABC 80071EBC 00002825 */ move $a1, $zero
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||||
/* 072AC0 80071EC0 8D440004 */ lw $a0, 4($t2)
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||||
/* 072AC4 80071EC4 0C0322EC */ jal osRecvMesg
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||||
/* 072AC8 80071EC8 24060001 */ li $a2, 1
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||||
/* 072ACC 80071ECC 8FAB0050 */ lw $t3, 0x50($sp)
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||||
/* 072AD0 80071ED0 3C038013 */ lui $v1, %hi(__osPfsPifRam) # $v1, 0x8013
|
||||
/* 072AD4 80071ED4 8D640008 */ lw $a0, 8($t3)
|
||||
/* 072AD8 80071ED8 2463CDE0 */ addiu $v1, %lo(__osPfsPifRam) # addiu $v1, $v1, -0x3220
|
||||
/* 072ADC 80071EDC 10800007 */ beqz $a0, .L80071EFC
|
||||
/* 072AE0 80071EE0 27AC001C */ addiu $t4, $sp, 0x1c
|
||||
/* 072AE4 80071EE4 18800005 */ blez $a0, .L80071EFC
|
||||
/* 072AE8 80071EE8 00001025 */ move $v0, $zero
|
||||
.L80071EEC:
|
||||
/* 072AEC 80071EEC 24420001 */ addiu $v0, $v0, 1
|
||||
/* 072AF0 80071EF0 0044082A */ slt $at, $v0, $a0
|
||||
/* 072AF4 80071EF4 1420FFFD */ bnez $at, .L80071EEC
|
||||
/* 072AF8 80071EF8 24630001 */ addiu $v1, $v1, 1
|
||||
.L80071EFC:
|
||||
/* 072AFC 80071EFC 00607825 */ move $t7, $v1
|
||||
/* 072B00 80071F00 246E0024 */ addiu $t6, $v1, 0x24
|
||||
.L80071F04:
|
||||
/* 072B04 80071F04 89E10000 */ lwl $at, ($t7)
|
||||
/* 072B08 80071F08 99E10003 */ lwr $at, 3($t7)
|
||||
/* 072B0C 80071F0C 25EF000C */ addiu $t7, $t7, 0xc
|
||||
/* 072B10 80071F10 AD810000 */ sw $at, ($t4)
|
||||
/* 072B14 80071F14 89E1FFF8 */ lwl $at, -8($t7)
|
||||
/* 072B18 80071F18 99E1FFFB */ lwr $at, -5($t7)
|
||||
/* 072B1C 80071F1C 258C000C */ addiu $t4, $t4, 0xc
|
||||
/* 072B20 80071F20 AD81FFF8 */ sw $at, -8($t4)
|
||||
/* 072B24 80071F24 89E1FFFC */ lwl $at, -4($t7)
|
||||
/* 072B28 80071F28 99E1FFFF */ lwr $at, -1($t7)
|
||||
/* 072B2C 80071F2C 15EEFFF5 */ bne $t7, $t6, .L80071F04
|
||||
/* 072B30 80071F30 AD81FFFC */ sw $at, -4($t4)
|
||||
/* 072B34 80071F34 89E10000 */ lwl $at, ($t7)
|
||||
/* 072B38 80071F38 99E10003 */ lwr $at, 3($t7)
|
||||
/* 072B3C 80071F3C 00000000 */ nop
|
||||
/* 072B40 80071F40 AD810000 */ sw $at, ($t4)
|
||||
/* 072B44 80071F44 93A2001E */ lbu $v0, 0x1e($sp)
|
||||
/* 072B48 80071F48 93A80042 */ lbu $t0, 0x42($sp)
|
||||
/* 072B4C 80071F4C 305800C0 */ andi $t8, $v0, 0xc0
|
||||
/* 072B50 80071F50 00182103 */ sra $a0, $t8, 4
|
||||
/* 072B54 80071F54 14800004 */ bnez $a0, .L80071F68
|
||||
/* 072B58 80071F58 240100EB */ li $at, 235
|
||||
/* 072B5C 80071F5C 11010002 */ beq $t0, $at, .L80071F68
|
||||
/* 072B60 80071F60 00000000 */ nop
|
||||
/* 072B64 80071F64 24040004 */ li $a0, 4
|
||||
.L80071F68:
|
||||
/* 072B68 80071F68 0C0335A5 */ jal __osSiRelAccess
|
||||
/* 072B6C 80071F6C AFA40048 */ sw $a0, 0x48($sp)
|
||||
/* 072B70 80071F70 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 072B74 80071F74 8FA20048 */ lw $v0, 0x48($sp)
|
||||
/* 072B78 80071F78 03E00008 */ jr $ra
|
||||
/* 072B7C 80071F7C 27BD0050 */ addiu $sp, $sp, 0x50
|
||||
|
||||
@@ -1,80 +0,0 @@
|
||||
glabel osMotorStop
|
||||
/* 072930 80071D30 27BDFFB0 */ addiu $sp, $sp, -0x50
|
||||
/* 072934 80071D34 AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 072938 80071D38 0C033594 */ jal __osSiGetAccess
|
||||
/* 07293C 80071D3C AFA40050 */ sw $a0, 0x50($sp)
|
||||
/* 072940 80071D40 8FAF0050 */ lw $t7, 0x50($sp)
|
||||
/* 072944 80071D44 240E0003 */ li $t6, 3
|
||||
/* 072948 80071D48 3C018013 */ lui $at, %hi(__osContLastCmd) # $at, 0x8013
|
||||
/* 07294C 80071D4C A02ECD90 */ sb $t6, %lo(__osContLastCmd)($at)
|
||||
/* 072950 80071D50 8DF80008 */ lw $t8, 8($t7)
|
||||
/* 072954 80071D54 3C088012 */ lui $t0, %hi(_MotorStopData) # $t0, 0x8012
|
||||
/* 072958 80071D58 25083DD0 */ addiu $t0, %lo(_MotorStopData) # addiu $t0, $t0, 0x3dd0
|
||||
/* 07295C 80071D5C 0018C980 */ sll $t9, $t8, 6
|
||||
/* 072960 80071D60 03282821 */ addu $a1, $t9, $t0
|
||||
/* 072964 80071D64 0C0335B0 */ jal __osSiRawStartDma
|
||||
/* 072968 80071D68 24040001 */ li $a0, 1
|
||||
/* 07296C 80071D6C 8FA90050 */ lw $t1, 0x50($sp)
|
||||
/* 072970 80071D70 00002825 */ move $a1, $zero
|
||||
/* 072974 80071D74 8D240004 */ lw $a0, 4($t1)
|
||||
/* 072978 80071D78 0C0322EC */ jal osRecvMesg
|
||||
/* 07297C 80071D7C 24060001 */ li $a2, 1
|
||||
/* 072980 80071D80 3C058013 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8013
|
||||
/* 072984 80071D84 24A5CDE0 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, -0x3220
|
||||
/* 072988 80071D88 0C0335B0 */ jal __osSiRawStartDma
|
||||
/* 07298C 80071D8C 00002025 */ move $a0, $zero
|
||||
/* 072990 80071D90 8FAA0050 */ lw $t2, 0x50($sp)
|
||||
/* 072994 80071D94 00002825 */ move $a1, $zero
|
||||
/* 072998 80071D98 8D440004 */ lw $a0, 4($t2)
|
||||
/* 07299C 80071D9C 0C0322EC */ jal osRecvMesg
|
||||
/* 0729A0 80071DA0 24060001 */ li $a2, 1
|
||||
/* 0729A4 80071DA4 8FAB0050 */ lw $t3, 0x50($sp)
|
||||
/* 0729A8 80071DA8 3C038013 */ lui $v1, %hi(__osPfsPifRam) # $v1, 0x8013
|
||||
/* 0729AC 80071DAC 8D640008 */ lw $a0, 8($t3)
|
||||
/* 0729B0 80071DB0 2463CDE0 */ addiu $v1, %lo(__osPfsPifRam) # addiu $v1, $v1, -0x3220
|
||||
/* 0729B4 80071DB4 10800007 */ beqz $a0, .L80071DD4
|
||||
/* 0729B8 80071DB8 27AC001C */ addiu $t4, $sp, 0x1c
|
||||
/* 0729BC 80071DBC 18800005 */ blez $a0, .L80071DD4
|
||||
/* 0729C0 80071DC0 00001025 */ move $v0, $zero
|
||||
.L80071DC4:
|
||||
/* 0729C4 80071DC4 24420001 */ addiu $v0, $v0, 1
|
||||
/* 0729C8 80071DC8 0044082A */ slt $at, $v0, $a0
|
||||
/* 0729CC 80071DCC 1420FFFD */ bnez $at, .L80071DC4
|
||||
/* 0729D0 80071DD0 24630001 */ addiu $v1, $v1, 1
|
||||
.L80071DD4:
|
||||
/* 0729D4 80071DD4 00607825 */ move $t7, $v1
|
||||
/* 0729D8 80071DD8 246E0024 */ addiu $t6, $v1, 0x24
|
||||
.L80071DDC:
|
||||
/* 0729DC 80071DDC 89E10000 */ lwl $at, ($t7)
|
||||
/* 0729E0 80071DE0 99E10003 */ lwr $at, 3($t7)
|
||||
/* 0729E4 80071DE4 25EF000C */ addiu $t7, $t7, 0xc
|
||||
/* 0729E8 80071DE8 AD810000 */ sw $at, ($t4)
|
||||
/* 0729EC 80071DEC 89E1FFF8 */ lwl $at, -8($t7)
|
||||
/* 0729F0 80071DF0 99E1FFFB */ lwr $at, -5($t7)
|
||||
/* 0729F4 80071DF4 258C000C */ addiu $t4, $t4, 0xc
|
||||
/* 0729F8 80071DF8 AD81FFF8 */ sw $at, -8($t4)
|
||||
/* 0729FC 80071DFC 89E1FFFC */ lwl $at, -4($t7)
|
||||
/* 072A00 80071E00 99E1FFFF */ lwr $at, -1($t7)
|
||||
/* 072A04 80071E04 15EEFFF5 */ bne $t7, $t6, .L80071DDC
|
||||
/* 072A08 80071E08 AD81FFFC */ sw $at, -4($t4)
|
||||
/* 072A0C 80071E0C 89E10000 */ lwl $at, ($t7)
|
||||
/* 072A10 80071E10 99E10003 */ lwr $at, 3($t7)
|
||||
/* 072A14 80071E14 00000000 */ nop
|
||||
/* 072A18 80071E18 AD810000 */ sw $at, ($t4)
|
||||
/* 072A1C 80071E1C 93A2001E */ lbu $v0, 0x1e($sp)
|
||||
/* 072A20 80071E20 93A80042 */ lbu $t0, 0x42($sp)
|
||||
/* 072A24 80071E24 305800C0 */ andi $t8, $v0, 0xc0
|
||||
/* 072A28 80071E28 00182103 */ sra $a0, $t8, 4
|
||||
/* 072A2C 80071E2C 14800004 */ bnez $a0, .L80071E40
|
||||
/* 072A30 80071E30 00000000 */ nop
|
||||
/* 072A34 80071E34 11000002 */ beqz $t0, .L80071E40
|
||||
/* 072A38 80071E38 00000000 */ nop
|
||||
/* 072A3C 80071E3C 24040004 */ li $a0, 4
|
||||
.L80071E40:
|
||||
/* 072A40 80071E40 0C0335A5 */ jal __osSiRelAccess
|
||||
/* 072A44 80071E44 AFA40048 */ sw $a0, 0x48($sp)
|
||||
/* 072A48 80071E48 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 072A4C 80071E4C 8FA20048 */ lw $v0, 0x48($sp)
|
||||
/* 072A50 80071E50 03E00008 */ jr $ra
|
||||
/* 072A54 80071E54 27BD0050 */ addiu $sp, $sp, 0x50
|
||||
|
||||
+28
-66
@@ -1,27 +1,17 @@
|
||||
/* The comment below is needed for this file to be picked up by generate_ld */
|
||||
/* RAM_POS: 0x80071D30 */
|
||||
|
||||
#include "types.h"
|
||||
#include "macros.h"
|
||||
#include "libultra_internal.h"
|
||||
#include "controller.h"
|
||||
#include "siint.h"
|
||||
|
||||
#if 1
|
||||
GLOBAL_ASM("lib/asm/non_matchings/osMotor/osMotorStop.s")
|
||||
GLOBAL_ASM("lib/asm/non_matchings/osMotor/osMotorStart.s")
|
||||
GLOBAL_ASM("lib/asm/non_matchings/osMotor/_MakeMotorData.s")
|
||||
GLOBAL_ASM("lib/asm/non_matchings/osMotor/osMotorInit.s")
|
||||
#else
|
||||
|
||||
static void _MakeMotorData(int channel, u16 address, u8 *buffer, OSPifRam *mdata);
|
||||
//u32 __osMotorinitialized[MAXCONTROLLERS] = {0, 0, 0, 0};
|
||||
//TODO: These should really be declared here instead of somewhere else
|
||||
extern OSPifRam _MotorStopData[MAXCONTROLLERS];
|
||||
extern OSPifRam _MotorStartData[MAXCONTROLLERS];
|
||||
extern u8 _motorstopbuf[32];
|
||||
extern u8 _motorstartbuf[32];
|
||||
s32 osMotorStop(OSPfs *pfs)
|
||||
{
|
||||
s32 osMotorStop(OSPfs *pfs) {
|
||||
int i;
|
||||
s32 ret;
|
||||
u8 *ptr;
|
||||
@@ -32,7 +22,7 @@ s32 osMotorStop(OSPfs *pfs)
|
||||
__osContLastCmd = CONT_CMD_WRITE_MEMPACK;
|
||||
__osSiRawStartDma(OS_WRITE, &_MotorStopData[pfs->channel]);
|
||||
osRecvMesg(pfs->queue, NULL, OS_MESG_BLOCK);
|
||||
ret = __osSiRawStartDma(OS_READ, &__osPfsPifRam);
|
||||
__osSiRawStartDma(OS_READ, &__osPfsPifRam);
|
||||
osRecvMesg(pfs->queue, NULL, OS_MESG_BLOCK);
|
||||
ptr = (u8 *)&__osPfsPifRam;
|
||||
|
||||
@@ -42,17 +32,13 @@ s32 osMotorStop(OSPfs *pfs)
|
||||
|
||||
ramreadformat = *(__OSContRamReadFormat *)ptr;
|
||||
ret = CHNL_ERR(ramreadformat);
|
||||
if (ret == 0 && ramreadformat.datacrc != __osContDataCrc((u8*)&_motorstopbuf))
|
||||
{
|
||||
if (ret == 0 && ramreadformat.datacrc != 0)
|
||||
ret = PFS_ERR_CONTRFAIL;
|
||||
}
|
||||
__osSiRelAccess();
|
||||
return ret;
|
||||
}
|
||||
|
||||
s32 osMotorStart(OSPfs *pfs)
|
||||
{
|
||||
|
||||
s32 osMotorStart(OSPfs *pfs) {
|
||||
int i;
|
||||
s32 ret;
|
||||
u8 *ptr;
|
||||
@@ -63,7 +49,7 @@ s32 osMotorStart(OSPfs *pfs)
|
||||
__osContLastCmd = CONT_CMD_WRITE_MEMPACK;
|
||||
__osSiRawStartDma(OS_WRITE, &_MotorStartData[pfs->channel]);
|
||||
osRecvMesg(pfs->queue, NULL, OS_MESG_BLOCK);
|
||||
ret = __osSiRawStartDma(OS_READ, &__osPfsPifRam);
|
||||
__osSiRawStartDma(OS_READ, &__osPfsPifRam);
|
||||
osRecvMesg(pfs->queue, NULL, OS_MESG_BLOCK);
|
||||
ptr = (u8 *)&__osPfsPifRam;
|
||||
|
||||
@@ -73,16 +59,13 @@ s32 osMotorStart(OSPfs *pfs)
|
||||
|
||||
ramreadformat = *(__OSContRamReadFormat *)ptr;
|
||||
ret = CHNL_ERR(ramreadformat);
|
||||
if (ret == 0 && ramreadformat.datacrc != __osContDataCrc((u8*)&_motorstartbuf))
|
||||
{
|
||||
if (ret == 0 && ramreadformat.datacrc != 0xEB)
|
||||
ret = PFS_ERR_CONTRFAIL;
|
||||
}
|
||||
__osSiRelAccess();
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void _MakeMotorData(int channel, u16 address, u8 *buffer, OSPifRam *mdata)
|
||||
{
|
||||
static void _MakeMotorData(int channel, u16 address, u8 *buffer, OSPifRam *mdata) {
|
||||
u8 *ptr;
|
||||
__OSContRamReadFormat ramreadformat;
|
||||
int i;
|
||||
@@ -99,12 +82,10 @@ static void _MakeMotorData(int channel, u16 address, u8 *buffer, OSPifRam *mdata
|
||||
ramreadformat.address = (address << 0x5) | __osContAddressCrc(address);
|
||||
ramreadformat.datacrc = CONT_CMD_NOP;
|
||||
for (i = 0; i < ARRLEN(ramreadformat.data); i++)
|
||||
|
||||
ramreadformat.data[i] = *buffer++;
|
||||
if (channel != 0)
|
||||
{
|
||||
for (i = 0; i < channel; i++)
|
||||
{
|
||||
|
||||
if (channel != 0) {
|
||||
for (i = 0; i < channel; i++) {
|
||||
*ptr++ = 0;
|
||||
}
|
||||
}
|
||||
@@ -113,8 +94,7 @@ static void _MakeMotorData(int channel, u16 address, u8 *buffer, OSPifRam *mdata
|
||||
ptr[0] = CONT_CMD_END;
|
||||
}
|
||||
|
||||
s32 osMotorInit(OSMesgQueue *mq, OSPfs *pfs, int channel)
|
||||
{
|
||||
s32 osMotorInit(OSMesgQueue *mq, OSPfs *pfs, int channel) {
|
||||
int i;
|
||||
s32 ret;
|
||||
u8 temp[32];
|
||||
@@ -123,51 +103,33 @@ s32 osMotorInit(OSMesgQueue *mq, OSPfs *pfs, int channel)
|
||||
pfs->status = 0;
|
||||
pfs->activebank = 128;
|
||||
|
||||
for (i = 0; i < ARRLEN(temp); i++)
|
||||
temp[i] = 254;
|
||||
|
||||
ret = __osContRamWrite(mq, channel, 1024, temp, FALSE);
|
||||
if (ret == 2) //TODO: remove magic constant
|
||||
ret = __osContRamWrite(mq, channel, 1024, temp, FALSE);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
ret = __osContRamRead(mq, channel, 1024, temp);
|
||||
if (ret == 2)
|
||||
ret = PFS_ERR_CONTRFAIL; //is this right?
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
if (temp[31] == 254)
|
||||
return PFS_ERR_DEVICE;
|
||||
|
||||
for (i = 0; i < ARRLEN(temp); i++)
|
||||
temp[i] = 128;
|
||||
|
||||
ret = __osContRamWrite(mq, channel, 1024, temp, FALSE);
|
||||
if (ret == 2)
|
||||
|
||||
if (ret == PFS_ERR_NEW_PACK)
|
||||
ret = __osContRamWrite(mq, channel, 1024, temp, FALSE);
|
||||
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
ret = __osContRamRead(mq, channel, 1024, temp);
|
||||
if (ret == 2)
|
||||
ret = PFS_ERR_CONTRFAIL;
|
||||
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
if (temp[31] != 128)
|
||||
return PFS_ERR_DEVICE;
|
||||
|
||||
//if (!__osMotorinitialized[channel])
|
||||
//{
|
||||
for (i = 0; i < ARRLEN(_motorstartbuf); i++)
|
||||
{
|
||||
_motorstartbuf[i] = 1;
|
||||
_motorstopbuf[i] = 0;
|
||||
}
|
||||
_MakeMotorData(channel, 1536, _motorstartbuf, &_MotorStartData[channel]);
|
||||
_MakeMotorData(channel, 1536, _motorstopbuf, &_MotorStopData[channel]);
|
||||
//__osMotorinitialized[channel] = 1;
|
||||
//}
|
||||
if (temp[31] != 128) {
|
||||
return PFS_ERR_DEVICE;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRLEN(_motorstartbuf); i++) {
|
||||
_motorstartbuf[i] = 1;
|
||||
_motorstopbuf[i] = 0;
|
||||
}
|
||||
|
||||
_MakeMotorData(channel, 1536, _motorstartbuf, &_MotorStartData[channel]);
|
||||
_MakeMotorData(channel, 1536, _motorstopbuf, &_MotorStopData[channel]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user