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https://github.com/izzy2lost/Diddy-Kong-Racing.git
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Merge pull request #124 from DavidSM64/doc
Decompiled display lists for unknown_078050 & unknown_07B870
This commit is contained in:
David Benepe
@@ -0,0 +1,62 @@
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#ifndef _F3DDKR_H_
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#define _F3DDKR_H_
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// This file is an extension of PR/gbi.h
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#include "PR/mbi.h"
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#include "PR/gbi.h"
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// Color combiner values. These need better names!
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#define DKR_CC_UNK0 0, 0, 0, COMBINED, COMBINED, 0, PRIMITIVE, 0
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#define DKR_CC_UNK1 ENVIRONMENT, COMBINED, ENV_ALPHA, COMBINED, COMBINED, 0, PRIMITIVE, 0
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#define DKR_CC_UNK2 ENVIRONMENT, COMBINED, ENV_ALPHA, COMBINED, 0, 0, 0, COMBINED
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#define DKR_CC_UNK3 ENVIRONMENT, SHADE, ENV_ALPHA, SHADE, 0, 0, 0, SHADE
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#define DKR_CC_UNK4 ENVIRONMENT, SHADE, ENV_ALPHA, SHADE, 0, 0, 0, PRIMITIVE
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#define DKR_CC_UNK5 TEXEL0, PRIMITIVE, SHADE_ALPHA, PRIMITIVE, TEXEL0, 0, PRIMITIVE, 0
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#define DKR_CC_UNK6 ENVIRONMENT, COMBINED, SHADE, COMBINED, 0, 0, 0, COMBINED
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#define DKR_CC_UNK7 TEXEL1, TEXEL0, PRIMITIVE, TEXEL0, TEXEL1, TEXEL0, PRIMITIVE, TEXEL0
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#define DKR_CC_UNK8 COMBINED, 0, SHADE, 0, 0, 0, 0, COMBINED
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#define DKR_CC_UNK9 PRIMITIVE, ENVIRONMENT, TEXEL0, ENVIRONMENT, TEXEL0, 0, PRIMITIVE, 0
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#define DKR_CC_DECALFADEPRIM 0, 0, 0, TEXEL0, TEXEL0, 0, PRIMITIVE, 0
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// For some reason DKR has a value for G_MDSFT_BLENDMASK, despite the fact that it is unsupported.
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#define G_DKR_BLENDMASK 15
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// OtherMode_H values.
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#define DKR_OMH_COMMON G_DKR_BLENDMASK | G_PM_NPRIMITIVE | G_TD_CLAMP | G_TL_TILE | G_TC_FILT \
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| G_CK_NONE | G_CD_MAGICSQ | G_AD_PATTERN
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#define DKR_OMH_1CYC_POINT DKR_OMH_COMMON | G_CYC_1CYCLE | G_TT_NONE | G_TF_POINT | G_TP_PERSP
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#define DKR_OMH_1CYC_POINT_NOPERSP DKR_OMH_COMMON | G_CYC_1CYCLE | G_TT_NONE | G_TF_POINT | G_TP_NONE
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#define DKR_OMH_1CYC_BILERP DKR_OMH_COMMON | G_CYC_1CYCLE | G_TT_NONE | G_TF_BILERP | G_TP_PERSP
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#define DKR_OMH_1CYC_BILERP_NOPERSP DKR_OMH_COMMON | G_CYC_1CYCLE | G_TT_NONE | G_TF_BILERP | G_TP_NONE
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#define DKR_OMH_1CYC_CI_BILERP DKR_OMH_COMMON | G_CYC_1CYCLE | G_TT_RGBA16 | G_TF_BILERP | G_TP_PERSP
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#define DKR_OMH_2CYC_BILERP DKR_OMH_COMMON | G_CYC_2CYCLE | G_TT_NONE | G_TF_BILERP | G_TP_PERSP
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#define DKR_OMH_2CYC_POINT DKR_OMH_COMMON | G_CYC_2CYCLE | G_TT_NONE | G_TF_POINT | G_TP_PERSP
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#define DKR_OMH_2CYC_CI_BILERP DKR_OMH_COMMON | G_CYC_2CYCLE | G_TT_RGBA16 | G_TF_BILERP | G_TP_PERSP
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// OtherMode_L values.
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#define DKR_OML_COMMON G_AC_NONE | G_ZS_PIXEL
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// Render mode values. These need better names!
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#define DKR_RM_UNKNOWN0 Z_UPD | GBL_c1(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_IN, G_BL_1MA)
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#define DKR_RM_UNKNOWN1 GBL_c1(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_IN, G_BL_1MA)
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#define DKR_RM_UNKNOWN2 AA_EN | IM_RD | CLR_ON_CVG | FORCE_BL | CVG_DST_WRAP | ZMODE_OPA
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#define DKR_RM_UNKNOWN2_1 DKR_RM_UNKNOWN2 | GBL_c1(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)
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#define DKR_RM_UNKNOWN2_2 DKR_RM_UNKNOWN2 | GBL_c2(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)
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#define DKR_RM_UNKNOWN3 AA_EN | Z_CMP | Z_UPD | IM_RD | CVG_X_ALPHA | ALPHA_CVG_SEL | CVG_DST_CLAMP | ZMODE_OPA
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#define DKR_RM_UNKNOWN3_1 DKR_RM_UNKNOWN3 | GBL_c1(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_A_MEM)
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#define DKR_RM_UNKNOWN3_2 DKR_RM_UNKNOWN3 | GBL_c2(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_A_MEM)
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#define DKR_RM_UNKNOWN4 AA_EN | Z_CMP | IM_RD | CVG_X_ALPHA | FORCE_BL | CVG_DST_CLAMP | ZMODE_XLU
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#define DKR_RM_UNKNOWN4_1 DKR_RM_UNKNOWN4 | GBL_c1(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)
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#define DKR_RM_UNKNOWN4_2 DKR_RM_UNKNOWN4 | GBL_c2(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)
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// Temporary until all commands are properly defined.
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#define fast3d_cmd(pkt, word0, word1) \
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{ \
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Gfx *_g = (Gfx*)(pkt); \
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_g->w0 = word0; \
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_g->w1 = word1; \
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}
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#endif
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@@ -16,4 +16,5 @@ typedef struct Gfx {
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_g->w0 = word0; \
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_g->w1 = word1; \
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}
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#endif
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+95
-89
@@ -29,109 +29,115 @@ s32 D_800DE4D4 = 0;
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s32 D_800DE4D8 = 0;
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s32 D_800DE4DC = 0;
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// Fast3D (F3DDKR) display list
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u32 D_800DE4E0[] = {
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0xB6000000, 0x001F3204,
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0xBB000000, 0x00000000,
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0xB7000000, 0x00000204,
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0xBC000404, 0x00000002,
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0xBC000C04, 0x00000002,
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0xBC001404, 0x0000FFFE,
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0xBC001C04, 0x0000FFFE,
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0xB8000000, 0x00000000
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Gfx D_800DE4E0[] = {
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gsSPClearGeometryMode(0x001F3204),
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gsSPTexture(0, 0, 0, 0, 0),
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gsSPSetGeometryMode(G_SHADING_SMOOTH | G_SHADE),
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gsSPClipRatio(FRUSTRATIO_2),
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gsSPEndDisplayList(),
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE520[] = {
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0xBA001402, 0x00000000,
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0xBA001701, 0x00800000,
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0xBA001001, 0x00000000,
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0xBA000E02, 0x00000000,
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0xBA001102, 0x00000000,
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0xBA001301, 0x00080000,
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0xBA000C02, 0x00002000,
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0xBA000903, 0x00000C00,
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0xFCFFFFFF, 0xFFFCF87C,
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0xBA000801, 0x00000000,
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0xB9000002, 0x00000000,
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0xB900031D, 0x0F0A4000,
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0xBA000602, 0x00000000,
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0xE7000000, 0x00000000,
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0xB8000000, 0x00000000
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// Default RDP settings
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Gfx D_800DE520[] = {
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gsDPSetCycleType(G_CYC_1CYCLE),
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gsDPPipelineMode(G_PM_1PRIMITIVE),
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gsDPSetTextureLOD(G_TL_TILE),
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gsDPSetTextureLUT(G_TT_NONE),
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gsDPSetTextureDetail(G_TD_CLAMP),
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gsDPSetTexturePersp(G_TP_PERSP),
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gsDPSetTextureFilter(G_TF_BILERP),
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gsDPSetTextureConvert(G_TC_FILT),
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gsDPSetCombineMode(G_CC_DECALRGB, G_CC_DECALRGB),
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gsDPSetCombineKey(G_CK_NONE),
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gsDPSetAlphaCompare(G_AC_NONE),
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gsDPSetRenderMode(G_RM_OPA_SURF, G_RM_OPA_SURF2),
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gsDPSetColorDither(G_CD_MAGICSQ),
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gsDPPipeSync(),
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gsSPEndDisplayList(),
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE598[] = {
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0xE7000000, 0x00000000,
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0xBA001001, 0x00000000,
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0xBA000E02, 0x00000000,
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0xB9000002, 0x00000000,
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0xB6000000, 0x00010001,
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0xE7000000, 0x00000000,
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0xFCFFFFFF, 0xFFFCF279,
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0xEF000C0F, 0x0F0A4000,
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0xB8000000, 0x00000000
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Gfx D_800DE598[] = {
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gsDPPipeSync(),
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gsDPSetTextureLOD(G_TL_TILE),
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gsDPSetTextureLUT(G_TT_NONE),
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gsDPSetAlphaCompare(G_AC_NONE),
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gsSPClearGeometryMode(G_ZBUFFER | G_FOG),
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gsDPPipeSync(),
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gsDPSetCombineMode(G_CC_DECALRGBA, G_CC_DECALRGBA),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_OPA_SURF | G_RM_OPA_SURF2),
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gsSPEndDisplayList(),
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE5E0[] = {
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0xE7000000, 0x00000000,
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0xBA001001, 0x00000000,
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0xBA000E02, 0x00000000,
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0xB9000002, 0x00000000,
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0xB6000000, 0x00010001,
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0xE7000000, 0x00000000,
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0xFCFFFFFF, 0xFFFDF6FB,
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0xEF000C0F, 0x0F0A4000,
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0xB8000000, 0x00000000
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Gfx D_800DE5E0[] = {
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gsDPPipeSync(),
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gsDPSetTextureLOD(G_TL_TILE),
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gsDPSetTextureLUT(G_TT_NONE),
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gsDPSetAlphaCompare(G_AC_NONE),
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gsSPClearGeometryMode(G_ZBUFFER | G_FOG),
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gsDPPipeSync(),
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gsDPSetCombineMode(G_CC_PRIMITIVE, G_CC_PRIMITIVE),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_OPA_SURF | G_RM_OPA_SURF2),
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gsSPEndDisplayList(),
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE628[] = {
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0xE7000000, 0x00000000,
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0xBA001001, 0x00000000,
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0xBA000E02, 0x00000000,
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0xB9000002, 0x00000000,
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0xB6000000, 0x00010001,
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0xE7000000, 0x00000000,
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0xFC119623, 0xFF2FFFFF,
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0xEF000C0F, 0x00504240,
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0xB8000000, 0x00000000
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Gfx D_800DE628[] = {
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gsDPPipeSync(),
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gsDPSetTextureLOD(G_TL_TILE),
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gsDPSetTextureLUT(G_TT_NONE),
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gsDPSetAlphaCompare(G_AC_NONE),
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gsSPClearGeometryMode(G_ZBUFFER | G_FOG),
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gsDPPipeSync(),
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_XLU_SURF | G_RM_XLU_SURF2),
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gsSPEndDisplayList(),
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE670[] = {
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0xE7000000, 0x00000000,
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0xBA001001, 0x00000000,
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0xBA000E02, 0x00000000,
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0xB9000002, 0x00000000,
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0xB6000000, 0x00010001,
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0xE7000000, 0x00000000,
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0xB8000000, 0x00000000
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Gfx D_800DE670[] = {
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gsDPPipeSync(),
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gsDPSetTextureLOD(G_TL_TILE),
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gsDPSetTextureLUT(G_TT_NONE),
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gsDPSetAlphaCompare(G_AC_NONE),
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gsSPClearGeometryMode(G_ZBUFFER | G_FOG),
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gsDPPipeSync(),
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gsSPEndDisplayList(),
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE6A8[] = {
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0xFC119623, 0xFF2FFFFF,
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0xEF002C0F, 0x00552048,
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0xFC119623, 0xFF2FFFFF,
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0xEF002C0F, 0x0F0A4000,
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0xFC119623, 0xFF2FFFFF,
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0xEF000C0F, 0x00552048,
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0xFC119623, 0xFF2FFFFF,
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0xEF000C0F, 0x0F0A4000
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Gfx D_800DE6A8[][2] = {
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_BILERP_NOPERSP, DKR_OML_COMMON | G_RM_AA_OPA_SURF | G_RM_AA_OPA_SURF2),
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},
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_BILERP_NOPERSP, DKR_OML_COMMON | G_RM_OPA_SURF | G_RM_OPA_SURF2),
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},
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_AA_OPA_SURF | G_RM_AA_OPA_SURF2),
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},
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_OPA_SURF | G_RM_OPA_SURF2),
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}
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};
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// Fast3D (F3DDKR) display list
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u32 D_800DE6E8[] = {
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0xFC119623, 0xFF2FFFFF,
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0xEF002C0F, 0x005041C8,
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0xFC119623, 0xFF2FFFFF,
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0xEF002C0F, 0x00504240,
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0xFC119623, 0xFF2FFFFF,
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0xEF000C0F, 0x005041C8,
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0xFC119623, 0xFF2FFFFF,
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0xEF000C0F, 0x00504240
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Gfx D_800DE6E8[][2] = {
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_BILERP_NOPERSP, DKR_OML_COMMON | G_RM_AA_XLU_SURF | G_RM_AA_XLU_SURF2),
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},
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_BILERP_NOPERSP, DKR_OML_COMMON | G_RM_XLU_SURF | G_RM_XLU_SURF2),
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},
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_AA_XLU_SURF | G_RM_AA_XLU_SURF2),
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},
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{
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gsDPSetCombineMode(G_CC_MODULATEIA_PRIM, G_CC_MODULATEIA_PRIM),
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gsDPSetOtherMode(DKR_OMH_1CYC_POINT_NOPERSP, DKR_OML_COMMON | G_RM_XLU_SURF | G_RM_XLU_SURF2),
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}
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};
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/*******************************/
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@@ -2,6 +2,7 @@
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#define _UNKNOWN_078050_H_
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#include "types.h"
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#include "f3ddkr.h"
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extern s16 D_800DE490[16];
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@@ -20,6 +21,7 @@ extern s32 D_800DE4D4;
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extern s32 D_800DE4D8;
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extern s32 D_800DE4DC;
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/*
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// Fast3D (F3DDKR) display list
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extern u32 D_800DE4E0[];
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@@ -43,5 +45,6 @@ extern u32 D_800DE6A8[];
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// Fast3D (F3DDKR) display list
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extern u32 D_800DE6E8[];
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*/
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#endif
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+802
-427
File diff suppressed because it is too large
Load Diff
@@ -2,12 +2,14 @@
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#define _UNKNOWN_07B870_H_
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#include "types.h"
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#include "f3ddkr.h"
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extern u32 D_800DE7C0;
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extern s32 D_800DE7C4;
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/*
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// Fast3D (F3DDKR) display list
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extern u32 D_800DE7C8[];
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extern Gfx D_800DE7C8[][2];
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// Fast3D (F3DDKR) display list
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extern u32 D_800DE848[];
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@@ -47,5 +49,6 @@ extern u32 D_800DF3D8[];
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// Fast3D (F3DDKR) display list
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extern u32 D_800DF410[];
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*/
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#endif
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