Irix support (libultra_rom/libultra OK) (#44)

* WIP * Add ar * POC * WIP libultra_rom * Simplify Makefile and match initalize * 1 c 1 s left * exceptasm OK * Different weak impl * COMPARE_AR comment for irix * Get ar working and clean up makefile * Some more small cleanup * Split makefile * dereference instead of [0] * Small cleanups * initialize msp and kmc libultra * libultra_rom OK * Warnings * Add to readme * Fix ido ci? * Make libultra_rom default again * PR review * libultra OK * Update Readme * whitespace removal * Small exceptasm clean up * Asm symbols * Bring over improved asm.h * build improvements * asm PR suggestions * Make comment * Fix readme table * strip debug on setup * GBIDEFINEs
2026-01-21 10:37:53 -08:00 · 2023-06-27 17:58:03 -07:00
parent e48fba4c34
commit b376559296
136 changed files with 1441 additions and 470 deletions
--- a/.github/workflows/ci_egcs.txt
+++ b/.github/workflows/ci_egcs.txt
@@ -15,10 +15,10 @@ jobs:
      fail-fast: false
      matrix:
        version: [ique_v1.5]
-        suffix: [_rom] # [, _d, _rom]
+        suffix: [_rom] # [~, _d, _rom]

    steps:
-    - name: Checkout reposistory
+    - name: Checkout repository
      uses: actions/checkout@v3
      with:
        ref: ${{ github.event.pull_request.head.sha }}
--- a/.github/workflows/ci_gcc.yml
+++ b/.github/workflows/ci_gcc.yml
@@ -17,7 +17,7 @@ jobs:
        suffix: [~, _d, _rom]

    steps:
-    - name: Checkout reposistory
+    - name: Checkout repository
      uses: actions/checkout@v3
      with:
        ref: ${{ github.event.pull_request.head.sha }}
--- a/.github/workflows/ci_ido.yml
+++ b/.github/workflows/ci_ido.yml
@@ -1,5 +1,4 @@
 # CI file for IDO builds
-# TODO: rename to `ci_ido.yml` when the repo has IDO support

 name: Build IDO libultra

@@ -15,16 +14,16 @@ jobs:
      fail-fast: false
      matrix:
        version: [L] # [E, F, G, H, I, I_patch, J, K, L]
-        suffix: [_rom] # [, _d, _rom]
+        suffix: [~, _rom] # [~, _d, _rom]

    steps:
-    - name: Checkout reposistory
+    - name: Checkout repository
      uses: actions/checkout@v3
      with:
        ref: ${{ github.event.pull_request.head.sha }}

    - name: Install package requirements
-      run: sudo apt-get install -y build-essential python3
+      run: sudo apt-get install -y build-essential python3 binutils-mips-linux-gnu

    - name: Get extra dependencies
      uses: actions/checkout@v3
--- a/92
+++ b/92
@@ -1,7 +1,10 @@
 NON_MATCHING ?= 0

-# One of libgultra_rom, libgultra_d, libgultra
+# One of:
+# libgultra_rom, libgultra_d, libgultra
+# libultra_rom, libultra_d, libultra
 TARGET ?= libgultra_rom
+CROSS ?= mips-linux-gnu-

 BASE_DIR := base_$(TARGET)
 BASE_AR := $(TARGET).a
@@ -13,24 +16,19 @@ WORKING_DIR := $(shell pwd)

 CPP := cpp -P
 AR := ar
-AS := tools/gcc/as
-CC := tools/gcc/gcc
-AR_OLD := tools/gcc/ar

-export COMPILER_PATH := $(WORKING_DIR)/tools/gcc
-
-CFLAGS := -w -nostdinc -c -G 0 -mgp32 -mfp32 -mips3 -D_LANGUAGE_C
-ASFLAGS := -w -nostdinc -c -G 0 -mgp32 -mfp32 -mips3 -DMIPSEB -D_LANGUAGE_ASSEMBLY -D_MIPS_SIM=1 -D_ULTRA64 -x assembler-with-cpp
-GBIDEFINE := -DF3DEX_GBI_2
-CPPFLAGS = -D_MIPS_SZLONG=32 -D__USE_ISOC99 $(GBIDEFINE)
-INCLUDES = -I . -I $(WORKING_DIR)/include -I $(WORKING_DIR)/include/gcc -I $(WORKING_DIR)/include/PR
+ifeq ($(findstring libgultra,$(TARGET)),libgultra)
+-include Makefile.gcc
+else ifeq ($(findstring libultra,$(TARGET)),libultra)
+-include Makefile.ido
+else
+$(error Invalid Target)
+endif

 ifeq ($(findstring _d,$(TARGET)),_d)
 CPPFLAGS += -D_DEBUG
-OPTFLAGS := -O0
 else
 CPPFLAGS += -DNDEBUG
-OPTFLAGS := -O3
 endif

 ifeq ($(findstring _rom,$(TARGET)),_rom)
@@ -51,6 +49,11 @@ MARKER_FILES := $(O_FILES:.o=.marker)
 ifneq ($(NON_MATCHING),1)
 COMPARE_OBJ = cmp $(BASE_DIR)/$(@F:.marker=.o) $(@:.marker=.o) && echo "$(@:.marker=.o): OK"
 COMPARE_AR = cmp $(BASE_AR) $@ && echo "$@: OK"
+ifeq ($(COMPILER),ido)
+COMPARE_OBJ = $(CROSS)objcopy -p --strip-debug $(WORKING_DIR)/$(@:.marker=.o) $(WORKING_DIR)/$(@:.marker=.cmp.o) && \
+              cmp $(BASE_DIR)/.cmp/$(@F:.marker=.cmp.o) $(WORKING_DIR)/$(@:.marker=.cmp.o) && echo "$(@:.marker=.o): OK"
+COMPARE_AR = echo "$@: Cannot compare archive currently"
+endif
 else
 COMPARE_OBJ :=
 COMPARE_AR :=
@@ -59,7 +62,7 @@ endif

 BASE_OBJS := $(wildcard $(BASE_DIR)/*.o)
 # Try to find a file corresponding to an archive file in any of src/ asm/ or the base directory, prioritizing src then asm then the original file
-AR_ORDER = $(foreach f,$(shell $(AR) t $(BASE_AR)),$(shell find $(BUILD_DIR)/src $(BUILD_DIR)/asm $(BUILD_DIR)/$(BASE_DIR) -name $f -type f -print -quit))
+AR_ORDER = $(foreach f,$(shell $(AR) t $(BASE_AR)),$(shell find $(BUILD_DIR)/src $(BUILD_DIR)/asm $(BUILD_DIR)/$(BASE_DIR) -iname $f -type f -print -quit))
 MATCHED_OBJS = $(filter-out $(BUILD_DIR)/$(BASE_DIR)/%,$(AR_ORDER))
 UNMATCHED_OBJS = $(filter-out $(MATCHED_OBJS),$(AR_ORDER))
 NUM_OBJS = $(words $(AR_ORDER))
@@ -76,7 +79,7 @@ $(BUILD_AR): $(MARKER_FILES)
 ifneq ($(NON_MATCHING),1)
 # patch archive creation time and individual files' ownership & permissions
 	dd bs=1 skip=24 seek=24 count=12 conv=notrunc if=$(BASE_AR) of=$@ status=none
-	python3 tools/patch_ar_meta.py $@
+	python3 tools/patch_ar_meta.py $@ $(BASE_AR) $(PATCH_AR_FLAGS)
 	@$(COMPARE_AR)
 	@echo "Matched: $(NUM_OBJS_MATCHED)/$(NUM_OBJS)"
 endif
@@ -92,78 +95,53 @@ setup:
 	$(MAKE) -C tools
 	cd $(BASE_DIR) && $(AR) xo ../$(BASE_AR)
 	chmod -R +rw $(BASE_DIR)
-
-# KMC gcc has a custom flag, N64ALIGN, which forces 8 byte alignment on arrays. This can be used to match, but
-# an explicit aligned(8) attribute can be used instead. We opted for the latter for better compatibilty with
-# other versions of GCC that do not have this flag.
-# export N64ALIGN := ON
-export VR4300MUL := ON
+ifeq ($(COMPILER),ido)
+	export CROSS=$(CROSS) && ./tools/strip_debug.sh $(BASE_DIR)
+endif

 $(BUILD_DIR)/$(BASE_DIR)/%.marker: $(BASE_DIR)/%.o
 	cp $< $(@:.marker=.o)
 ifneq ($(NON_MATCHING),1)
-#	@$(COMPARE_OBJ)
 # change file timestamps to match original
 	@touch -r $(BASE_DIR)/$(@F:.marker=.o) $(@:.marker=.o)
 	@$(COMPARE_OBJ)
 	@touch $@
 endif

-ifeq ($(findstring _d,$(TARGET)),_d)
-$(BUILD_DIR)/src/rmon/%.marker: OPTFLAGS := -O0
-endif
+GBIDEFINE := -DF3DEX_GBI_2

-STRIP = 
-
-$(BUILD_DIR)/src/os/initialize_isv.marker: OPTFLAGS := -O2
-$(BUILD_DIR)/src/os/initialize_isv.marker: STRIP = && tools/gcc/strip-2.7 -N initialize_isv.c $(WORKING_DIR)/$(@:.marker=.o) $(WORKING_DIR)/$(@:.marker=.o)
-$(BUILD_DIR)/src/os/assert.marker: OPTFLAGS := -O0
-$(BUILD_DIR)/src/os/seterrorhandler.marker: OPTFLAGS := -O0
-$(BUILD_DIR)/src/gu/parse_gbi.marker: GBIDEFINE := 
-$(BUILD_DIR)/src/gu/us2dex_emu.marker: GBIDEFINE := -DF3DEX_GBI
-$(BUILD_DIR)/src/sp/sprite.marker: GBIDEFINE := 
-$(BUILD_DIR)/src/sp/spriteex.marker: GBIDEFINE := 
-$(BUILD_DIR)/src/sp/spriteex2.marker: GBIDEFINE := 
-$(BUILD_DIR)/src/mgu/%.marker: export VR4300MUL := OFF
-$(BUILD_DIR)/src/mgu/rotate.marker: export VR4300MUL := ON
-$(BUILD_DIR)/src/debug/%.marker: ASFLAGS += -P
-$(BUILD_DIR)/src/error/%.marker: ASFLAGS += -P
-$(BUILD_DIR)/src/log/%.marker: ASFLAGS += -P
-$(BUILD_DIR)/src/os/%.marker: ASFLAGS += -P
-$(BUILD_DIR)/src/gu/%.marker: ASFLAGS += -P
-$(BUILD_DIR)/src/libc/%.marker: ASFLAGS += -P
-$(BUILD_DIR)/src/rmon/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/gu/parse_gbi.marker: GBIDEFINE := -DF3D_GBI
+$(BUILD_DIR)/src/gu/us2dex_emu.marker: GBIDEFINE :=
+$(BUILD_DIR)/src/gu/us2dex2_emu.marker: GBIDEFINE :=
+$(BUILD_DIR)/src/sp/sprite.marker: GBIDEFINE := -DF3D_GBI
+$(BUILD_DIR)/src/sp/spriteex.marker: GBIDEFINE :=
+$(BUILD_DIR)/src/sp/spriteex2.marker: GBIDEFINE :=
 $(BUILD_DIR)/src/voice/%.marker: OPTFLAGS += -DLANG_JAPANESE -I$(WORKING_DIR)/src -I$(WORKING_DIR)/src/voice
 $(BUILD_DIR)/src/voice/%.marker: CC := tools/compile_sjis.py -D__CC=$(WORKING_DIR)/$(CC) -D__BUILD_DIR=$(BUILD_DIR)
-$(BUILD_DIR)/src/host/host_ptn64.marker: CFLAGS += -fno-builtin # Probably a better way to solve this
-
-MDEBUG_FILES := $(BUILD_DIR)/src/monutil.marker
-$(BUILD_DIR)/src/monutil.marker: CC := tools/ido/cc
-$(BUILD_DIR)/src/monutil.marker: ASFLAGS := -non_shared -mips2 -fullwarn -verbose -Xcpluscomm -G 0 -woff 516,649,838,712 -Wab,-r4300_mul -nostdinc -o32 -c

 $(BUILD_DIR)/%.marker: %.c
-	cd $(<D) && $(WORKING_DIR)/$(CC) $(CFLAGS) $(CPPFLAGS) $(OPTFLAGS) $(<F) $(INCLUDES) -o $(WORKING_DIR)/$(@:.marker=.o)
+	cd $(<D) && $(WORKING_DIR)/$(CC) $(CFLAGS) $(MIPS_VERSION) $(CPPFLAGS) $(OPTFLAGS) $(<F) $(IINC) -o $(WORKING_DIR)/$(@:.marker=.o)
 ifneq ($(NON_MATCHING),1)
 # check if this file is in the archive; patch corrupted bytes and change file timestamps to match original if so
-		$(if $(findstring $(BASE_DIR)/$(@F:.marker=.o), $(BASE_OBJS)), \
+	@$(if $(findstring $(BASE_DIR)/$(@F:.marker=.o), $(BASE_OBJS)), \
 	 python3 tools/fix_objfile.py $(@:.marker=.o) $(BASE_DIR)/$(@F:.marker=.o) $(STRIP) && \
 	 $(COMPARE_OBJ) && \
 	 touch -r $(BASE_DIR)/$(@F:.marker=.o) $(@:.marker=.o), \
-	 echo "Object file $(<F:.marker=.o) is not in the current archive" \
+	 echo "Object file $(@F:.marker=.o) is not in the current archive" \
 	)
 # create or update the marker file
 	@touch $@
 endif

 $(BUILD_DIR)/%.marker: %.s
-	cd $(<D) && $(WORKING_DIR)/$(CC) $(ASFLAGS) $(CPPFLAGS) $(<F) $(INCLUDES) -o $(WORKING_DIR)/$(@:.marker=.o)
+	cd $(<D) && $(WORKING_DIR)/$(CC) $(ASFLAGS) $(MIPS_VERSION) $(CPPFLAGS) $(ASOPTFLAGS) $(<F) $(IINC) -o $(WORKING_DIR)/$(@:.marker=.o)
 ifneq ($(NON_MATCHING),1)
 # check if this file is in the archive; patch corrupted bytes and change file timestamps to match original if so
 	@$(if $(findstring $(BASE_DIR)/$(@F:.marker=.o), $(BASE_OBJS)), \
-	 python3 tools/fix_objfile.py $(@:.marker=.o) $(BASE_DIR)/$(@F:.marker=.o) && \
+	 python3 tools/fix_objfile.py $(@:.marker=.o) $(BASE_DIR)/$(@F:.marker=.o) $(STRIP) && \
 	 $(COMPARE_OBJ) && \
 	 touch -r $(BASE_DIR)/$(@F:.marker=.o) $(@:.marker=.o), \
-	 echo "Object file $(<F:.marker=.o) is not in the current archive" \
+	 echo "Object file $(@F:.marker=.o) is not in the current archive" \
 	)
 # create or update the marker file
 	@touch $@
@@ -181,7 +159,7 @@ ifneq ($(NON_MATCHING),1)
 	 python3 tools/fix_objfile.py $(@:.marker=.o) $(BASE_DIR)/$(@F:.marker=.o) && \
 	 $(COMPARE_OBJ) && \
 	 touch -r $(BASE_DIR)/$(@F:.marker=.o) $(@:.marker=.o), \
-	 echo "Object file $(<F:.marker=.o) is not in the current archive" \
+	 echo "Object file $(@F:.marker=.o) is not in the current archive" \
 	)
 # create or update the marker file
 	@touch $@
--- a/Makefile.gcc
+++ b/Makefile.gcc
@@ -0,0 +1,50 @@
+COMPILER := gcc
+AS := tools/gcc/as
+CC := tools/gcc/gcc
+AR_OLD := tools/gcc/ar
+PATCH_AR_FLAGS := 0 0 37777700
+STRIP =
+
+export COMPILER_PATH := $(WORKING_DIR)/tools/gcc
+
+CFLAGS := -w -nostdinc -c -G 0 -mgp32 -mfp32 -D_LANGUAGE_C
+ASFLAGS := -w -nostdinc -c -G 0 -mgp32 -mfp32 -DMIPSEB -D_LANGUAGE_ASSEMBLY -D_MIPS_SIM=1 -D_ULTRA64 -x assembler-with-cpp
+CPPFLAGS = -D_MIPS_SZLONG=32 -D__USE_ISOC99 $(GBIDEFINE)
+IINC = -I . -I $(WORKING_DIR)/include -I $(WORKING_DIR)/include/gcc -I $(WORKING_DIR)/include/PR
+MIPS_VERSION := -mips3
+ASOPTFLAGS :=
+
+ifeq ($(findstring _d,$(TARGET)),_d)
+OPTFLAGS := -O0
+else
+OPTFLAGS := -O3
+endif
+
+ifeq ($(findstring _d,$(TARGET)),_d)
+$(BUILD_DIR)/src/rmon/%.marker: OPTFLAGS := -O0
+endif
+
+# KMC gcc has a custom flag, N64ALIGN, which forces 8 byte alignment on arrays. This can be used to match, but
+# an explicit aligned(8) attribute can be used instead. We opted for the latter for better compatibilty with
+# other versions of GCC that do not have this flag.
+# export N64ALIGN := ON
+export VR4300MUL := ON
+
+$(BUILD_DIR)/src/os/initialize_isv.marker: OPTFLAGS := -O2
+$(BUILD_DIR)/src/os/initialize_isv.marker: STRIP = && tools/gcc/strip-2.7 -N initialize_isv.c $(WORKING_DIR)/$(@:.marker=.o)
+$(BUILD_DIR)/src/os/assert.marker: OPTFLAGS := -O0
+$(BUILD_DIR)/src/os/seterrorhandler.marker: OPTFLAGS := -O0
+$(BUILD_DIR)/src/mgu/%.marker: export VR4300MUL := OFF
+$(BUILD_DIR)/src/mgu/rotate.marker: export VR4300MUL := ON
+$(BUILD_DIR)/src/debug/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/error/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/log/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/os/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/gu/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/libc/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/rmon/%.marker: ASFLAGS += -P
+$(BUILD_DIR)/src/host/host_ptn64.marker: CFLAGS += -fno-builtin # Probably a better way to solve this
+
+MDEBUG_FILES := $(BUILD_DIR)/src/monutil.marker
+$(BUILD_DIR)/src/monutil.marker: CC := tools/ido/cc
+$(BUILD_DIR)/src/monutil.marker: ASFLAGS := -non_shared -mips2 -fullwarn -verbose -Xcpluscomm -G 0 -woff 516,649,838,712 -Wab,-r4300_mul -nostdinc -o32 -c
--- a/Makefile.ido
+++ b/Makefile.ido
@@ -0,0 +1,45 @@
+COMPILER := ido
+AS := tools/ido/cc
+CC := tools/ido/cc
+AR_OLD := tools/ar.py
+PATCH_AR_FLAGS := 40001 110 100644
+STRIP =
+
+export COMPILER_PATH := $(WORKING_DIR)/tools/ido
+
+CFLAGS := -c -Wab,-r4300_mul -G 0 -nostdinc -Xcpluscomm -fullwarn -woff 516,649,838,712
+ASFLAGS := -c -Wab,-r4300_mul -G 0 -nostdinc -woff 516,649,838,712
+CPPFLAGS = -D_MIPS_SZLONG=32 $(GBIDEFINE) $(PICFLAGS)
+IINC = -I $(WORKING_DIR)/include -I $(WORKING_DIR)/include/ido -I $(WORKING_DIR)/include/PR
+MIPS_VERSION := -mips2 -o32
+PICFLAGS := -non_shared
+
+ifeq ($(findstring _d,$(TARGET)),_d)
+OPTFLAGS := -O1 -g2
+ASOPTFLAGS := -O0 -g2
+else
+OPTFLAGS := -O2
+ASOPTFLAGS := -O1
+endif
+
+ifneq ($(findstring _d,$(TARGET)),_d)
+$(BUILD_DIR)/src/debug/%.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/host/%.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/os/%.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/rmon/%.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/libc/ll.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/libc/llbit.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/libc/llcvt.marker: OPTFLAGS := -O1
+$(BUILD_DIR)/src/log/%.marker: OPTFLAGS := -O1
+
+$(BUILD_DIR)/src/libc/%.marker: ASOPTFLAGS := -O2
+$(BUILD_DIR)/src/mgu/%.marker: ASOPTFLAGS := -O2
+endif
+
+$(BUILD_DIR)/src/os/initialize_isv.marker: OPTFLAGS := -O2
+$(BUILD_DIR)/src/libc/ll.marker: MIPS_VERSION := -mips3 -32
+$(BUILD_DIR)/src/libc/llbit.marker: MIPS_VERSION := -mips3 -32
+$(BUILD_DIR)/src/libc/llcvt.marker: MIPS_VERSION := -mips3 -32
+$(BUILD_DIR)/src/os/exceptasm.marker: MIPS_VERSION := -mips3 -32
+$(BUILD_DIR)/src/log/delay.marker: MIPS_VERSION := -mips1 -o32
+$(BUILD_DIR)/src/log/delay.marker: PICFLAGS := -KPIC
--- a/README.md
+++ b/README.md
@@ -16,7 +16,7 @@ Currently this repo supports building the following versions:
 | 2.0I_patch | :x: / :x: | :x: / :x: | :x: / :x: |
 | 2.0J       | :x: / :x: | :x: / :x: | :x: / :x: |
 | 2.0K       | :x: / :x: | :x: / :x: | :x: / :x: |
-| 2.0L       | :x: / :heavy_check_mark: | :x: / :heavy_check_mark: | :x: / :heavy_check_mark: |
+| 2.0L       | :heavy_check_mark: / :heavy_check_mark: | :x: / :heavy_check_mark: | :heavy_check_mark: / :heavy_check_mark: |
 | ique_v1.5  | :x: | :x: | :x: |

 ## Preparation
@@ -29,6 +29,7 @@ The build process requires the following packages:

 - build-essential
 - python3
+- binutils-mips-linux-gnu (libultra* only)

 Under Debian / Ubunutu you can install them with the following commands:

@@ -37,6 +38,12 @@ sudo apt update
 sudo apt install build-essential python3
 ```

+If building any libultra you can install binutils-mips-linux-gnu with:
+
+```bash
+sudo apt install binutils-mips-linux-gnu
+```
+
 ## Building

 - `make setup`
--- a/include/PR/os_internal.h
+++ b/include/PR/os_internal.h
@@ -39,7 +39,6 @@ extern "C" {
 #include "os_internal_thread.h"
 #include "os_internal_debug.h"
 #include "os_internal_host.h"
-#include "os_internal_flash.h"

 #endif /* _LANGUAGE_C */

--- a/include/PR/os_internal_flash.h
+++ b/include/PR/os_internal_flash.h
@@ -28,11 +28,11 @@
 /* set read mode */
 #define FLASH_CMD_READ_ARRAY    0xF0000000

-extern s32 __osFlashVersion;
-extern OSPiHandle __osFlashHandler;
-extern OSMesgQueue __osFlashMessageQ;
-extern OSMesg __osFlashMsgBuf[1];
 extern OSIoMesg __osFlashMsg;
+extern OSMesgQueue __osFlashMessageQ;
+extern OSPiHandle __osFlashHandler;
+extern OSMesg __osFlashMsgBuf[1];
+extern s32 __osFlashVersion;
 extern u32 __osFlashID[4];

 u32 __osFlashGetAddr(u32 page_num);
--- a/include/PR/rcp.h
+++ b/include/PR/rcp.h
@@ -156,31 +156,31 @@

 #define SP_BASE_REG         0x04040000

-//! SP memory address (R/W): [11:0] DMEM/IMEM address, [12] 0=DMEM,1=IMEM
+/* SP memory address (R/W): [11:0] DMEM/IMEM address, [12] 0=DMEM,1=IMEM */
 #define SP_MEM_ADDR_REG     (SP_BASE_REG + 0x00)

-//! SP DRAM DMA address (R/W): [23:0] RDRAM address
+/* SP DRAM DMA address (R/W): [23:0] RDRAM address */
 #define SP_DRAM_ADDR_REG    (SP_BASE_REG + 0x04)

-//! SP read DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip; RDRAM -> I/DMEM
+/* SP read DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip; RDRAM -> I/DMEM */
 #define SP_RD_LEN_REG       (SP_BASE_REG + 0x08)

-//! SP write DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip; I/DMEM -> RDRAM
+/* SP write DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip; I/DMEM -> RDRAM */
 #define SP_WR_LEN_REG       (SP_BASE_REG + 0x0C)

-//! SP status (R/W): [14:0] valid bits; see below for write/read mode
+/* SP status (R/W): [14:0] valid bits; see below for write/read mode */
 #define SP_STATUS_REG       (SP_BASE_REG + 0x10)

-//! SP DMA full (R): [0] dma full
+/* SP DMA full (R): [0] dma full */
 #define SP_DMA_FULL_REG     (SP_BASE_REG + 0x14)

-//! SP DMA busy (R): [0] dma busy
+/* SP DMA busy (R): [0] dma busy */
 #define SP_DMA_BUSY_REG     (SP_BASE_REG + 0x18)

-//! SP semaphore (R/W): Read: [0] acquire semaphore; Write: [] release semaphore
+/* SP semaphore (R/W): Read: [0] acquire semaphore; Write: [] release semaphore */
 #define SP_SEMAPHORE_REG    (SP_BASE_REG + 0x1C)

-//! SP PC (R/W): [11:0] program counter
+/* SP PC (R/W): [11:0] program counter */
 #define SP_PC_REG       0x04080000

 /**
@@ -192,31 +192,31 @@
 /**
 * SP_STATUS_REG: write bits
 */
-#define SP_CLR_HALT         (1 <<  0)   // clear halt
-#define SP_SET_HALT         (1 <<  1)   //   set halt
-#define SP_CLR_BROKE        (1 <<  2)   // clear broke
-#define SP_CLR_INTR         (1 <<  3)   // clear interrupt
-#define SP_SET_INTR         (1 <<  4)   //   set interrupt
-#define SP_CLR_SSTEP        (1 <<  5)   // clear sstep
-#define SP_SET_SSTEP        (1 <<  6)   //   set sstep
-#define SP_CLR_INTR_BREAK   (1 <<  7)   // clear interrupt on break
-#define SP_SET_INTR_BREAK   (1 <<  8)   //   set interrupt on break
-#define SP_CLR_SIG0         (1 <<  9)   // clear signal 0
-#define SP_SET_SIG0         (1 << 10)   //   set signal 0
-#define SP_CLR_SIG1         (1 << 11)   // clear signal 1
-#define SP_SET_SIG1         (1 << 12)   //   set signal 1
-#define SP_CLR_SIG2         (1 << 13)   // clear signal 2
-#define SP_SET_SIG2         (1 << 14)   //   set signal 2
-#define SP_CLR_SIG3         (1 << 15)   // clear signal 3
-#define SP_SET_SIG3         (1 << 16)   //   set signal 3
-#define SP_CLR_SIG4         (1 << 17)   // clear signal 4
-#define SP_SET_SIG4         (1 << 18)   //   set signal 4
-#define SP_CLR_SIG5         (1 << 19)   // clear signal 5
-#define SP_SET_SIG5         (1 << 20)   //   set signal 5
-#define SP_CLR_SIG6         (1 << 21)   // clear signal 6
-#define SP_SET_SIG6         (1 << 22)   //   set signal 6
-#define SP_CLR_SIG7         (1 << 23)   // clear signal 7
-#define SP_SET_SIG7         (1 << 24)   //   set signal 7
+#define SP_CLR_HALT         (1 <<  0)   /* clear halt */
+#define SP_SET_HALT         (1 <<  1)   /*   set halt */
+#define SP_CLR_BROKE        (1 <<  2)   /* clear broke */
+#define SP_CLR_INTR         (1 <<  3)   /* clear interrupt */
+#define SP_SET_INTR         (1 <<  4)   /*   set interrupt */
+#define SP_CLR_SSTEP        (1 <<  5)   /* clear sstep */
+#define SP_SET_SSTEP        (1 <<  6)   /*   set sstep */
+#define SP_CLR_INTR_BREAK   (1 <<  7)   /* clear interrupt on break */
+#define SP_SET_INTR_BREAK   (1 <<  8)   /*   set interrupt on break */
+#define SP_CLR_SIG0         (1 <<  9)   /* clear signal 0 */
+#define SP_SET_SIG0         (1 << 10)   /*   set signal 0 */
+#define SP_CLR_SIG1         (1 << 11)   /* clear signal 1 */
+#define SP_SET_SIG1         (1 << 12)   /*   set signal 1 */
+#define SP_CLR_SIG2         (1 << 13)   /* clear signal 2 */
+#define SP_SET_SIG2         (1 << 14)   /*   set signal 2 */
+#define SP_CLR_SIG3         (1 << 15)   /* clear signal 3 */
+#define SP_SET_SIG3         (1 << 16)   /*   set signal 3 */
+#define SP_CLR_SIG4         (1 << 17)   /* clear signal 4 */
+#define SP_SET_SIG4         (1 << 18)   /*   set signal 4 */
+#define SP_CLR_SIG5         (1 << 19)   /* clear signal 5 */
+#define SP_SET_SIG5         (1 << 20)   /*   set signal 5 */
+#define SP_CLR_SIG6         (1 << 21)   /* clear signal 6 */
+#define SP_SET_SIG6         (1 << 22)   /*   set signal 6 */
+#define SP_CLR_SIG7         (1 << 23)   /* clear signal 7 */
+#define SP_SET_SIG7         (1 << 24)   /*   set signal 7 */

 /*
 * SP_STATUS_REG: read bits
@@ -264,44 +264,44 @@
 /*
 * SP_IBIST_REG: write bits
 */
-#define SP_IBIST_CHECK      (1 << 0)    // BIST check
-#define SP_IBIST_GO         (1 << 1)    // BIST go
-#define SP_IBIST_CLEAR      (1 << 2)    // BIST clear
+#define SP_IBIST_CHECK      (1 << 0)    /* BIST check */
+#define SP_IBIST_GO         (1 << 1)    /* BIST go */
+#define SP_IBIST_CLEAR      (1 << 2)    /* BIST clear */

 /*
 * SP_BIST_REG: read bits
 * First 2 bits are same as in write mode
 */
 #define SP_IBIST_DONE       (1 << 2)
-#define SP_IBIST_FAILED     0x78        // bits [6:3], BIST fail
+#define SP_IBIST_FAILED     0x78        /* bits [6:3], BIST fail */

 /**
 * Display Processor Command (DPC) Registers
 */
 #define DPC_BASE_REG        0x04100000

-//! DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address
+/* DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address */
 #define DPC_START_REG       (DPC_BASE_REG + 0x00)

-//! DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address
+/* DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address */
 #define DPC_END_REG         (DPC_BASE_REG + 0x04)

-//! DP CMD DMA end (R): [23:0] DMEM/RDRAM current address
+/* DP CMD DMA end (R): [23:0] DMEM/RDRAM current address */
 #define DPC_CURRENT_REG     (DPC_BASE_REG + 0x08)

-//! DP CMD status (R/W): [9:0] valid bits - see below for definitions
+/* DP CMD status (R/W): [9:0] valid bits - see below for definitions */
 #define DPC_STATUS_REG      (DPC_BASE_REG + 0x0C)

-//! DP clock counter (R): [23:0] clock counter
+/* DP clock counter (R): [23:0] clock counter */
 #define DPC_CLOCK_REG       (DPC_BASE_REG + 0x10)

-//! DP buffer busy counter (R): [23:0] clock counter
+/* DP buffer busy counter (R): [23:0] clock counter */
 #define DPC_BUFBUSY_REG     (DPC_BASE_REG + 0x14)

-//! DP pipe busy counter (R): [23:0] clock counter
+/* DP pipe busy counter (R): [23:0] clock counter */
 #define DPC_PIPEBUSY_REG    (DPC_BASE_REG + 0x18)

-//! DP TMEM load counter (R): [23:0] clock counter
+/* DP TMEM load counter (R): [23:0] clock counter */
 #define DPC_TMEM_REG        (DPC_BASE_REG + 0x1C)

 /**
@@ -338,16 +338,16 @@
 */
 #define DPS_BASE_REG            0x04200000

-//! DP tmem built-in self-test (R/W): [10:0] BIST status bits
+/* DP tmem built-in self-test (R/W): [10:0] BIST status bits */
 #define DPS_TBIST_REG           (DPS_BASE_REG + 0x00)

-//! DP span test mode (R/W): [0] Span buffer test access enable
+/* DP span test mode (R/W): [0] Span buffer test access enable */
 #define DPS_TEST_MODE_REG       (DPS_BASE_REG + 0x04)

-//! DP span buffer test address (R/W): [6:0] bits
+/* DP span buffer test address (R/W): [6:0] bits */
 #define DPS_BUFTEST_ADDR_REG    (DPS_BASE_REG + 0x08)

-//! DP span buffer test data (R/W): [31:0] span buffer data
+/* DP span buffer test data (R/W): [31:0] span buffer data */
 #define DPS_BUFTEST_DATA_REG    (DPS_BASE_REG + 0x0C)

 /*
@@ -362,7 +362,7 @@
 * First 2 bits are same as in write mode
 */
 #define DPS_TBIST_DONE      (1 << 2)
-#define DPS_TBIST_FAILED    0x7F8       // bits [10:3], BIST fail
+#define DPS_TBIST_FAILED    0x7F8       /* bits [10:3], BIST fail */

 /**
 * MIPS Interface (MI) Registers
@@ -395,11 +395,11 @@
 #define MI_MODE_EBUS    (1 << 8)    /* ebus test mode */
 #define MI_MODE_RDRAM   (1 << 9)    /* RDRAM reg mode */

-//! MI version (R): [7:0] io, [15:8] rac, [23:16] rdp, [31:24] rsp
+/* MI version (R): [7:0] io, [15:8] rac, [23:16] rdp, [31:24] rsp */
 #define MI_VERSION_REG  (MI_BASE_REG + 0x04)
 #define MI_NOOP_REG     MI_VERSION_REG

-//! MI interrupt (R): [5:0] valid bits - see below for bit patterns
+/* MI interrupt (R): [5:0] valid bits - see below for bit patterns */
 #define MI_INTR_REG     (MI_BASE_REG + 0x08)

 /* 
@@ -792,27 +792,27 @@
 */
 #define SI_BASE_REG             0x04800000

-//! SI DRAM address (R/W): [23:0] starting RDRAM address
+/* SI DRAM address (R/W): [23:0] starting RDRAM address */
 #define SI_DRAM_ADDR_REG        (SI_BASE_REG + 0x00)

-//! SI address read 64B (W): [] write begins a 64B DMA write PIF RAM -> RDRAM
+/* SI address read 64B (W): [] write begins a 64B DMA write PIF RAM -> RDRAM */
 #define SI_PIF_ADDR_RD64B_REG   (SI_BASE_REG + 0x04)

-//! Address SI_BASE_REG + (0x08, 0x0C, 0x14) are reserved
+/* Address SI_BASE_REG + (0x08, 0x0C, 0x14) are reserved */

-//! SI address write 64B (W): [] write begins a 64B DMA read RDRAM -> PIF RAM */
+/* SI address write 64B (W): [] write begins a 64B DMA read RDRAM -> PIF RAM */
 #define SI_PIF_ADDR_WR64B_REG   (SI_BASE_REG + 0x10)

-//! SI status (R/W): [] any write clears interrupt
+/* SI status (R/W): [] any write clears interrupt */
 #define SI_STATUS_REG           (SI_BASE_REG + 0x18)

 /*
 * SI_STATUS_REG: read bits
 */
-#define SI_STATUS_DMA_BUSY  (1 <<  0) // DMA in progress
-#define SI_STATUS_RD_BUSY   (1 <<  1) // IO access in progress
-#define SI_STATUS_DMA_ERROR (1 <<  3) // Overlapping DMA requests
-#define SI_STATUS_INTERRUPT (1 << 12) // Interrupt is set
+#define SI_STATUS_DMA_BUSY  (1 <<  0) /* DMA in progress */
+#define SI_STATUS_RD_BUSY   (1 <<  1) /* IO access in progress */
+#define SI_STATUS_DMA_ERROR (1 <<  3) /* Overlapping DMA requests */
+#define SI_STATUS_INTERRUPT (1 << 12) /* Interrupt is set */

 /**
 * Development Board GIO Control Registers 
--- a/include/ido/math.h
+++ b/include/ido/math.h
@@ -0,0 +1 @@
+// Nothing needed here
--- a/include/ido/memory.h
+++ b/include/ido/memory.h
@@ -0,0 +1,23 @@
+#ifndef _MEMORY_H
+#define _MEMORY_H
+/*
+	memory.h
+*/
+
+#ifndef _SIZE_T_DEF
+#define _SIZE_T_DEF
+typedef unsigned size_t;
+#endif
+
+void *memccpy(void *,void *,int,size_t);
+void *memchr(void *,int,size_t);
+int  memcmp(const void *,const void *,size_t);
+void *memcpy(void *,const void *,size_t);
+int  memicmp(void *,void *,size_t);
+void *memmove(void *,void *,size_t);
+void *memset(void *,int,size_t);
+
+void movmem(void *,void *,unsigned);
+void setmem(void *,unsigned,int);
+
+#endif
--- a/include/ido/stdarg.h
+++ b/include/ido/stdarg.h
@@ -0,0 +1,33 @@
+#ifndef _STDARG_H
+#define _STDARG_H
+
+typedef char *va_list;
+#define _FP 1
+#define _INT 0
+#define _STRUCT 2
+
+#define _VA_FP_SAVE_AREA 0x10
+#define _VA_ALIGN(p, a) (((unsigned int)(((char *)p) + ((a) > 4 ? (a) : 4) - 1)) & -((a) > 4 ? (a) : 4))
+#define va_start(vp, parmN) (vp = ((va_list)&parmN + sizeof(parmN)))
+
+#define __va_stack_arg(list, mode)                          \
+    (                                                       \
+        ((list) = (char *)_VA_ALIGN(list, __builtin_alignof(mode)) + \
+                  _VA_ALIGN(sizeof(mode), 4)),              \
+        (((char *)list) - (_VA_ALIGN(sizeof(mode), 4) - sizeof(mode))))
+
+#define __va_double_arg(list, mode)                                                                    \
+    (                                                                                                  \
+        (((long)list & 0x1) /* 1 byte aligned? */                                                      \
+             ? (list = (char *)((long)list + 7), (char *)((long)list - 6 - _VA_FP_SAVE_AREA))          \
+             : (((long)list & 0x2) /* 2 byte aligned? */                                               \
+                    ? (list = (char *)((long)list + 10), (char *)((long)list - 24 - _VA_FP_SAVE_AREA)) \
+                    : __va_stack_arg(list, mode))))
+
+#define va_arg(list, mode) ((mode *)(((__builtin_classof(mode) == _FP &&          \
+                                       __builtin_alignof(mode) == sizeof(double)) \
+                                          ? __va_double_arg(list, mode)           \
+                                          : __va_stack_arg(list, mode))))[-1]
+#define va_end(__list)
+
+#endif /* STDARG_H */
--- a/include/ido/stdio.h
+++ b/include/ido/stdio.h
@@ -0,0 +1 @@
+// Nothing needed here
--- a/include/ido/stdlib.h
+++ b/include/ido/stdlib.h
@@ -0,0 +1,81 @@
+#ifndef _STDLIB_H
+#define _STDLIB_H
+/*
+		stdlib.h
+*/
+
+#ifndef _SIZE_T_DEF
+#define _SIZE_T_DEF
+typedef unsigned size_t;
+#endif
+
+#ifndef _DIV_T_DEF
+#define _DIV_T_DEF
+typedef	struct DIV_T {
+	int quot;
+	int rem;
+} div_t;
+#endif
+
+#ifndef _LDIV_T_DEF
+#define _LDIV_T_DEF
+typedef	struct LDIV_T {
+	long quot;
+	long rem;
+} ldiv_t;
+#endif
+
+#ifndef _LLDIV_T_DEF
+#define _LLDIV_T_DEF
+typedef struct lldiv_t
+{
+    long long quot;
+    long long rem;
+} lldiv_t;
+#endif
+
+#ifndef NULL
+#define NULL		0
+#endif
+
+#define	_max(a,b)	(((a) > (b)) ? (a) : (b))
+#define	_min(a,b)	(((a) < (b)) ? (a) : (b))
+
+#define	RAND_MAX	32767
+
+int  rand(void);
+void srand(unsigned);
+
+int  abs(int);
+long labs(long);
+
+div_t  div(int,int);
+ldiv_t ldiv(long,long);
+lldiv_t lldiv(long long, long long);
+
+int  atoi(const char *);
+long atol(const char *);
+
+long strtol(const char *,char **,int);
+unsigned long strtoul(const char *,char **,int);
+
+char *itoa(int,char *,int);
+char *ltoa(long,char *,int);
+char *ultoa(unsigned long,char *,int);
+
+double atof(const char *);
+double strtod(const char *,char **);
+
+void qsort(void *,size_t,size_t,int (*)(const void *,const void *));
+void *bsearch(const void *,const void *,size_t,size_t,int (*)(const void *,const void *));
+
+void *malloc(size_t);
+void *calloc(size_t,size_t);
+void *realloc(void *,size_t);
+void free(void *);
+
+void exit(int);
+
+void abort(void);
+
+#endif
--- a/include/ido/string.h
+++ b/include/ido/string.h
@@ -0,0 +1,42 @@
+#ifndef _STRING_H
+#define _STRING_H
+/*
+	string.h
+*/
+
+#ifndef _SIZE_T_DEF
+#define _SIZE_T_DEF
+typedef unsigned size_t;
+#endif
+
+#include "memory.h"
+
+char *stpcpy(char *,const char *);
+char *strcat(char *,const char *);
+char *strchr(const char *,int);
+int  strcmp(const char *,const char *);
+char *strcpy(char *,const char *);
+size_t strcspn(const char *,const char *);
+char *strdup(const char *);
+char *strerror(int);
+int  stricmp(const char *,const char *);
+size_t strlen(const char *);
+char *strlwr(char *);
+char *strncat(char *,const char *,size_t);
+int  strncmp(const char *,const char *,size_t);
+char *strncpy(char *,const char *,size_t);
+int  strnicmp(const char *,const char *,size_t);
+char *strnset(char *,int,size_t);
+char *strpbrk(const char *,const char *);
+char *strrchr(const char *,int);
+char *strrev(char *);
+char *strset(char *,int);
+size_t strspn(const char *,const char *);
+char *strstr(const char *,const char *);
+char *strtok(char *,const char *);
+char *strupr(char *);
+
+#define strcmpi(s1,s2)		stricmp(s1,s2)
+#define strncmpi(s1,s2,n)	strnicmp(s1,s2,n)
+
+#endif
--- a/include/macros.h
+++ b/include/macros.h
@@ -5,7 +5,7 @@

 #define ARRLEN(x) ((s32)(sizeof(x) / sizeof(x[0])))

-#define STUBBED_PRINTF(x)
+#define STUBBED_PRINTF(x) ((void)(x))

 #define UNUSED __attribute__((unused))

--- a/include/sys/asm.h
+++ b/include/sys/asm.h
@@ -1,7 +1,7 @@
 /************************************************************************
 Copyright (C) 1998,1999 NINTENDO Co,Ltd,
 Copyright (C) 1998,1999 MONEGI CORPORATION,
-	All Rights Reserved
+    All Rights Reserved
 This program is a trade secret of NINTENDO Co,Ltd and MONEGI Corp. 
 and it is not to be reproduced, published, disclosed to others, copied,
 adapted, distributed, or displayed without the prior authorization of 
@@ -22,48 +22,92 @@ modified versions thereof.
 extern "C" {
 #endif

-#define _MIPS_ISA_MIPS1	1	/* R2/3K */
-#define _MIPS_ISA_MIPS2	2	/* R4K/6K */
-#define _MIPS_ISA_MIPS3	3	/* R4K */
-#define _MIPS_ISA_MIPS4	4	/* TFP */
+#define _MIPS_ISA_MIPS1 1   /* R2/3K */
+#define _MIPS_ISA_MIPS2 2   /* R4K/6K */
+#define _MIPS_ISA_MIPS3 3   /* R4K */
+#define _MIPS_ISA_MIPS4 4   /* TFP */

-#define _MIPS_SIM_ABI32		1	/* MIPS MSIG calling convention */
-#define _MIPS_SIM_NABI32	2	/* MIPS new 32-bit abi */
-		/* NABI32 is 64bit calling convention but 32bit type sizes) */
-#define _MIPS_SIM_ABI64		3	/* MIPS 64 calling convention */
+#define _MIPS_SIM_ABI32     1   /* MIPS MSIG calling convention */
+#define _MIPS_SIM_NABI32    2   /* MIPS new 32-bit abi */
+        /* NABI32 is 64bit calling convention but 32bit type sizes) */
+#define _MIPS_SIM_ABI64     3   /* MIPS 64 calling convention */

-#define	LEAF(x)						\
-	.globl	x;					\
-	.ent	x,0;					\
-x:;							\
-	.frame	sp,0,ra

-#define	XLEAF(x)					\
-	.global x;
+/* libgultra doesn't match with the .type directive but iQue sdk asm.h uses it */
+#ifdef BBPLAYER
+#define ASM_TYPE_FUNC(x)    .type   x, @function
+#else
+#define ASM_TYPE_FUNC(x)
+#endif

-#define	END(proc)					\
-	.end	proc
+#define LEAF(x)             \
+    .globl  x              ;\
+    .align  2              ;\
+    ASM_TYPE_FUNC(x)       ;\
+    .ent    x,0            ;\
+    x:                     ;\
+    .frame  sp,0,ra

-#define	ABS(x, y)					\
-	.globl	x;					\
-	x	=	y
-	
-#define	EXPORT(x)					\
-	.globl	x;					\
-x:
-/*
-#define WEAK(x, y) \
-	.weak x; \
-	.set x,y;
-*/
+#if defined(BBPLAYER) || defined(__sgi)
+#define XLEAF(x)    \
+    .globl  x      ;\
+    .aent   x,0    ;\
+    x:
+#else
+#define XLEAF(x)    \
+    .globl  x
+#endif

+#ifdef BBPLAYER
+#define END(proc)           \
+    .end    proc           ;\
+    .size   proc, . - proc
+#else
+#define END(proc)   \
+    .end    proc
+#endif
+
+#define ABS(x, y)   \
+    .globl  x      ;\
+    x   =   y
+
+#define EXPORT(x)   \
+    .globl  x      ;\
+    x:
+
+#if defined(BBPLAYER) || defined(__sgi)
+#define WEAK(x, y)      \
+    .weakext    x,  y
+#else
 #define WEAK(x, y)
+#endif

-#define STAY1(stmnt) .set noreorder; stmnt; .set reorder;
-#define STAY2(stmnt, arg1) .set noreorder; stmnt, arg1; .set reorder;
-#define STAY3(stmnt, arg1, arg2) .set noreorder; stmnt, arg1, arg2; .set reorder;
-#define NOP .set noreorder; nop; .set reorder;
-#define CACHE(op, reg) .set noreorder; cache op, reg; .set reorder;
+
+
+#define STAY1(stmnt)    \
+    .set noreorder     ;\
+        stmnt          ;\
+    .set reorder
+
+#define STAY2(stmnt, arg1)  \
+    .set noreorder         ;\
+        stmnt, arg1        ;\
+    .set reorder
+
+#define STAY3(stmnt, arg1, arg2)    \
+    .set noreorder                 ;\
+        stmnt, arg1, arg2          ;\
+    .set reorder
+
+#define NOP         \
+    .set noreorder ;\
+        nop        ;\
+    .set reorder
+
+#define CACHE(op, reg)  \
+    .set noreorder     ;\
+        cache op, reg  ;\
+    .set reorder

 #ifdef __cplusplus
 }
--- a/src/debug/assert.c
+++ b/src/debug/assert.c
@@ -1,5 +1,10 @@
-#include "PR/os_internal.h"
+#include "os.h"
+#include "../os/osint.h"
+#include "osint_debug.h"
+
+void __assertBreak(void);

 void __assert(const char* exp, const char* filename, int line) {
    osSyncPrintf("\nASSERTION FAULT: %s, %d: \"%s\"\n", filename, line, exp);
+    __assertBreak; // Doesn't actually do anything, but is needed for matching
 }
--- a/src/debug/kdebugserver.c
+++ b/src/debug/kdebugserver.c
@@ -1,13 +1,13 @@
 #include "PR/os_internal.h"
 #include "PR/rcp.h"
 #include "PR/rdb.h"
-#include "../os/osint.h"
-
-extern u32 __osRdb_IP6_Empty;

 // not included in final rom, but __osThreadSave is here for some reason
 OSThread __osThreadSave;

+extern OSThread *__osRunningThread;
+extern u32 __osRdb_IP6_Empty;
+
 #ifndef _FINALROM

 static u8 buffer[12];
@@ -34,7 +34,7 @@ static void send_packet(u8* s, u32 n) {
    for (i = 0; i < n; i++) {
        packet.buf[i] = s[i];
    }
-    *(volatile rdbPacket*)RDB_BASE_REG = packet;
+    *(vu32*)RDB_BASE_REG = *(u32*)&packet;
 }

 static void clear_IP6(void) {
--- a/Show More
+++ b/Show More