mirror of
https://github.com/HackerN64/HackerOoT.git
synced 2026-01-21 10:37:37 -08:00
Improve rcp.h, remove HW_REG macro (#1425)
* Real rcp.h * Correction to comment in initialize.c * Try fix R4300.h * Adjust rcp.h formatting, remove defines in other headers that are now in rcp.h * Suggested changes, document a bug in the modified osAiSetNextBuffer * More rcp.h formatting changes
This commit is contained in:
@@ -1,7 +1,7 @@
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#ifndef MATH_H
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#define MATH_H
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#include "ultra64/types.h"
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#include "ultra64/ultratypes.h"
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#define M_PI 3.14159265358979323846f
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#define M_SQRT2 1.41421356237309504880f
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@@ -1,7 +1,7 @@
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#ifndef ULTRA64_H
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#define ULTRA64_H
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#include "ultra64/types.h"
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#include "ultra64/ultratypes.h"
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#include "unk.h"
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#include "libc/stdarg.h"
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@@ -13,8 +13,6 @@
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#include "ultra64/exception.h"
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#include "ultra64/rcp.h"
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#include "ultra64/rdp.h"
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#include "ultra64/rsp.h"
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#include "ultra64/thread.h"
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#include "ultra64/convert.h"
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#include "ultra64/time.h"
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@@ -28,7 +26,7 @@
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#include "ultra64/mbi.h"
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#include "ultra64/pfs.h"
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#include "ultra64/motor.h"
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#include "ultra64/r4300.h"
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#include "ultra64/R4300.h"
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#include "ultra64/ucode.h"
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#endif
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@@ -2,7 +2,7 @@
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#define ULTRA64_R4300_H
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#ifdef _LANGUAGE_C
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#include "types.h"
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#include "ultratypes.h"
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#define U32(x) ((u32)x)
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#define C_REG(x) (x)
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#else
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@@ -3,19 +3,6 @@
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#include "message.h"
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/**
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* Controller channel
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* Each game controller channel has 4 error bits that are defined in bit 6-7 of
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* the Rx and Tx data size area bytes. Programmers need to clear these bits
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* when setting the Tx/Rx size area values for a channel
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*/
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#define CHNL_ERR_NORESP 0x80 /* Bit 7 (Rx): No response error */
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#define CHNL_ERR_OVERRUN 0x40 /* Bit 6 (Rx): Overrun error */
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#define CHNL_ERR_FRAME 0x80 /* Bit 7 (Tx): Frame error */
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#define CHNL_ERR_COLLISION 0x40 /* Bit 6 (Tx): Collision error */
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#define CHNL_ERR_MASK 0xC0 /* Bit 6-7: channel errors */
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#define CHNL_ERR(readFormat) (((readFormat).rxsize & CHNL_ERR_MASK) >> 4)
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#define BLOCKSIZE 32
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@@ -28,7 +28,7 @@
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#ifdef _LANGUAGE_C
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#include "types.h"
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#include "ultratypes.h"
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typedef u32 OSIntMask;
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typedef u32 OSHWIntr;
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@@ -74,10 +74,4 @@ typedef struct {
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#define OS_MESG_PRI_NORMAL 0
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#define OS_MESG_PRI_HIGH 1
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#define DEVICE_TYPE_CART 0 /* ROM cartridge */
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#define DEVICE_TYPE_BULK 1 /* ROM bulk */
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#define DEVICE_TYPE_64DD 2 /* 64 Disk Drive */
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#define DEVICE_TYPE_SRAM 3 /* SRAM */
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#define DEVICE_TYPE_INIT 7 /* initial value */
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#endif
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@@ -1,7 +1,7 @@
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#ifndef ULTRA64_PRINTF_H
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#define ULTRA64_PRINTF_H
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#include "types.h"
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#include "ultratypes.h"
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typedef struct {
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/* 0x0 */ union {
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File diff suppressed because it is too large
Load Diff
@@ -68,7 +68,7 @@
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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#include "types.h"
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#include "ultratypes.h"
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/* Structure for debug port */
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typedef struct {
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@@ -1,51 +0,0 @@
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#ifndef ULTRA64_RDP_H
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#define ULTRA64_RDP_H
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/* DP Command Registers */
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#define DPC_REG_BASE 0xA4100000
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#define DPC_START_REG (*(vu32*)(DPC_REG_BASE + 0x00))
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#define DPC_END_REG (*(vu32*)(DPC_REG_BASE + 0x04))
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#define DPC_CURRENT_REG (*(vu32*)(DPC_REG_BASE + 0x08))
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#define DPC_STATUS_REG (*(vu32*)(DPC_REG_BASE + 0x0C))
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#define DPC_CLOCK_REG (*(vu32*)(DPC_REG_BASE + 0x10))
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#define DPC_BUFBUSY_REG (*(vu32*)(DPC_REG_BASE + 0x14))
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#define DPC_PIPEBUSY_REG (*(vu32*)(DPC_REG_BASE + 0x18))
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#define DPC_TMEM_REG (*(vu32*)(DPC_REG_BASE + 0x1C))
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/* DP Span Registers */
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#define DPS_REG_BASE 0xA4200000
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#define DPS_TBIST_REG (*(vu32*)(DPS_REG_BASE + 0x00))
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#define DPS_TEST_MODE_REG (*(vu32*)(DPS_REG_BASE + 0x04))
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#define DPS_BUFTEST_ADDR_REG (*(vu32*)(DPS_REG_BASE + 0x08))
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#define DPS_BUFTEST_DATA_REG (*(vu32*)(DPS_REG_BASE + 0x0C))
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/* DP Status Read Flags */
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#define DPC_STATUS_XBUS_DMEM_DMA 0x001
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#define DPC_STATUS_FREEZE 0x002
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#define DPC_STATUS_FLUSH 0x004
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#define DPC_STATUS_START_GCLK 0x008
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#define DPC_STATUS_TMEM_BUSY 0x010
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#define DPC_STATUS_PIPE_BUSY 0x020
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#define DPC_STATUS_CMD_BUSY 0x040
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#define DPC_STATUS_CBUF_READY 0x080
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#define DPC_STATUS_DMA_BUSY 0x100
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#define DPC_STATUS_END_VALID 0x200
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#define DPC_STATUS_START_VALID 0x400
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/* DP Status Write Flags */
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#define DPC_CLR_XBUS_DMEM_DMA 0x0001
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#define DPC_SET_XBUS_DMEM_DMA 0x0002
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#define DPC_CLR_FREEZE 0x0004
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#define DPC_SET_FREEZE 0x0008
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#define DPC_CLR_FLUSH 0x0010
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#define DPC_SET_FLUSH 0x0020
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#define DPC_CLR_TMEM_CTR 0x0040
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#define DPC_CLR_PIPE_CTR 0x0080
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#define DPC_CLR_CMD_CTR 0x0100
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#define DPC_CLR_CLOCK_CTR 0x0200
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#endif
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@@ -1,50 +0,0 @@
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#ifndef ULTRA64_RSP_H
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#define ULTRA64_RSP_H
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/* SP Status Flags */
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#define SP_STATUS_HALT 0x001
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#define SP_STATUS_BROKE 0x002
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#define SP_STATUS_DMA_BUSY 0x004
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#define SP_STATUS_DMA_FULL 0x008
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#define SP_STATUS_IO_FULL 0x010
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#define SP_STATUS_SSTEP 0x020
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#define SP_STATUS_INTR_BREAK 0x040
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#define SP_STATUS_YIELD 0x080
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#define SP_STATUS_YIELDED 0x100
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#define SP_STATUS_TASKDONE 0x200
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//#define SP_STATUS_SIG0 0x080
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//#define SP_STATUS_SIG1 0x100
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//#define SP_STATUS_SIG2 0x200
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#define SP_STATUS_SIG3 0x400
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#define SP_STATUS_SIG4 0x800
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#define SP_STATUS_SIG5 0x1000
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#define SP_STATUS_SIG6 0x2000
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#define SP_STATUS_SIG7 0x4000
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#define SP_CLR_HALT 0x00001
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#define SP_SET_HALT 0x00002
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#define SP_CLR_BROKE 0x00004
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#define SP_CLR_INTR 0x00008
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#define SP_SET_INTR 0x00010
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#define SP_CLR_SSTEP 0x00020
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#define SP_SET_SSTEP 0x00040
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#define SP_CLR_INTR_BREAK 0x00080
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#define SP_SET_INTR_BREAK 0x00100
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#define SP_CLR_SIG0 0x00200
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#define SP_SET_SIG0 0x00400
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#define SP_CLR_SIG1 0x00800
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#define SP_SET_SIG1 0x01000
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#define SP_CLR_SIG2 0x02000
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#define SP_SET_SIG2 0x04000
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#define SP_CLR_SIG3 0x08000
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#define SP_SET_SIG3 0x10000
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#define SP_CLR_SIG4 0x20000
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#define SP_SET_SIG4 0x40000
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#define SP_CLR_SIG5 0x80000
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#define SP_SET_SIG5 0x100000
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#define SP_CLR_SIG6 0x200000
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#define SP_SET_SIG6 0x400000
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#define SP_CLR_SIG7 0x800000
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#define SP_SET_SIG7 0x1000000
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#endif
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@@ -1,7 +1,7 @@
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#ifndef ULTRA64_SPTASK_H
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#define ULTRA64_SPTASK_H
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#include "types.h"
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#include "ultratypes.h"
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/* Task Types */
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#define M_NULTASK 0
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@@ -22,7 +22,7 @@
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#ifdef _LANGUAGE_C
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#include "types.h"
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#include "ultratypes.h"
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typedef s32 OSPri;
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typedef s32 OSId;
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@@ -1,7 +1,7 @@
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#ifndef ULTRA64_UCODE_H
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#define ULTRA64_UCODE_H
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#include "types.h"
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#include "ultratypes.h"
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#define SP_DRAM_STACK_SIZE8 (0x400)
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#define SP_DRAM_STACK_SIZE64 (SP_DRAM_STACK_SIZE8 >> 3)
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@@ -1,5 +1,7 @@
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#ifndef ULTRA64_TYPES_H
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#define ULTRA64_TYPES_H
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#ifndef ULTRA64_ULTRATYPES_H
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#define ULTRA64_ULTRATYPES_H
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#ifdef _LANGUAGE_C
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typedef signed char s8;
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typedef unsigned char u8;
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@@ -37,3 +39,5 @@ typedef union {
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} MtxF;
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#endif
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#endif
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@@ -1,7 +1,7 @@
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#ifndef Z64_CURVE_H
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#define Z64_CURVE_H
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#include "ultra64/types.h"
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#include "ultra64/ultratypes.h"
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#include "z64math.h"
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struct PlayState;
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@@ -175,8 +175,8 @@ void Graph_TaskSet00(GraphicsContext* gfxCtx) {
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osSyncPrintf("RCPが帰ってきませんでした。"); // "RCP did not return."
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osSyncPrintf(VT_RST);
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LogUtils_LogHexDump((void*)&HW_REG(SP_MEM_ADDR_REG, u32), 0x20);
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LogUtils_LogHexDump((void*)&DPC_START_REG, 0x20);
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LogUtils_LogHexDump((void*)PHYS_TO_K1(SP_BASE_REG), 0x20);
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LogUtils_LogHexDump((void*)PHYS_TO_K1(DPC_BASE_REG), 0x20);
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LogUtils_LogHexDump(gGfxSPTaskYieldBuffer, sizeof(gGfxSPTaskYieldBuffer));
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SREG(6) = -1;
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@@ -321,8 +321,8 @@ void Graph_Update(GraphicsContext* gfxCtx, GameState* gameState) {
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}
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if (HREG(81) < 0) {
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LogUtils_LogHexDump((void*)&HW_REG(SP_MEM_ADDR_REG, u32), 0x20);
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LogUtils_LogHexDump((void*)&DPC_START_REG, 0x20);
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LogUtils_LogHexDump((void*)PHYS_TO_K1(SP_BASE_REG), 0x20);
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LogUtils_LogHexDump((void*)PHYS_TO_K1(DPC_BASE_REG), 0x20);
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}
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if (HREG(81) < 0) {
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@@ -50,6 +50,6 @@ void RcpUtils_Reset(void) {
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// Flush the RDP pipeline and freeze clock counter
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osDpSetStatus(DPC_SET_FREEZE | DPC_SET_FLUSH);
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// Halt the RSP, disable interrupt on break and set "task done" signal
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__osSpSetStatus(SP_SET_HALT | SP_SET_SIG2 | SP_CLR_INTR_BREAK);
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__osSpSetStatus(SP_SET_HALT | SP_SET_TASKDONE | SP_CLR_INTR_BREAK);
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RcpUtils_PrintRegisterStatus();
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}
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@@ -1,4 +1,4 @@
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#include "ultra64/types.h"
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#include "ultra64/ultratypes.h"
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static s16 sintable[0x400] = {
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0x0000, 0x0032, 0x0064, 0x0096, 0x00C9, 0x00FB, 0x012D, 0x0160, 0x0192, 0x01C4, 0x01F7, 0x0229, 0x025B, 0x028E,
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@@ -1,5 +1,11 @@
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#include "global.h"
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/**
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* Returns the number of bytes remaining in a currently ongoing audio DMA.
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*
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* Note that audio DMA is double-buffered, a DMA can be queued while another is in-progress. This only returns
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* information about the currently in-progress DMA.
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*/
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u32 osAiGetLength(void) {
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return HW_REG(AI_LEN_REG, u32);
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return IO_READ(AI_LEN_REG);
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}
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