mirror of
https://github.com/HackerN64/HackerOoT.git
synced 2026-01-21 10:37:37 -08:00
Improve the state of handwritten assembly files (#865)
* Format all handwritten asm and document some * Use c preprocessor for constants * Fix * Fix PI_STATUS_ERROR, some label improvements * Avoid hi/lo for constants * Some more comments * Properly mark functions as functions and their sizes * Fix merge * Improvements * Review suggestions, rework procedure start/end macros to be more like libreultra * Move IPL3 symbol definitions into ipl3.s * Fix undefined_syms, add include and language guards to asm.h and fix the comment in gbi.h * Consistent hex capitalization, add some MIPS builtin defines to CC_CHECK to behave properly * Add -no-pad-sections assembler option and clean up alignment in gu files and bzero * Further suggestions and improvements * Matrix conversion function clarifications * Fix passing AVOID_UB to gcc * Suggestions * Suggestions, global interrupt mask improvements * Further suggestions, interrupt mask comments * Comments fixes, rdb.h * Switch from # comments to // comments, remove unnecesary .set gp=64 directives * Further review suggestions * Missed one
This commit is contained in:
Tharo
GitHub
19
Makefile
19
Makefile
@@ -1,5 +1,9 @@
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MAKEFLAGS += --no-builtin-rules
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# Ensure the build fails if a piped command fails
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SHELL = /bin/bash
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.SHELLFLAGS = -o pipefail -c
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# Build options can either be changed by modifying the makefile, or by building with 'make SETTING=value'
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# If COMPARE is 1, check the output md5sum after building
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@@ -32,8 +36,8 @@ endif
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MIPS_BINUTILS_PREFIX ?= mips-linux-gnu-
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ifeq ($(NON_MATCHING),1)
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CFLAGS += -DNON_MATCHING
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CPPFLAGS += -DNON_MATCHING
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CFLAGS += -DNON_MATCHING -DAVOID_UB
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CPPFLAGS += -DNON_MATCHING -DAVOID_UB
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COMPARE := 0
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endif
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@@ -112,10 +116,10 @@ else
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OPTFLAGS := -O2
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endif
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ASFLAGS := -march=vr4300 -32 -Iinclude
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ASFLAGS := -march=vr4300 -32 -no-pad-sections -I include
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ifeq ($(COMPILER),gcc)
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CFLAGS += -G 0 -nostdinc $(INC) -DAVOID_UB -march=vr4300 -mfix4300 -mabi=32 -mno-abicalls -mdivide-breaks -fno-zero-initialized-in-bss -fno-toplevel-reorder -ffreestanding -fno-common -fno-merge-constants -mno-explicit-relocs -mno-split-addresses $(CHECK_WARNINGS) -funsigned-char
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CFLAGS += -G 0 -nostdinc $(INC) -march=vr4300 -mfix4300 -mabi=32 -mno-abicalls -mdivide-breaks -fno-zero-initialized-in-bss -fno-toplevel-reorder -ffreestanding -fno-common -fno-merge-constants -mno-explicit-relocs -mno-split-addresses $(CHECK_WARNINGS) -funsigned-char
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MIPS_VERSION := -mips3
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else
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# we support Microsoft extensions such as anonymous structs, which the compiler does support but warns for their usage. Surpress the warnings with -woff.
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@@ -124,7 +128,9 @@ else
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endif
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ifeq ($(COMPILER),ido)
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CC_CHECK = gcc -fno-builtin -fsyntax-only -funsigned-char -std=gnu90 -D_LANGUAGE_C -DNON_MATCHING $(INC) $(CHECK_WARNINGS)
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# Have CC_CHECK pretend to be a MIPS compiler
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MIPS_BUILTIN_DEFS := -D_MIPS_ISA_MIPS2=2 -D_MIPS_ISA=_MIPS_ISA_MIPS2 -D_ABIO32=1 -D_MIPS_SIM=_ABIO32 -D_MIPS_SZINT=32 -D_MIPS_SZLONG=32 -D_MIPS_SZPTR=32
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CC_CHECK = gcc -fno-builtin -fsyntax-only -funsigned-char -std=gnu90 -D_LANGUAGE_C -DNON_MATCHING $(MIPS_BUILTIN_DEFS) $(INC) $(CHECK_WARNINGS)
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ifeq ($(shell getconf LONG_BIT), 32)
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# Work around memory allocation bug in QEMU
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export QEMU_GUEST_BASE := 1
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@@ -277,7 +283,6 @@ $(O_FILES): | asset_files
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.PHONY: o_files asset_files
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build/$(SPEC): $(SPEC)
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$(CPP) $(CPPFLAGS) $< > $@
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@@ -291,7 +296,7 @@ build/baserom/%.o: baserom/%
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$(OBJCOPY) -I binary -O elf32-big $< $@
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build/asm/%.o: asm/%.s
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$(AS) $(ASFLAGS) $< -o $@
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$(CPP) $(CPPFLAGS) -I include $< | $(AS) $(ASFLAGS) -o $@
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build/data/%.o: data/%.s
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$(AS) $(ASFLAGS) $< -o $@
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@@ -1,41 +0,0 @@
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.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.section .text
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.balign 16
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glabel __osDisableInt
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/* 007E80 80007280 3C0A8001 */ lui $t2, %hi(__OSGlobalIntMask) # $t2, 0x8001
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/* 007E84 80007284 254AAD00 */ addiu $t2, %lo(__OSGlobalIntMask) # addiu $t2, $t2, -0x5300
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/* 007E88 80007288 8D4B0000 */ lw $t3, ($t2)
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/* 007E8C 8000728C 316BFF00 */ andi $t3, $t3, 0xff00
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/* 007E90 80007290 40086000 */ mfc0 $t0, $12
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/* 007E94 80007294 2401FFFE */ li $at, -2
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/* 007E98 80007298 01014824 */ and $t1, $t0, $at
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/* 007E9C 8000729C 40896000 */ mtc0 $t1, $12
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/* 007EA0 800072A0 31020001 */ andi $v0, $t0, 1
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/* 007EA4 800072A4 8D480000 */ lw $t0, ($t2)
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/* 007EA8 800072A8 3108FF00 */ andi $t0, $t0, 0xff00
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/* 007EAC 800072AC 110B000E */ beq $t0, $t3, .L800072E8
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/* 007EB0 800072B0 3C0A8001 */ lui $t2, %hi(__osRunningThread) # $t2, 0x8001
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/* 007EB4 800072B4 254AAD50 */ addiu $t2, %lo(__osRunningThread) # addiu $t2, $t2, -0x52b0
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/* 007EB8 800072B8 8D490118 */ lw $t1, 0x118($t2)
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/* 007EBC 800072BC 312AFF00 */ andi $t2, $t1, 0xff00
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/* 007EC0 800072C0 01485024 */ and $t2, $t2, $t0
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/* 007EC4 800072C4 3C01FFFF */ lui $at, (0xFFFF00FF >> 16) # lui $at, 0xffff
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/* 007EC8 800072C8 342100FF */ ori $at, (0xFFFF00FF & 0xFFFF) # ori $at, $at, 0xff
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/* 007ECC 800072CC 01214824 */ and $t1, $t1, $at
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/* 007ED0 800072D0 012A4825 */ or $t1, $t1, $t2
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/* 007ED4 800072D4 2401FFFE */ li $at, -2
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/* 007ED8 800072D8 01214824 */ and $t1, $t1, $at
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/* 007EDC 800072DC 40896000 */ mtc0 $t1, $12
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/* 007EE0 800072E0 00000000 */ nop
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/* 007EE4 800072E4 00000000 */ nop
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.L800072E8:
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/* 007EE8 800072E8 03E00008 */ jr $ra
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/* 007EEC 800072EC 00000000 */ nop
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@@ -1,15 +1,15 @@
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.include "macro.inc"
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#include "ultra64/asm.h"
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#include "ultra64/r4300.h"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.set noat
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.set noreorder
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.section .text
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.balign 16
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glabel __osGetCause
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/* 008790 80007B90 40026800 */ mfc0 $v0, $13
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/* 008794 80007B94 03E00008 */ jr $ra
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/* 008798 80007B98 00000000 */ nop
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LEAF(__osGetCause)
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mfc0 $v0, C0_CAUSE
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jr $ra
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nop
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END(__osGetCause)
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@@ -1,15 +1,15 @@
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.include "macro.inc"
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#include "ultra64/asm.h"
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#include "ultra64/r4300.h"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.set noat
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.set noreorder
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.section .text
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.balign 16
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glabel __osGetFpcCsr
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/* 008680 80007A80 4442F800 */ cfc1 $v0, $31
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/* 008684 80007A84 03E00008 */ jr $ra
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/* 008688 80007A88 00000000 */ nop
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LEAF(__osGetFpcCsr)
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cfc1 $v0, C1_FPCSR
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jr $ra
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nop
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END(__osGetFpcCsr)
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@@ -1,15 +1,15 @@
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.include "macro.inc"
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#include "ultra64/asm.h"
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#include "ultra64/r4300.h"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.set noat
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.set noreorder
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.section .text
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.balign 16
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glabel __osGetSR
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/* 0052B0 800046B0 40026000 */ mfc0 $v0, $12
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/* 0052B4 800046B4 03E00008 */ jr $ra
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/* 0052B8 800046B8 00000000 */ nop
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LEAF(__osGetSR)
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mfc0 $v0, C0_SR
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jr $ra
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nop
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END(__osGetSR)
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@@ -1,62 +1,86 @@
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.include "macro.inc"
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#include "ultra64/asm.h"
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#include "ultra64/r4300.h"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.set noat
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.set noreorder
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.section .text
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.balign 16
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glabel __osProbeTLB
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/* 005C40 80005040 40085000 */ mfc0 $t0, $10
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/* 005C44 80005044 310900FF */ andi $t1, $t0, 0xff
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/* 005C48 80005048 2401E000 */ li $at, -8192
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/* 005C4C 8000504C 00815024 */ and $t2, $a0, $at
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/* 005C50 80005050 012A4825 */ or $t1, $t1, $t2
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/* 005C54 80005054 40895000 */ mtc0 $t1, $10
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/* 005C58 80005058 00000000 */ nop
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/* 005C5C 8000505C 00000000 */ nop
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/* 005C60 80005060 00000000 */ nop
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/* 005C64 80005064 42000008 */ tlbp
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/* 005C68 80005068 00000000 */ nop
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/* 005C6C 8000506C 00000000 */ nop
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/* 005C70 80005070 400B0000 */ mfc0 $t3, $0
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/* 005C74 80005074 3C018000 */ lui $at, 0x8000
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/* 005C78 80005078 01615824 */ and $t3, $t3, $at
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/* 005C7C 8000507C 1560001A */ bnez $t3, .L800050E8
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/* 005C80 80005080 00000000 */ nop
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/* 005C84 80005084 42000001 */ tlbr
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/* 005C88 80005088 00000000 */ nop
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/* 005C8C 8000508C 00000000 */ nop
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/* 005C90 80005090 00000000 */ nop
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/* 005C94 80005094 400B2800 */ mfc0 $t3, $5
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/* 005C98 80005098 216B2000 */ addi $t3, $t3, 0x2000
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/* 005C9C 8000509C 000B5842 */ srl $t3, $t3, 1
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/* 005CA0 800050A0 01646024 */ and $t4, $t3, $a0
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/* 005CA4 800050A4 15800004 */ bnez $t4, .L800050B8
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/* 005CA8 800050A8 216BFFFF */ addi $t3, $t3, -1
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/* 005CAC 800050AC 40021000 */ mfc0 $v0, $2
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/* 005CB0 800050B0 10000002 */ b .L800050BC
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/* 005CB4 800050B4 00000000 */ nop
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.L800050B8:
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/* 005CB8 800050B8 40021800 */ mfc0 $v0, $3
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.L800050BC:
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/* 005CBC 800050BC 304D0002 */ andi $t5, $v0, 2
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/* 005CC0 800050C0 11A00009 */ beqz $t5, .L800050E8
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/* 005CC4 800050C4 00000000 */ nop
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/* 005CC8 800050C8 3C013FFF */ lui $at, (0x3FFFFFC0 >> 16) # lui $at, 0x3fff
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/* 005CCC 800050CC 3421FFC0 */ ori $at, (0x3FFFFFC0 & 0xFFFF) # ori $at, $at, 0xffc0
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/* 005CD0 800050D0 00411024 */ and $v0, $v0, $at
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/* 005CD4 800050D4 00021180 */ sll $v0, $v0, 6
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/* 005CD8 800050D8 008B6824 */ and $t5, $a0, $t3
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/* 005CDC 800050DC 004D1020 */ add $v0, $v0, $t5
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/* 005CE0 800050E0 10000002 */ b .L800050EC
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/* 005CE4 800050E4 00000000 */ nop
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.L800050E8:
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/* 005CE8 800050E8 2402FFFF */ li $v0, -1
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.L800050EC:
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/* 005CEC 800050EC 40885000 */ mtc0 $t0, $10
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/* 005CF0 800050F0 03E00008 */ jr $ra
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/* 005CF4 800050F4 00000000 */ nop
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/**
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* u32 __osProbeTLB(void* vaddr);
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*
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* Searches the TLB for the physical address associated with
|
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* the virtual address `vaddr`.
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*
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* Returns the physical address if found, or -1 if not found.
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*/
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LEAF(__osProbeTLB)
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// Set C0_ENTRYHI based on supplied vaddr
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mfc0 $t0, C0_ENTRYHI
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andi $t1, $t0, TLBHI_PIDMASK
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li $at, TLBHI_VPN2MASK
|
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and $t2, $a0, $at
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or $t1, $t1, $t2
|
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mtc0 $t1, C0_ENTRYHI
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nop
|
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nop
|
||||
nop
|
||||
// TLB probe, sets C0_INX to a value matching C0_ENTRYHI.
|
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// If no match is found the TLBINX_PROBE bit is set to indicate this.
|
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tlbp
|
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nop
|
||||
nop
|
||||
// Read result
|
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mfc0 $t3, C0_INX
|
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li $at, TLBINX_PROBE
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and $t3, $t3, $at
|
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// Branch if no match was found
|
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bnez $t3, 3f
|
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nop
|
||||
// Read TLB, sets C0_ENTRYHI, C0_ENTRYLO0, C0_ENTRYLO1 and C0_PAGEMASK for the TLB
|
||||
// entry indicated by C0_INX
|
||||
tlbr
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
// Calculate page size = (page mask + 0x2000) >> 1
|
||||
mfc0 $t3, C0_PAGEMASK
|
||||
addi $t3, $t3, 0x2000
|
||||
srl $t3, $t3, 1
|
||||
// & with vaddr
|
||||
and $t4, $t3, $a0
|
||||
// Select C0_ENTRYLO0 or C0_ENTRYLO1
|
||||
bnez $t4, 1f
|
||||
addi $t3, $t3, -1 // make bitmask out of page size
|
||||
mfc0 $v0, C0_ENTRYLO0
|
||||
b 2f
|
||||
nop
|
||||
1:
|
||||
mfc0 $v0, C0_ENTRYLO1
|
||||
2:
|
||||
// Check valid bit and branch if not valid
|
||||
andi $t5, $v0, TLBLO_V
|
||||
beqz $t5, 3f
|
||||
nop
|
||||
// Extract the Page Frame Number from the entry
|
||||
li $at, TLBLO_PFNMASK
|
||||
and $v0, $v0, $at
|
||||
sll $v0, $v0, TLBLO_PFNSHIFT
|
||||
// Mask vaddr with page size mask
|
||||
and $t5, $a0, $t3
|
||||
// Add masked vaddr to pfn to obtain the physical address
|
||||
add $v0, $v0, $t5
|
||||
b 4f
|
||||
nop
|
||||
3:
|
||||
// No physical address for the supplied virtual address was found,
|
||||
// return -1
|
||||
li $v0, -1
|
||||
4:
|
||||
// Restore original C0_ENTRYHI value before returning
|
||||
mtc0 $t0, C0_ENTRYHI
|
||||
jr $ra
|
||||
nop
|
||||
END(__osProbeTLB)
|
||||
|
||||
@@ -1,19 +0,0 @@
|
||||
.include "macro.inc"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel __osRestoreInt
|
||||
/* 007EF0 800072F0 40086000 */ mfc0 $t0, $12
|
||||
/* 007EF4 800072F4 01044025 */ or $t0, $t0, $a0
|
||||
/* 007EF8 800072F8 40886000 */ mtc0 $t0, $12
|
||||
/* 007EFC 800072FC 00000000 */ nop
|
||||
/* 007F00 80007300 00000000 */ nop
|
||||
/* 007F04 80007304 03E00008 */ jr $ra
|
||||
/* 007F08 80007308 00000000 */ nop
|
||||
@@ -1,15 +1,15 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/r4300.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel __osSetCompare
|
||||
/* 007B00 80006F00 40845800 */ mtc0 $a0, $11
|
||||
/* 007B04 80006F04 03E00008 */ jr $ra
|
||||
/* 007B08 80006F08 00000000 */ nop
|
||||
LEAF(__osSetCompare)
|
||||
mtc0 $a0, C0_COMPARE
|
||||
jr $ra
|
||||
nop
|
||||
END(__osSetCompare)
|
||||
|
||||
@@ -1,16 +1,16 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/r4300.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel __osSetFpcCsr
|
||||
/* 008670 80007A70 4442F800 */ cfc1 $v0, $31
|
||||
/* 008674 80007A74 44C4F800 */ ctc1 $a0, $31
|
||||
/* 008678 80007A78 03E00008 */ jr $ra
|
||||
/* 00867C 80007A7C 00000000 */ nop
|
||||
|
||||
LEAF(__osSetFpcCsr)
|
||||
cfc1 $v0, C1_FPCSR
|
||||
ctc1 $a0, C1_FPCSR
|
||||
jr $ra
|
||||
nop
|
||||
END(__osSetFpcCsr)
|
||||
|
||||
@@ -1,16 +1,16 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/r4300.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel __osSetSR
|
||||
/* 0052A0 800046A0 40846000 */ mtc0 $a0, $12
|
||||
/* 0052A4 800046A4 00000000 */ nop
|
||||
/* 0052A8 800046A8 03E00008 */ jr $ra
|
||||
/* 0052AC 800046AC 00000000 */ nop
|
||||
LEAF(__osSetSR)
|
||||
mtc0 $a0, C0_SR
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(__osSetSR)
|
||||
|
||||
@@ -1,16 +1,16 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/r4300.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel __osSetWatchLo
|
||||
/* 009F10 80009310 40849000 */ mtc0 $a0, $18
|
||||
/* 009F14 80009314 00000000 */ nop
|
||||
/* 009F18 80009318 03E00008 */ jr $ra
|
||||
/* 009F1C 8000931C 00000000 */ nop
|
||||
LEAF(__osSetWatchLo)
|
||||
mtc0 $a0, C0_WATCHLO
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(__osSetWatchLo)
|
||||
|
||||
173
asm/bcmp.s
173
asm/bcmp.s
@@ -1,94 +1,93 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel bcmp
|
||||
/* 0074C0 800068C0 28C10010 */ slti $at, $a2, 0x10
|
||||
/* 0074C4 800068C4 14200037 */ bnez $at, .bytecmp
|
||||
/* 0074C8 800068C8 00851026 */ xor $v0, $a0, $a1
|
||||
/* 0074CC 800068CC 30420003 */ andi $v0, $v0, 3
|
||||
/* 0074D0 800068D0 14400019 */ bnez $v0, .unalgncmp
|
||||
/* 0074D4 800068D4 0004C023 */ negu $t8, $a0
|
||||
/* 0074D8 800068D8 33180003 */ andi $t8, $t8, 3
|
||||
/* 0074DC 800068DC 13000007 */ beqz $t8, .wordcmp
|
||||
/* 0074E0 800068E0 00D83023 */ subu $a2, $a2, $t8
|
||||
/* 0074E4 800068E4 00601025 */ move $v0, $v1
|
||||
/* 0074E8 800068E8 88820000 */ lwl $v0, ($a0)
|
||||
/* 0074EC 800068EC 88A30000 */ lwl $v1, ($a1)
|
||||
/* 0074F0 800068F0 00982021 */ addu $a0, $a0, $t8
|
||||
/* 0074F4 800068F4 00B82821 */ addu $a1, $a1, $t8
|
||||
/* 0074F8 800068F8 14430036 */ bne $v0, $v1, .cmpdone
|
||||
.wordcmp:
|
||||
/* 0074FC 800068FC 2401FFFC */ li $at, -4
|
||||
/* 007500 80006900 00C13824 */ and $a3, $a2, $at
|
||||
/* 007504 80006904 10E00027 */ beqz $a3, .bytecmp
|
||||
/* 007508 80006908 00C73023 */ subu $a2, $a2, $a3
|
||||
/* 00750C 8000690C 00E43821 */ addu $a3, $a3, $a0
|
||||
/* 007510 80006910 8C820000 */ lw $v0, ($a0)
|
||||
.L80006914:
|
||||
/* 007514 80006914 8CA30000 */ lw $v1, ($a1)
|
||||
/* 007518 80006918 24840004 */ addiu $a0, $a0, 4
|
||||
/* 00751C 8000691C 24A50004 */ addiu $a1, $a1, 4
|
||||
/* 007520 80006920 1443002C */ bne $v0, $v1, .cmpdone
|
||||
/* 007524 80006924 00000000 */ nop
|
||||
/* 007528 80006928 5487FFFA */ bnel $a0, $a3, .L80006914
|
||||
/* 00752C 8000692C 8C820000 */ lw $v0, ($a0)
|
||||
/* 007530 80006930 1000001C */ b .bytecmp
|
||||
/* 007534 80006934 00000000 */ nop
|
||||
.unalgncmp:
|
||||
/* 007538 80006938 00053823 */ negu $a3, $a1
|
||||
/* 00753C 8000693C 30E70003 */ andi $a3, $a3, 3
|
||||
/* 007540 80006940 10E0000A */ beqz $a3, .partaligncmp
|
||||
/* 007544 80006944 00C73023 */ subu $a2, $a2, $a3
|
||||
/* 007548 80006948 00E43821 */ addu $a3, $a3, $a0
|
||||
/* 00754C 8000694C 90820000 */ lbu $v0, ($a0)
|
||||
.L80006950:
|
||||
/* 007550 80006950 90A30000 */ lbu $v1, ($a1)
|
||||
/* 007554 80006954 24840001 */ addiu $a0, $a0, 1
|
||||
/* 007558 80006958 24A50001 */ addiu $a1, $a1, 1
|
||||
/* 00755C 8000695C 1443001D */ bne $v0, $v1, .cmpdone
|
||||
/* 007560 80006960 00000000 */ nop
|
||||
/* 007564 80006964 5487FFFA */ bnel $a0, $a3, .L80006950
|
||||
/* 007568 80006968 90820000 */ lbu $v0, ($a0)
|
||||
.partaligncmp:
|
||||
/* 00756C 8000696C 2401FFFC */ li $at, -4
|
||||
/* 007570 80006970 00C13824 */ and $a3, $a2, $at
|
||||
/* 007574 80006974 10E0000B */ beqz $a3, .bytecmp
|
||||
/* 007578 80006978 00C73023 */ subu $a2, $a2, $a3
|
||||
/* 00757C 8000697C 00E43821 */ addu $a3, $a3, $a0
|
||||
/* 007580 80006980 88820000 */ lwl $v0, ($a0)
|
||||
.L80006984:
|
||||
/* 007584 80006984 8CA30000 */ lw $v1, ($a1)
|
||||
/* 007588 80006988 98820003 */ lwr $v0, 3($a0)
|
||||
/* 00758C 8000698C 24840004 */ addiu $a0, $a0, 4
|
||||
/* 007590 80006990 24A50004 */ addiu $a1, $a1, 4
|
||||
/* 007594 80006994 1443000F */ bne $v0, $v1, .cmpdone
|
||||
/* 007598 80006998 00000000 */ nop
|
||||
/* 00759C 8000699C 5487FFF9 */ bnel $a0, $a3, .L80006984
|
||||
/* 0075A0 800069A0 88820000 */ lwl $v0, ($a0)
|
||||
.bytecmp:
|
||||
/* 0075A4 800069A4 18C00009 */ blez $a2, .L800069CC
|
||||
/* 0075A8 800069A8 00C43821 */ addu $a3, $a2, $a0
|
||||
/* 0075AC 800069AC 90820000 */ lbu $v0, ($a0)
|
||||
.L800069B0:
|
||||
/* 0075B0 800069B0 90A30000 */ lbu $v1, ($a1)
|
||||
/* 0075B4 800069B4 24840001 */ addiu $a0, $a0, 1
|
||||
/* 0075B8 800069B8 24A50001 */ addiu $a1, $a1, 1
|
||||
/* 0075BC 800069BC 14430005 */ bne $v0, $v1, .cmpdone
|
||||
/* 0075C0 800069C0 00000000 */ nop
|
||||
/* 0075C4 800069C4 5487FFFA */ bnel $a0, $a3, .L800069B0
|
||||
/* 0075C8 800069C8 90820000 */ lbu $v0, ($a0)
|
||||
.L800069CC:
|
||||
/* 0075CC 800069CC 03E00008 */ jr $ra
|
||||
/* 0075D0 800069D0 00001025 */ move $v0, $zero
|
||||
LEAF(bcmp)
|
||||
slti $at, $a2, 0x10
|
||||
bnez $at, bytecmp
|
||||
xor $v0, $a0, $a1
|
||||
andi $v0, $v0, 3
|
||||
bnez $v0, unaligncmp
|
||||
negu $t8, $a0
|
||||
andi $t8, $t8, 3
|
||||
beqz $t8, wordcmp
|
||||
subu $a2, $a2, $t8
|
||||
move $v0, $v1
|
||||
lwl $v0, ($a0)
|
||||
lwl $v1, ($a1)
|
||||
addu $a0, $a0, $t8
|
||||
addu $a1, $a1, $t8
|
||||
bne $v0, $v1, cmpne
|
||||
wordcmp:
|
||||
li $at, ~3
|
||||
and $a3, $a2, $at
|
||||
beqz $a3, bytecmp
|
||||
subu $a2, $a2, $a3
|
||||
addu $a3, $a3, $a0
|
||||
lw $v0, ($a0)
|
||||
1:
|
||||
lw $v1, ($a1)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lw $v0, ($a0)
|
||||
b bytecmp
|
||||
nop
|
||||
unaligncmp:
|
||||
negu $a3, $a1
|
||||
andi $a3, $a3, 3
|
||||
beqz $a3, partaligncmp
|
||||
subu $a2, $a2, $a3
|
||||
addu $a3, $a3, $a0
|
||||
lbu $v0, ($a0)
|
||||
1:
|
||||
lbu $v1, ($a1)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lbu $v0, ($a0)
|
||||
partaligncmp:
|
||||
li $at, ~3
|
||||
and $a3, $a2, $at
|
||||
beqz $a3, bytecmp
|
||||
subu $a2, $a2, $a3
|
||||
addu $a3, $a3, $a0
|
||||
lwl $v0, ($a0)
|
||||
1:
|
||||
lw $v1, ($a1)
|
||||
lwr $v0, 3($a0)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lwl $v0, ($a0)
|
||||
bytecmp:
|
||||
blez $a2, cmpdone
|
||||
addu $a3, $a2, $a0
|
||||
lbu $v0, ($a0)
|
||||
1:
|
||||
lbu $v1, ($a1)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lbu $v0, ($a0)
|
||||
cmpdone:
|
||||
jr $ra
|
||||
move $v0, $zero
|
||||
|
||||
.cmpdone:
|
||||
/* 0075D4 800069D4 03E00008 */ jr $ra
|
||||
/* 0075D8 800069D8 24020001 */ li $v0, 1
|
||||
cmpne:
|
||||
jr $ra
|
||||
li $v0, 1
|
||||
END(bcmp)
|
||||
|
||||
413
asm/bcopy.s
413
asm/bcopy.s
@@ -1,230 +1,233 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel bcopy
|
||||
/* 007B10 80006F10 10C0001A */ beqz $a2, ret
|
||||
/* 007B14 80006F14 00A03825 */ move $a3, $a1
|
||||
/* 007B18 80006F18 10850018 */ beq $a0, $a1, ret
|
||||
/* 007B1C 80006F1C 00A4082A */ slt $at, $a1, $a0
|
||||
/* 007B20 80006F20 54200008 */ bnezl $at, goforwards
|
||||
/* 007B24 80006F24 28C10010 */ slti $at, $a2, 0x10
|
||||
/* 007B28 80006F28 00861020 */ add $v0, $a0, $a2
|
||||
/* 007B2C 80006F2C 00A2082A */ slt $at, $a1, $v0
|
||||
/* 007B30 80006F30 50200004 */ beql $at, $zero, goforwards
|
||||
/* 007B34 80006F34 28C10010 */ slti $at, $a2, 0x10
|
||||
/* 007B38 80006F38 1000005B */ b gobackwards
|
||||
/* 007B3C 80006F3C 28C10010 */ slti $at, $a2, 0x10
|
||||
/* 007B40 80006F40 28C10010 */ slti $at, $a2, 0x10
|
||||
LEAF(bcopy)
|
||||
beqz $a2, ret
|
||||
move $a3, $a1
|
||||
beq $a0, $a1, ret
|
||||
slt $at, $a1, $a0
|
||||
bnezl $at, goforwards
|
||||
slti $at, $a2, 0x10
|
||||
add $v0, $a0, $a2
|
||||
slt $at, $a1, $v0
|
||||
beql $at, $zero, goforwards
|
||||
slti $at, $a2, 0x10
|
||||
b gobackwards
|
||||
slti $at, $a2, 0x10
|
||||
slti $at, $a2, 0x10
|
||||
goforwards:
|
||||
/* 007B44 80006F44 14200005 */ bnez $at, forwards_bytecopy
|
||||
/* 007B48 80006F48 00000000 */ nop
|
||||
/* 007B4C 80006F4C 30820003 */ andi $v0, $a0, 3
|
||||
/* 007B50 80006F50 30A30003 */ andi $v1, $a1, 3
|
||||
/* 007B54 80006F54 1043000B */ beq $v0, $v1, forwalignable
|
||||
/* 007B58 80006F58 00000000 */ nop
|
||||
bnez $at, forwards_bytecopy
|
||||
nop
|
||||
andi $v0, $a0, 3
|
||||
andi $v1, $a1, 3
|
||||
beq $v0, $v1, forwalignable
|
||||
nop
|
||||
forwards_bytecopy:
|
||||
/* 007B5C 80006F5C 10C00007 */ beqz $a2, ret
|
||||
/* 007B60 80006F60 00000000 */ nop
|
||||
/* 007B64 80006F64 00861821 */ addu $v1, $a0, $a2
|
||||
.L80006F68:
|
||||
/* 007B68 80006F68 80820000 */ lb $v0, ($a0)
|
||||
/* 007B6C 80006F6C 24840001 */ addiu $a0, $a0, 1
|
||||
/* 007B70 80006F70 24A50001 */ addiu $a1, $a1, 1
|
||||
/* 007B74 80006F74 1483FFFC */ bne $a0, $v1, .L80006F68
|
||||
/* 007B78 80006F78 A0A2FFFF */ sb $v0, -1($a1)
|
||||
beqz $a2, ret
|
||||
nop
|
||||
addu $v1, $a0, $a2
|
||||
99:
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $a0, $v1, 99b
|
||||
sb $v0, -1($a1)
|
||||
ret:
|
||||
/* 007B7C 80006F7C 03E00008 */ jr $ra
|
||||
/* 007B80 80006F80 00E01025 */ move $v0, $a3
|
||||
jr $ra
|
||||
move $v0, $a3
|
||||
|
||||
forwalignable:
|
||||
/* 007B84 80006F84 10400018 */ beqz $v0, forwards_32
|
||||
/* 007B88 80006F88 24010001 */ li $at, 1
|
||||
/* 007B8C 80006F8C 1041000F */ beq $v0, $at, forw_copy3
|
||||
/* 007B90 80006F90 24010002 */ li $at, 2
|
||||
/* 007B94 80006F94 50410008 */ beql $v0, $at, forw_copy2
|
||||
/* 007B98 80006F98 84820000 */ lh $v0, ($a0)
|
||||
/* 007B9C 80006F9C 80820000 */ lb $v0, ($a0)
|
||||
/* 007BA0 80006FA0 24840001 */ addiu $a0, $a0, 1
|
||||
/* 007BA4 80006FA4 24A50001 */ addiu $a1, $a1, 1
|
||||
/* 007BA8 80006FA8 24C6FFFF */ addiu $a2, $a2, -1
|
||||
/* 007BAC 80006FAC 1000000E */ b forwards_32
|
||||
/* 007BB0 80006FB0 A0A2FFFF */ sb $v0, -1($a1)
|
||||
/* 007BB4 80006FB4 84820000 */ lh $v0, ($a0)
|
||||
beqz $v0, forwards_32
|
||||
li $at, 1
|
||||
beq $v0, $at, forw_copy3
|
||||
li $at, 2
|
||||
beql $v0, $at, forw_copy2
|
||||
lh $v0, ($a0)
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
addiu $a2, $a2, -1
|
||||
b forwards_32
|
||||
sb $v0, -1($a1)
|
||||
lh $v0, ($a0)
|
||||
forw_copy2:
|
||||
/* 007BB8 80006FB8 24840002 */ addiu $a0, $a0, 2
|
||||
/* 007BBC 80006FBC 24A50002 */ addiu $a1, $a1, 2
|
||||
/* 007BC0 80006FC0 24C6FFFE */ addiu $a2, $a2, -2
|
||||
/* 007BC4 80006FC4 10000008 */ b forwards_32
|
||||
/* 007BC8 80006FC8 A4A2FFFE */ sh $v0, -2($a1)
|
||||
addiu $a0, $a0, 2
|
||||
addiu $a1, $a1, 2
|
||||
addiu $a2, $a2, -2
|
||||
b forwards_32
|
||||
sh $v0, -2($a1)
|
||||
forw_copy3:
|
||||
/* 007BCC 80006FCC 80820000 */ lb $v0, ($a0)
|
||||
/* 007BD0 80006FD0 84830001 */ lh $v1, 1($a0)
|
||||
/* 007BD4 80006FD4 24840003 */ addiu $a0, $a0, 3
|
||||
/* 007BD8 80006FD8 24A50003 */ addiu $a1, $a1, 3
|
||||
/* 007BDC 80006FDC 24C6FFFD */ addiu $a2, $a2, -3
|
||||
/* 007BE0 80006FE0 A0A2FFFD */ sb $v0, -3($a1)
|
||||
/* 007BE4 80006FE4 A4A3FFFE */ sh $v1, -2($a1)
|
||||
lb $v0, ($a0)
|
||||
lh $v1, 1($a0)
|
||||
addiu $a0, $a0, 3
|
||||
addiu $a1, $a1, 3
|
||||
addiu $a2, $a2, -3
|
||||
sb $v0, -3($a1)
|
||||
sh $v1, -2($a1)
|
||||
|
||||
forwards:
|
||||
forwards_32:
|
||||
/* 007BE8 80006FE8 28C10020 */ slti $at, $a2, 0x20
|
||||
/* 007BEC 80006FEC 54200016 */ bnezl $at, .L80007048
|
||||
/* 007BF0 80006FF0 28C10010 */ slti $at, $a2, 0x10
|
||||
/* 007BF4 80006FF4 8C820000 */ lw $v0, ($a0)
|
||||
/* 007BF8 80006FF8 8C830004 */ lw $v1, 4($a0)
|
||||
/* 007BFC 80006FFC 8C880008 */ lw $t0, 8($a0)
|
||||
/* 007C00 80007000 8C89000C */ lw $t1, 0xc($a0)
|
||||
/* 007C04 80007004 8C8A0010 */ lw $t2, 0x10($a0)
|
||||
/* 007C08 80007008 8C8B0014 */ lw $t3, 0x14($a0)
|
||||
/* 007C0C 8000700C 8C8C0018 */ lw $t4, 0x18($a0)
|
||||
/* 007C10 80007010 8C8D001C */ lw $t5, 0x1c($a0)
|
||||
/* 007C14 80007014 24840020 */ addiu $a0, $a0, 0x20
|
||||
/* 007C18 80007018 24A50020 */ addiu $a1, $a1, 0x20
|
||||
/* 007C1C 8000701C 24C6FFE0 */ addiu $a2, $a2, -0x20
|
||||
/* 007C20 80007020 ACA2FFE0 */ sw $v0, -0x20($a1)
|
||||
/* 007C24 80007024 ACA3FFE4 */ sw $v1, -0x1c($a1)
|
||||
/* 007C28 80007028 ACA8FFE8 */ sw $t0, -0x18($a1)
|
||||
/* 007C2C 8000702C ACA9FFEC */ sw $t1, -0x14($a1)
|
||||
/* 007C30 80007030 ACAAFFF0 */ sw $t2, -0x10($a1)
|
||||
/* 007C34 80007034 ACABFFF4 */ sw $t3, -0xc($a1)
|
||||
/* 007C38 80007038 ACACFFF8 */ sw $t4, -8($a1)
|
||||
/* 007C3C 8000703C 1000FFEA */ b forwards_32
|
||||
/* 007C40 80007040 ACADFFFC */ sw $t5, -4($a1)
|
||||
slti $at, $a2, 0x20
|
||||
bnezl $at, forwards_16_
|
||||
slti $at, $a2, 0x10
|
||||
lw $v0, ($a0)
|
||||
lw $v1, 4($a0)
|
||||
lw $t0, 8($a0)
|
||||
lw $t1, 0xC($a0)
|
||||
lw $t2, 0x10($a0)
|
||||
lw $t3, 0x14($a0)
|
||||
lw $t4, 0x18($a0)
|
||||
lw $t5, 0x1C($a0)
|
||||
addiu $a0, $a0, 0x20
|
||||
addiu $a1, $a1, 0x20
|
||||
addiu $a2, $a2, -0x20
|
||||
sw $v0, -0x20($a1)
|
||||
sw $v1, -0x1C($a1)
|
||||
sw $t0, -0x18($a1)
|
||||
sw $t1, -0x14($a1)
|
||||
sw $t2, -0x10($a1)
|
||||
sw $t3, -0xC($a1)
|
||||
sw $t4, -8($a1)
|
||||
b forwards_32
|
||||
sw $t5, -4($a1)
|
||||
forwards_16:
|
||||
/* 007C44 80007044 28C10010 */ slti $at, $a2, 0x10
|
||||
.L80007048:
|
||||
/* 007C48 80007048 5420000E */ bnezl $at, .L80007084
|
||||
/* 007C4C 8000704C 28C10004 */ slti $at, $a2, 4
|
||||
/* 007C50 80007050 8C820000 */ lw $v0, ($a0)
|
||||
/* 007C54 80007054 8C830004 */ lw $v1, 4($a0)
|
||||
/* 007C58 80007058 8C880008 */ lw $t0, 8($a0)
|
||||
/* 007C5C 8000705C 8C89000C */ lw $t1, 0xc($a0)
|
||||
/* 007C60 80007060 24840010 */ addiu $a0, $a0, 0x10
|
||||
/* 007C64 80007064 24A50010 */ addiu $a1, $a1, 0x10
|
||||
/* 007C68 80007068 24C6FFF0 */ addiu $a2, $a2, -0x10
|
||||
/* 007C6C 8000706C ACA2FFF0 */ sw $v0, -0x10($a1)
|
||||
/* 007C70 80007070 ACA3FFF4 */ sw $v1, -0xc($a1)
|
||||
/* 007C74 80007074 ACA8FFF8 */ sw $t0, -8($a1)
|
||||
/* 007C78 80007078 1000FFF2 */ b forwards_16
|
||||
/* 007C7C 8000707C ACA9FFFC */ sw $t1, -4($a1)
|
||||
slti $at, $a2, 0x10
|
||||
forwards_16_: // fake label due to branch likely optimization
|
||||
bnezl $at, forwards_4_
|
||||
slti $at, $a2, 4
|
||||
lw $v0, ($a0)
|
||||
lw $v1, 4($a0)
|
||||
lw $t0, 8($a0)
|
||||
lw $t1, 0xC($a0)
|
||||
addiu $a0, $a0, 0x10
|
||||
addiu $a1, $a1, 0x10
|
||||
addiu $a2, $a2, -0x10
|
||||
sw $v0, -0x10($a1)
|
||||
sw $v1, -0xC($a1)
|
||||
sw $t0, -8($a1)
|
||||
b forwards_16
|
||||
sw $t1, -4($a1)
|
||||
forwards_4:
|
||||
/* 007C80 80007080 28C10004 */ slti $at, $a2, 4
|
||||
.L80007084:
|
||||
/* 007C84 80007084 1420FFB5 */ bnez $at, forwards_bytecopy
|
||||
/* 007C88 80007088 00000000 */ nop
|
||||
/* 007C8C 8000708C 8C820000 */ lw $v0, ($a0)
|
||||
/* 007C90 80007090 24840004 */ addiu $a0, $a0, 4
|
||||
/* 007C94 80007094 24A50004 */ addiu $a1, $a1, 4
|
||||
/* 007C98 80007098 24C6FFFC */ addiu $a2, $a2, -4
|
||||
/* 007C9C 8000709C 1000FFF8 */ b forwards_4
|
||||
/* 007CA0 800070A0 ACA2FFFC */ sw $v0, -4($a1)
|
||||
/* 007CA4 800070A4 28C10010 */ slti $at, $a2, 0x10
|
||||
slti $at, $a2, 4
|
||||
forwards_4_: // fake label due to branch likely optimization
|
||||
bnez $at, forwards_bytecopy
|
||||
nop
|
||||
lw $v0, ($a0)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
addiu $a2, $a2, -4
|
||||
b forwards_4
|
||||
sw $v0, -4($a1)
|
||||
slti $at, $a2, 0x10
|
||||
gobackwards:
|
||||
/* 007CA8 800070A8 00862020 */ add $a0, $a0, $a2
|
||||
/* 007CAC 800070AC 14200005 */ bnez $at, backwards_bytecopy
|
||||
/* 007CB0 800070B0 00A62820 */ add $a1, $a1, $a2
|
||||
/* 007CB4 800070B4 30820003 */ andi $v0, $a0, 3
|
||||
/* 007CB8 800070B8 30A30003 */ andi $v1, $a1, 3
|
||||
/* 007CBC 800070BC 1043000D */ beq $v0, $v1, backalignable
|
||||
/* 007CC0 800070C0 00000000 */ nop
|
||||
add $a0, $a0, $a2
|
||||
bnez $at, backwards_bytecopy
|
||||
add $a1, $a1, $a2
|
||||
andi $v0, $a0, 3
|
||||
andi $v1, $a1, 3
|
||||
beq $v0, $v1, backalignable
|
||||
nop
|
||||
backwards_bytecopy:
|
||||
/* 007CC4 800070C4 10C0FFAD */ beqz $a2, ret
|
||||
/* 007CC8 800070C8 00000000 */ nop
|
||||
/* 007CCC 800070CC 2484FFFF */ addiu $a0, $a0, -1
|
||||
/* 007CD0 800070D0 24A5FFFF */ addiu $a1, $a1, -1
|
||||
/* 007CD4 800070D4 00861823 */ subu $v1, $a0, $a2
|
||||
.L800070D8:
|
||||
/* 007CD8 800070D8 80820000 */ lb $v0, ($a0)
|
||||
/* 007CDC 800070DC 2484FFFF */ addiu $a0, $a0, -1
|
||||
/* 007CE0 800070E0 24A5FFFF */ addiu $a1, $a1, -1
|
||||
/* 007CE4 800070E4 1483FFFC */ bne $a0, $v1, .L800070D8
|
||||
/* 007CE8 800070E8 A0A20001 */ sb $v0, 1($a1)
|
||||
/* 007CEC 800070EC 03E00008 */ jr $ra
|
||||
/* 007CF0 800070F0 00E01025 */ move $v0, $a3
|
||||
beqz $a2, ret
|
||||
nop
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
subu $v1, $a0, $a2
|
||||
99:
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
bne $a0, $v1, 99b
|
||||
sb $v0, 1($a1)
|
||||
jr $ra
|
||||
move $v0, $a3
|
||||
|
||||
backalignable:
|
||||
/* 007CF4 800070F4 10400018 */ beqz $v0, backwards_32
|
||||
/* 007CF8 800070F8 24010003 */ li $at, 3
|
||||
/* 007CFC 800070FC 1041000F */ beq $v0, $at, back_copy3
|
||||
/* 007D00 80007100 24010002 */ li $at, 2
|
||||
/* 007D04 80007104 50410008 */ beql $v0, $at, back_copy2
|
||||
/* 007D08 80007108 8482FFFE */ lh $v0, -2($a0)
|
||||
/* 007D0C 8000710C 8082FFFF */ lb $v0, -1($a0)
|
||||
/* 007D10 80007110 2484FFFF */ addiu $a0, $a0, -1
|
||||
/* 007D14 80007114 24A5FFFF */ addiu $a1, $a1, -1
|
||||
/* 007D18 80007118 24C6FFFF */ addiu $a2, $a2, -1
|
||||
/* 007D1C 8000711C 1000000E */ b backwards_32
|
||||
/* 007D20 80007120 A0A20000 */ sb $v0, ($a1)
|
||||
/* 007D24 80007124 8482FFFE */ lh $v0, -2($a0)
|
||||
beqz $v0, backwards_32
|
||||
li $at, 3
|
||||
beq $v0, $at, back_copy3
|
||||
li $at, 2
|
||||
beql $v0, $at, back_copy2
|
||||
lh $v0, -2($a0)
|
||||
lb $v0, -1($a0)
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
addiu $a2, $a2, -1
|
||||
b backwards_32
|
||||
sb $v0, ($a1)
|
||||
lh $v0, -2($a0)
|
||||
back_copy2:
|
||||
/* 007D28 80007128 2484FFFE */ addiu $a0, $a0, -2
|
||||
/* 007D2C 8000712C 24A5FFFE */ addiu $a1, $a1, -2
|
||||
/* 007D30 80007130 24C6FFFE */ addiu $a2, $a2, -2
|
||||
/* 007D34 80007134 10000008 */ b backwards_32
|
||||
/* 007D38 80007138 A4A20000 */ sh $v0, ($a1)
|
||||
addiu $a0, $a0, -2
|
||||
addiu $a1, $a1, -2
|
||||
addiu $a2, $a2, -2
|
||||
b backwards_32
|
||||
sh $v0, ($a1)
|
||||
back_copy3:
|
||||
/* 007D3C 8000713C 8082FFFF */ lb $v0, -1($a0)
|
||||
/* 007D40 80007140 8483FFFD */ lh $v1, -3($a0)
|
||||
/* 007D44 80007144 2484FFFD */ addiu $a0, $a0, -3
|
||||
/* 007D48 80007148 24A5FFFD */ addiu $a1, $a1, -3
|
||||
/* 007D4C 8000714C 24C6FFFD */ addiu $a2, $a2, -3
|
||||
/* 007D50 80007150 A0A20002 */ sb $v0, 2($a1)
|
||||
/* 007D54 80007154 A4A30000 */ sh $v1, ($a1)
|
||||
lb $v0, -1($a0)
|
||||
lh $v1, -3($a0)
|
||||
addiu $a0, $a0, -3
|
||||
addiu $a1, $a1, -3
|
||||
addiu $a2, $a2, -3
|
||||
sb $v0, 2($a1)
|
||||
sh $v1, ($a1)
|
||||
|
||||
backwards:
|
||||
backwards_32:
|
||||
/* 007D58 80007158 28C10020 */ slti $at, $a2, 0x20
|
||||
/* 007D5C 8000715C 54200016 */ bnezl $at, .L800071B8
|
||||
/* 007D60 80007160 28C10010 */ slti $at, $a2, 0x10
|
||||
/* 007D64 80007164 8C82FFFC */ lw $v0, -4($a0)
|
||||
/* 007D68 80007168 8C83FFF8 */ lw $v1, -8($a0)
|
||||
/* 007D6C 8000716C 8C88FFF4 */ lw $t0, -0xc($a0)
|
||||
/* 007D70 80007170 8C89FFF0 */ lw $t1, -0x10($a0)
|
||||
/* 007D74 80007174 8C8AFFEC */ lw $t2, -0x14($a0)
|
||||
/* 007D78 80007178 8C8BFFE8 */ lw $t3, -0x18($a0)
|
||||
/* 007D7C 8000717C 8C8CFFE4 */ lw $t4, -0x1c($a0)
|
||||
/* 007D80 80007180 8C8DFFE0 */ lw $t5, -0x20($a0)
|
||||
/* 007D84 80007184 2484FFE0 */ addiu $a0, $a0, -0x20
|
||||
/* 007D88 80007188 24A5FFE0 */ addiu $a1, $a1, -0x20
|
||||
/* 007D8C 8000718C 24C6FFE0 */ addiu $a2, $a2, -0x20
|
||||
/* 007D90 80007190 ACA2001C */ sw $v0, 0x1c($a1)
|
||||
/* 007D94 80007194 ACA30018 */ sw $v1, 0x18($a1)
|
||||
/* 007D98 80007198 ACA80014 */ sw $t0, 0x14($a1)
|
||||
/* 007D9C 8000719C ACA90010 */ sw $t1, 0x10($a1)
|
||||
/* 007DA0 800071A0 ACAA000C */ sw $t2, 0xc($a1)
|
||||
/* 007DA4 800071A4 ACAB0008 */ sw $t3, 8($a1)
|
||||
/* 007DA8 800071A8 ACAC0004 */ sw $t4, 4($a1)
|
||||
/* 007DAC 800071AC 1000FFEA */ b backwards_32
|
||||
/* 007DB0 800071B0 ACAD0000 */ sw $t5, ($a1)
|
||||
slti $at, $a2, 0x20
|
||||
bnezl $at, backwards_16_
|
||||
slti $at, $a2, 0x10
|
||||
lw $v0, -4($a0)
|
||||
lw $v1, -8($a0)
|
||||
lw $t0, -0xc($a0)
|
||||
lw $t1, -0x10($a0)
|
||||
lw $t2, -0x14($a0)
|
||||
lw $t3, -0x18($a0)
|
||||
lw $t4, -0x1c($a0)
|
||||
lw $t5, -0x20($a0)
|
||||
addiu $a0, $a0, -0x20
|
||||
addiu $a1, $a1, -0x20
|
||||
addiu $a2, $a2, -0x20
|
||||
sw $v0, 0x1C($a1)
|
||||
sw $v1, 0x18($a1)
|
||||
sw $t0, 0x14($a1)
|
||||
sw $t1, 0x10($a1)
|
||||
sw $t2, 0xC($a1)
|
||||
sw $t3, 8($a1)
|
||||
sw $t4, 4($a1)
|
||||
b backwards_32
|
||||
sw $t5, ($a1)
|
||||
backwards_16:
|
||||
/* 007DB4 800071B4 28C10010 */ slti $at, $a2, 0x10
|
||||
.L800071B8:
|
||||
/* 007DB8 800071B8 5420000E */ bnezl $at, .L800071F4
|
||||
/* 007DBC 800071BC 28C10004 */ slti $at, $a2, 4
|
||||
/* 007DC0 800071C0 8C82FFFC */ lw $v0, -4($a0)
|
||||
/* 007DC4 800071C4 8C83FFF8 */ lw $v1, -8($a0)
|
||||
/* 007DC8 800071C8 8C88FFF4 */ lw $t0, -0xc($a0)
|
||||
/* 007DCC 800071CC 8C89FFF0 */ lw $t1, -0x10($a0)
|
||||
/* 007DD0 800071D0 2484FFF0 */ addiu $a0, $a0, -0x10
|
||||
/* 007DD4 800071D4 24A5FFF0 */ addiu $a1, $a1, -0x10
|
||||
/* 007DD8 800071D8 24C6FFF0 */ addiu $a2, $a2, -0x10
|
||||
/* 007DDC 800071DC ACA2000C */ sw $v0, 0xc($a1)
|
||||
/* 007DE0 800071E0 ACA30008 */ sw $v1, 8($a1)
|
||||
/* 007DE4 800071E4 ACA80004 */ sw $t0, 4($a1)
|
||||
/* 007DE8 800071E8 1000FFF2 */ b backwards_16
|
||||
/* 007DEC 800071EC ACA90000 */ sw $t1, ($a1)
|
||||
slti $at, $a2, 0x10
|
||||
backwards_16_: // fake label due to branch likely optimization
|
||||
bnezl $at, backwards_4_
|
||||
slti $at, $a2, 4
|
||||
lw $v0, -4($a0)
|
||||
lw $v1, -8($a0)
|
||||
lw $t0, -0xC($a0)
|
||||
lw $t1, -0x10($a0)
|
||||
addiu $a0, $a0, -0x10
|
||||
addiu $a1, $a1, -0x10
|
||||
addiu $a2, $a2, -0x10
|
||||
sw $v0, 0xC($a1)
|
||||
sw $v1, 8($a1)
|
||||
sw $t0, 4($a1)
|
||||
b backwards_16
|
||||
sw $t1, ($a1)
|
||||
backwards_4:
|
||||
/* 007DF0 800071F0 28C10004 */ slti $at, $a2, 4
|
||||
.L800071F4:
|
||||
/* 007DF4 800071F4 1420FFB3 */ bnez $at, backwards_bytecopy
|
||||
/* 007DF8 800071F8 00000000 */ nop
|
||||
/* 007DFC 800071FC 8C82FFFC */ lw $v0, -4($a0)
|
||||
/* 007E00 80007200 2484FFFC */ addiu $a0, $a0, -4
|
||||
/* 007E04 80007204 24A5FFFC */ addiu $a1, $a1, -4
|
||||
/* 007E08 80007208 24C6FFFC */ addiu $a2, $a2, -4
|
||||
/* 007E0C 8000720C 1000FFF8 */ b backwards_4
|
||||
/* 007E10 80007210 ACA20000 */ sw $v0, ($a1)
|
||||
slti $at, $a2, 4
|
||||
backwards_4_: // fake label due to branch likely optimization
|
||||
bnez $at, backwards_bytecopy
|
||||
nop
|
||||
lw $v0, -4($a0)
|
||||
addiu $a0, $a0, -4
|
||||
addiu $a1, $a1, -4
|
||||
addiu $a2, $a2, -4
|
||||
b backwards_4
|
||||
sw $v0, ($a1)
|
||||
END(bcopy)
|
||||
|
||||
137
asm/bzero.s
137
asm/bzero.s
@@ -1,84 +1,65 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel bzero
|
||||
/* 005050 80004450 28A1000C */ slti $at, $a1, 0xc
|
||||
/* 005054 80004454 1420001D */ bnez $at, .bytezero
|
||||
/* 005058 80004458 00041823 */ negu $v1, $a0
|
||||
/* 00505C 8000445C 30630003 */ andi $v1, $v1, 3
|
||||
/* 005060 80004460 10600003 */ beqz $v1, .blkzero
|
||||
/* 005064 80004464 00A32823 */ subu $a1, $a1, $v1
|
||||
/* 005068 80004468 A8800000 */ swl $zero, ($a0)
|
||||
/* 00506C 8000446C 00832021 */ addu $a0, $a0, $v1
|
||||
.blkzero:
|
||||
/* 005070 80004470 2401FFE0 */ li $at, -32
|
||||
/* 005074 80004474 00A13824 */ and $a3, $a1, $at
|
||||
/* 005078 80004478 10E0000C */ beqz $a3, .wordzero
|
||||
/* 00507C 8000447C 00A72823 */ subu $a1, $a1, $a3
|
||||
/* 005080 80004480 00E43821 */ addu $a3, $a3, $a0
|
||||
.L80004484:
|
||||
/* 005084 80004484 24840020 */ addiu $a0, $a0, 0x20
|
||||
/* 005088 80004488 AC80FFE0 */ sw $zero, -0x20($a0)
|
||||
/* 00508C 8000448C AC80FFE4 */ sw $zero, -0x1c($a0)
|
||||
/* 005090 80004490 AC80FFE8 */ sw $zero, -0x18($a0)
|
||||
/* 005094 80004494 AC80FFEC */ sw $zero, -0x14($a0)
|
||||
/* 005098 80004498 AC80FFF0 */ sw $zero, -0x10($a0)
|
||||
/* 00509C 8000449C AC80FFF4 */ sw $zero, -0xc($a0)
|
||||
/* 0050A0 800044A0 AC80FFF8 */ sw $zero, -8($a0)
|
||||
/* 0050A4 800044A4 1487FFF7 */ bne $a0, $a3, .L80004484
|
||||
/* 0050A8 800044A8 AC80FFFC */ sw $zero, -4($a0)
|
||||
.wordzero:
|
||||
/* 0050AC 800044AC 2401FFFC */ li $at, -4
|
||||
/* 0050B0 800044B0 00A13824 */ and $a3, $a1, $at
|
||||
/* 0050B4 800044B4 10E00005 */ beqz $a3, .bytezero
|
||||
/* 0050B8 800044B8 00A72823 */ subu $a1, $a1, $a3
|
||||
/* 0050BC 800044BC 00E43821 */ addu $a3, $a3, $a0
|
||||
.L800044C0:
|
||||
/* 0050C0 800044C0 24840004 */ addiu $a0, $a0, 4
|
||||
/* 0050C4 800044C4 1487FFFE */ bne $a0, $a3, .L800044C0
|
||||
/* 0050C8 800044C8 AC80FFFC */ sw $zero, -4($a0)
|
||||
.bytezero:
|
||||
/* 0050CC 800044CC 18A00005 */ blez $a1, .zerodone
|
||||
/* 0050D0 800044D0 00000000 */ nop
|
||||
/* 0050D4 800044D4 00A42821 */ addu $a1, $a1, $a0
|
||||
.L800044D8:
|
||||
/* 0050D8 800044D8 24840001 */ addiu $a0, $a0, 1
|
||||
/* 0050DC 800044DC 1485FFFE */ bne $a0, $a1, .L800044D8
|
||||
/* 0050E0 800044E0 A080FFFF */ sb $zero, -1($a0)
|
||||
.zerodone:
|
||||
/* 0050E4 800044E4 03E00008 */ jr $ra
|
||||
/* 0050E8 800044E8 00000000 */ nop
|
||||
|
||||
/* 0050EC 800044EC 00000000 */ nop
|
||||
/* 0050F0 800044F0 00000000 */ nop
|
||||
/* 0050F4 800044F4 00000000 */ nop
|
||||
/* 0050F8 800044F8 00000000 */ nop
|
||||
/* 0050FC 800044FC 00000000 */ nop
|
||||
/* 005100 80004500 00000000 */ nop
|
||||
/* 005104 80004504 00000000 */ nop
|
||||
/* 005108 80004508 00000000 */ nop
|
||||
/* 00510C 8000450C 00000000 */ nop
|
||||
/* 005110 80004510 00000000 */ nop
|
||||
/* 005114 80004514 00000000 */ nop
|
||||
/* 005118 80004518 00000000 */ nop
|
||||
/* 00511C 8000451C 00000000 */ nop
|
||||
/* 005120 80004520 00000000 */ nop
|
||||
/* 005124 80004524 00000000 */ nop
|
||||
/* 005128 80004528 00000000 */ nop
|
||||
/* 00512C 8000452C 00000000 */ nop
|
||||
/* 005130 80004530 00000000 */ nop
|
||||
/* 005134 80004534 00000000 */ nop
|
||||
/* 005138 80004538 00000000 */ nop
|
||||
/* 00513C 8000453C 00000000 */ nop
|
||||
/* 005140 80004540 00000000 */ nop
|
||||
/* 005144 80004544 00000000 */ nop
|
||||
/* 005148 80004548 00000000 */ nop
|
||||
/* 00514C 8000454C 00000000 */ nop
|
||||
LEAF(bzero)
|
||||
slti $at, $a1, 0xC
|
||||
bnez $at, bytezero
|
||||
negu $v1, $a0
|
||||
andi $v1, $v1, 3
|
||||
beqz $v1, blkzero
|
||||
subu $a1, $a1, $v1
|
||||
swl $zero, ($a0)
|
||||
addu $a0, $a0, $v1
|
||||
blkzero:
|
||||
// align backwards to 0x20
|
||||
li $at, ~0x1F
|
||||
and $a3, $a1, $at
|
||||
// If the result is zero, the amount to zero is less than 0x20 bytes
|
||||
beqz $a3, wordzero
|
||||
subu $a1, $a1, $a3
|
||||
// zero in blocks of 0x20 at a time
|
||||
addu $a3, $a3, $a0
|
||||
1:
|
||||
addiu $a0, $a0, 0x20
|
||||
sw $zero, -0x20($a0)
|
||||
sw $zero, -0x1C($a0)
|
||||
sw $zero, -0x18($a0)
|
||||
sw $zero, -0x14($a0)
|
||||
sw $zero, -0x10($a0)
|
||||
sw $zero, -0xC($a0)
|
||||
sw $zero, -8($a0)
|
||||
bne $a0, $a3, 1b
|
||||
sw $zero, -4($a0)
|
||||
wordzero:
|
||||
// align backwards to 0x4
|
||||
li $at, ~3
|
||||
and $a3, $a1, $at
|
||||
// If the result is zero, the amount to zero is less than 0x4 bytes
|
||||
beqz $a3, bytezero
|
||||
subu $a1, $a1, $a3
|
||||
// zero one word at a time
|
||||
addu $a3, $a3, $a0
|
||||
1:
|
||||
addiu $a0, $a0, 4
|
||||
bne $a0, $a3, 1b
|
||||
sw $zero, -4($a0)
|
||||
bytezero:
|
||||
// test if nothing left to zero
|
||||
blez $a1, zerodone
|
||||
nop
|
||||
// zero one byte at a time
|
||||
addu $a1, $a1, $a0
|
||||
1:
|
||||
addiu $a0, $a0, 1
|
||||
bne $a0, $a1, 1b
|
||||
sb $zero, -1($a0)
|
||||
zerodone:
|
||||
jr $ra
|
||||
nop
|
||||
END(bzero)
|
||||
|
||||
@@ -1,57 +1,57 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
|
||||
glabel func_800D71F0
|
||||
/* B4E390 800D71F0 34018800 */ li $at, 34816
|
||||
/* B4E394 800D71F4 0081082A */ slt $at, $a0, $at
|
||||
/* B4E398 800D71F8 14200010 */ bnez $at, .L800D723C
|
||||
/* B4E39C 800D71FC 240600BC */ li $a2, 188
|
||||
/* B4E3A0 800D7200 00042A02 */ srl $a1, $a0, 8
|
||||
/* B4E3A4 800D7204 20A5FF78 */ addi $a1, $a1, -0x88
|
||||
/* B4E3A8 800D7208 00C50019 */ multu $a2, $a1
|
||||
/* B4E3AC 800D720C 308700FF */ andi $a3, $a0, 0xff
|
||||
/* B4E3B0 800D7210 20E7FFC0 */ addi $a3, $a3, -0x40
|
||||
/* B4E3B4 800D7214 28E10040 */ slti $at, $a3, 0x40
|
||||
/* B4E3B8 800D7218 00003012 */ mflo $a2
|
||||
/* B4E3BC 800D721C 54200003 */ bnezl $at, .L800D722C
|
||||
/* B4E3C0 800D7220 00003012 */ mflo $a2
|
||||
/* B4E3C4 800D7224 20E7FFFF */ addi $a3, $a3, -1
|
||||
/* B4E3C8 800D7228 00003012 */ mflo $a2
|
||||
LEAF(func_800D71F0)
|
||||
li $at, 0x8800
|
||||
slt $at, $a0, $at
|
||||
bnez $at, .L800D723C
|
||||
li $a2, 188
|
||||
srl $a1, $a0, 8
|
||||
addi $a1, $a1, -0x88
|
||||
multu $a2, $a1
|
||||
andi $a3, $a0, 0xFF
|
||||
addi $a3, $a3, -0x40
|
||||
slti $at, $a3, 0x40
|
||||
mflo $a2
|
||||
bnezl $at, .L800D722C
|
||||
mflo $a2
|
||||
addi $a3, $a3, -1
|
||||
mflo $a2
|
||||
.L800D722C:
|
||||
/* B4E3CC 800D722C 20E7030A */ addi $a3, $a3, 0x30a
|
||||
/* B4E3D0 800D7230 00E63820 */ add $a3, $a3, $a2
|
||||
/* B4E3D4 800D7234 03E00008 */ jr $ra
|
||||
/* B4E3D8 800D7238 000711C0 */ sll $v0, $a3, 7
|
||||
addi $a3, $a3, 0x30A
|
||||
add $a3, $a3, $a2
|
||||
jr $ra
|
||||
sll $v0, $a3, 7
|
||||
|
||||
.L800D723C:
|
||||
/* B4E3DC 800D723C 00042A02 */ srl $a1, $a0, 8
|
||||
/* B4E3E0 800D7240 20A5FF7F */ addi $a1, $a1, -0x81
|
||||
/* B4E3E4 800D7244 00C50019 */ multu $a2, $a1
|
||||
/* B4E3E8 800D7248 308700FF */ andi $a3, $a0, 0xff
|
||||
/* B4E3EC 800D724C 20E7FFC0 */ addi $a3, $a3, -0x40
|
||||
/* B4E3F0 800D7250 28E10040 */ slti $at, $a3, 0x40
|
||||
/* B4E3F4 800D7254 00003012 */ mflo $a2
|
||||
/* B4E3F8 800D7258 54200003 */ bnezl $at, .L800D7268
|
||||
/* B4E3FC 800D725C 00003012 */ mflo $a2
|
||||
/* B4E400 800D7260 20E7FFFF */ addi $a3, $a3, -1
|
||||
/* B4E404 800D7264 00003012 */ mflo $a2
|
||||
srl $a1, $a0, 8
|
||||
addi $a1, $a1, -0x81
|
||||
multu $a2, $a1
|
||||
andi $a3, $a0, 0xFF
|
||||
addi $a3, $a3, -0x40
|
||||
slti $at, $a3, 0x40
|
||||
mflo $a2
|
||||
bnezl $at, .L800D7268
|
||||
mflo $a2
|
||||
addi $a3, $a3, -1
|
||||
mflo $a2
|
||||
.L800D7268:
|
||||
/* B4E408 800D7268 00E63820 */ add $a3, $a3, $a2
|
||||
/* B4E40C 800D726C 3C06800D */ lui $a2, %hi(D_800D7288) # $a2, 0x800d
|
||||
/* B4E410 800D7270 00073840 */ sll $a3, $a3, 1
|
||||
/* B4E414 800D7274 24C67288 */ addiu $a2, %lo(D_800D7288) # addiu $a2, $a2, 0x7288
|
||||
/* B4E418 800D7278 00E63820 */ add $a3, $a3, $a2
|
||||
/* B4E41C 800D727C 84E60000 */ lh $a2, ($a3)
|
||||
/* B4E420 800D7280 03E00008 */ jr $ra
|
||||
/* B4E424 800D7284 000611C0 */ sll $v0, $a2, 7
|
||||
add $a3, $a3, $a2
|
||||
lui $a2, %hi(D_800D7288)
|
||||
sll $a3, $a3, 1
|
||||
addiu $a2, %lo(D_800D7288)
|
||||
add $a3, $a3, $a2
|
||||
lh $a2, ($a3)
|
||||
jr $ra
|
||||
sll $v0, $a2, 7
|
||||
END(func_800D71F0)
|
||||
|
||||
glabel D_800D7288
|
||||
.incbin "baserom.z64", 0xB4E428, 0xB4EE70-0xB4E428
|
||||
DATA(D_800D7288)
|
||||
.incbin "baserom.z64", 0xB4E428, 0xB4EE70 - 0xB4E428
|
||||
ENDDATA(D_800D7288)
|
||||
|
||||
62
asm/entry.s
62
asm/entry.s
@@ -1,37 +1,35 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
#include "boot.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.set BOOT_STACK_SIZE, 0x400
|
||||
.balign 16
|
||||
|
||||
glabel entrypoint # 0x80000400
|
||||
lui $t0, %hi(_bootSegmentBssStart)
|
||||
addiu $t0, %lo(_bootSegmentBssStart)
|
||||
li $t1, %lo(_bootSegmentBssSize)
|
||||
.L8000040C:
|
||||
addi $t1, $t1, -8
|
||||
sw $zero, ($t0)
|
||||
sw $zero, 4($t0)
|
||||
bnez $t1, .L8000040C
|
||||
addi $t0, $t0, 8
|
||||
lui $t2, %hi(bootproc)
|
||||
lui $sp, %hi(sBootThreadStack + BOOT_STACK_SIZE)
|
||||
addiu $t2, %lo(bootproc)
|
||||
jr $t2
|
||||
addiu $sp, %lo(sBootThreadStack + BOOT_STACK_SIZE)
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
LEAF(entrypoint)
|
||||
// Clear boot segment .bss
|
||||
la $t0, _bootSegmentBssStart
|
||||
#ifndef AVOID_UB
|
||||
// UB: li only loads the lower 16 bits of _bootSegmentBssSize when it may be larger than this,
|
||||
// so not all of bss may be cleared if it is too large
|
||||
li $t1, _bootSegmentBssSize
|
||||
#else
|
||||
la $t1, _bootSegmentBssSize
|
||||
#endif
|
||||
.clear_bss:
|
||||
addi $t1, $t1, -8
|
||||
sw $zero, ($t0)
|
||||
sw $zero, 4($t0)
|
||||
bnez $t1, .clear_bss
|
||||
addi $t0, $t0, 8
|
||||
// Set up stack and enter program code
|
||||
lui $t2, %hi(bootproc)
|
||||
lui $sp, %hi(sBootThreadStack + BOOT_STACK_SIZE)
|
||||
addiu $t2, %lo(bootproc)
|
||||
jr $t2
|
||||
addiu $sp, %lo(sBootThreadStack + BOOT_STACK_SIZE)
|
||||
END(entrypoint)
|
||||
|
||||
.fill 0x60 - (. - entrypoint)
|
||||
|
||||
1536
asm/exceptasm.s
1536
asm/exceptasm.s
File diff suppressed because it is too large
Load Diff
125
asm/fp.s
125
asm/fp.s
@@ -1,138 +1,165 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .data
|
||||
.section .data
|
||||
|
||||
glabel qNaN0x3FFFFF
|
||||
.word 0x7FBFFFFF
|
||||
.balign 16
|
||||
|
||||
glabel qNaN0x10000
|
||||
.word 0x7F810000
|
||||
DATA(qNaN0x3FFFFF)
|
||||
.word 0x7FBFFFFF
|
||||
ENDDATA(qNaN0x3FFFFF)
|
||||
|
||||
glabel sNaN0x3FFFFF
|
||||
.word 0x7FFFFFFF
|
||||
DATA(qNaN0x10000)
|
||||
.word 0x7F810000
|
||||
ENDDATA(qNaN0x10000)
|
||||
|
||||
DATA(sNaN0x3FFFFF)
|
||||
.word 0x7FFFFFFF
|
||||
ENDDATA(sNaN0x3FFFFF)
|
||||
|
||||
.section .text
|
||||
.section .text
|
||||
|
||||
glabel floorf
|
||||
.balign 16
|
||||
|
||||
LEAF(floorf)
|
||||
floor.w.s $f12, $f12
|
||||
cvt.s.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
END(floorf)
|
||||
|
||||
glabel floor
|
||||
LEAF(floor)
|
||||
floor.w.d $f12, $f12
|
||||
cvt.d.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
END(floor)
|
||||
|
||||
glabel lfloorf
|
||||
LEAF(lfloorf)
|
||||
floor.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lfloorf)
|
||||
|
||||
glabel lfloor
|
||||
LEAF(lfloor)
|
||||
floor.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lfloor)
|
||||
|
||||
glabel ceilf
|
||||
LEAF(ceilf)
|
||||
ceil.w.s $f12, $f12
|
||||
cvt.s.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
END(ceilf)
|
||||
|
||||
glabel ceil
|
||||
LEAF(ceil)
|
||||
ceil.w.d $f12, $f12
|
||||
cvt.d.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
END(ceil)
|
||||
|
||||
glabel lceilf
|
||||
LEAF(lceilf)
|
||||
ceil.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lceilf)
|
||||
|
||||
glabel lceil
|
||||
LEAF(lceil)
|
||||
ceil.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lceil)
|
||||
|
||||
glabel truncf
|
||||
LEAF(truncf)
|
||||
trunc.w.s $f12, $f12
|
||||
cvt.s.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
END(truncf)
|
||||
|
||||
glabel trunc
|
||||
LEAF(trunc)
|
||||
trunc.w.d $f12, $f12
|
||||
cvt.d.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
END(trunc)
|
||||
|
||||
glabel ltruncf
|
||||
LEAF(ltruncf)
|
||||
trunc.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(ltruncf)
|
||||
|
||||
glabel ltrunc
|
||||
LEAF(ltrunc)
|
||||
trunc.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(ltrunc)
|
||||
|
||||
glabel nearbyintf
|
||||
LEAF(nearbyintf)
|
||||
round.w.s $f12, $f12
|
||||
cvt.s.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
END(nearbyintf)
|
||||
|
||||
glabel nearbyint
|
||||
LEAF(nearbyint)
|
||||
round.w.d $f12, $f12
|
||||
cvt.d.w $f0, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
END(nearbyint)
|
||||
|
||||
glabel lnearbyintf
|
||||
LEAF(lnearbyintf)
|
||||
round.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lnearbyintf)
|
||||
|
||||
glabel lnearbyint
|
||||
LEAF(lnearbyint)
|
||||
round.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lnearbyint)
|
||||
|
||||
glabel roundf
|
||||
LEAF(roundf)
|
||||
li.s $f4, 0.5
|
||||
nop
|
||||
add.s $f0, $f12, $f4
|
||||
floor.w.s $f0, $f0
|
||||
cvt.s.w $f0, $f0
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f0
|
||||
END(roundf)
|
||||
|
||||
glabel round
|
||||
LEAF(round)
|
||||
li.d $f4, 0.5
|
||||
nop
|
||||
add.d $f0, $f12, $f4
|
||||
floor.w.d $f0, $f0
|
||||
cvt.d.w $f0, $f0
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f0
|
||||
END(round)
|
||||
|
||||
glabel lroundf
|
||||
LEAF(lroundf)
|
||||
li.s $f4, 0.5
|
||||
nop
|
||||
add.s $f0, $f12, $f4
|
||||
floor.w.s $f0, $f0
|
||||
mfc1 $v0, $f0
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lroundf)
|
||||
|
||||
glabel lround
|
||||
LEAF(lround)
|
||||
li.d $f4, 0.5
|
||||
nop
|
||||
add.d $f0, $f12, $f4
|
||||
floor.w.d $f0, $f0
|
||||
mfc1 $v0, $f0
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
END(lround)
|
||||
|
||||
@@ -1,42 +1,40 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.balign 32
|
||||
|
||||
/* B7D670 801064D0 00000000 */ nop
|
||||
/* B7D674 801064D4 00000000 */ nop
|
||||
/* B7D678 801064D8 00000000 */ nop
|
||||
/* B7D67C 801064DC 00000000 */ nop
|
||||
glabel guMtxF2L
|
||||
/* B7D680 801064E0 3C014780 */ li $at, 0x47800000 # 0.000000
|
||||
/* B7D684 801064E4 44810000 */ mtc1 $at, $f0
|
||||
/* B7D688 801064E8 3C19FFFF */ lui $t9, 0xffff
|
||||
/* B7D68C 801064EC 24B80020 */ addiu $t8, $a1, 0x20
|
||||
.L801064F0:
|
||||
/* B7D690 801064F0 C4840000 */ lwc1 $f4, ($a0)
|
||||
/* B7D694 801064F4 C48A0004 */ lwc1 $f10, 4($a0)
|
||||
/* B7D698 801064F8 24A50004 */ addiu $a1, $a1, 4
|
||||
/* B7D69C 801064FC 46002182 */ mul.s $f6, $f4, $f0
|
||||
/* B7D6A0 80106500 24840008 */ addiu $a0, $a0, 8
|
||||
/* B7D6A4 80106504 46005402 */ mul.s $f16, $f10, $f0
|
||||
/* B7D6A8 80106508 4600320D */ trunc.w.s $f8, $f6
|
||||
/* B7D6AC 8010650C 4600848D */ trunc.w.s $f18, $f16
|
||||
/* B7D6B0 80106510 44084000 */ mfc1 $t0, $f8
|
||||
/* B7D6B4 80106514 44099000 */ mfc1 $t1, $f18
|
||||
/* B7D6B8 80106518 01195024 */ and $t2, $t0, $t9
|
||||
/* B7D6BC 8010651C 00086C00 */ sll $t5, $t0, 0x10
|
||||
/* B7D6C0 80106520 00095C02 */ srl $t3, $t1, 0x10
|
||||
/* B7D6C4 80106524 312EFFFF */ andi $t6, $t1, 0xffff
|
||||
/* B7D6C8 80106528 014B6025 */ or $t4, $t2, $t3
|
||||
/* B7D6CC 8010652C 01AE7825 */ or $t7, $t5, $t6
|
||||
/* B7D6D0 80106530 ACACFFFC */ sw $t4, -4($a1)
|
||||
/* B7D6D4 80106534 14B8FFEE */ bne $a1, $t8, .L801064F0
|
||||
/* B7D6D8 80106538 ACAF001C */ sw $t7, 0x1c($a1)
|
||||
/* B7D6DC 8010653C 03E00008 */ jr $ra
|
||||
/* B7D6E0 80106540 00000000 */ nop
|
||||
#define MTX_INTPART 0
|
||||
#define MTX_FRACPART 0x20
|
||||
|
||||
LEAF(guMtxF2L)
|
||||
li $at, 0x47800000 // 65536.0f
|
||||
mtc1 $at, $f0
|
||||
li $t9, 0xFFFF0000
|
||||
addiu $t8, $a1, MTX_FRACPART
|
||||
1:
|
||||
lwc1 $f4, ($a0)
|
||||
lwc1 $f10, 4($a0)
|
||||
addiu $a1, $a1, 4
|
||||
mul.s $f6, $f4, $f0
|
||||
addiu $a0, $a0, 8
|
||||
mul.s $f16, $f10, $f0
|
||||
trunc.w.s $f8, $f6
|
||||
trunc.w.s $f18, $f16
|
||||
mfc1 $t0, $f8
|
||||
mfc1 $t1, $f18
|
||||
and $t2, $t0, $t9
|
||||
sll $t5, $t0, 0x10
|
||||
srl $t3, $t1, 0x10
|
||||
andi $t6, $t1, 0xFFFF
|
||||
or $t4, $t2, $t3
|
||||
or $t7, $t5, $t6
|
||||
sw $t4, (MTX_INTPART-4)($a1)
|
||||
bne $a1, $t8, 1b
|
||||
sw $t7, (MTX_FRACPART-4)($a1)
|
||||
jr $ra
|
||||
nop
|
||||
END(guMtxF2L)
|
||||
|
||||
@@ -1,31 +1,30 @@
|
||||
.include "macro.inc"
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64 # allow use of 64-bit general purpose registers
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.balign 32
|
||||
|
||||
glabel guMtxIdent
|
||||
/* B7AD00 80103B60 20080001 */ addi $t0, $zero, 1
|
||||
/* B7AD04 80103B64 00084C00 */ sll $t1, $t0, 0x10
|
||||
/* B7AD08 80103B68 AC890000 */ sw $t1, ($a0)
|
||||
/* B7AD0C 80103B6C AC800004 */ sw $zero, 4($a0)
|
||||
/* B7AD10 80103B70 AC880008 */ sw $t0, 8($a0)
|
||||
/* B7AD14 80103B74 AC80000C */ sw $zero, 0xc($a0)
|
||||
/* B7AD18 80103B78 AC800010 */ sw $zero, 0x10($a0)
|
||||
/* B7AD1C 80103B7C AC890014 */ sw $t1, 0x14($a0)
|
||||
/* B7AD20 80103B80 AC800018 */ sw $zero, 0x18($a0)
|
||||
/* B7AD24 80103B84 AC88001C */ sw $t0, 0x1c($a0)
|
||||
/* B7AD28 80103B88 AC800020 */ sw $zero, 0x20($a0)
|
||||
/* B7AD2C 80103B8C AC800024 */ sw $zero, 0x24($a0)
|
||||
/* B7AD30 80103B90 AC800028 */ sw $zero, 0x28($a0)
|
||||
/* B7AD34 80103B94 AC80002C */ sw $zero, 0x2c($a0)
|
||||
/* B7AD38 80103B98 AC800030 */ sw $zero, 0x30($a0)
|
||||
/* B7AD3C 80103B9C AC800034 */ sw $zero, 0x34($a0)
|
||||
/* B7AD40 80103BA0 AC800038 */ sw $zero, 0x38($a0)
|
||||
/* B7AD44 80103BA4 03E00008 */ jr $ra
|
||||
/* B7AD48 80103BA8 AC80003C */ sw $zero, 0x3c($a0)
|
||||
LEAF(guMtxIdent)
|
||||
addi $t0, $zero, 1
|
||||
sll $t1, $t0, 0x10
|
||||
sw $t1, ($a0)
|
||||
sw $zero, 4($a0)
|
||||
sw $t0, 8($a0)
|
||||
sw $zero, 0xc($a0)
|
||||
sw $zero, 0x10($a0)
|
||||
sw $t1, 0x14($a0)
|
||||
sw $zero, 0x18($a0)
|
||||
sw $t0, 0x1C($a0)
|
||||
sw $zero, 0x20($a0)
|
||||
sw $zero, 0x24($a0)
|
||||
sw $zero, 0x28($a0)
|
||||
sw $zero, 0x2c($a0)
|
||||
sw $zero, 0x30($a0)
|
||||
sw $zero, 0x34($a0)
|
||||
sw $zero, 0x38($a0)
|
||||
jr $ra
|
||||
sw $zero, 0x3C($a0)
|
||||
END(guMtxIdent)
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user