mirror of
https://github.com/encounter/tp.git
synced 2026-07-11 06:18:46 -07:00
Improving compatibility with standard cpp compiler (#2920)
* Improving compatibility with standard cpp compiler * Add __REGISTER macro for non mwcc compatibility * Fix for PR comments * fix missing define for revolution * Simplifying cSAngle conversion
This commit is contained in:
+2
-2
@@ -285,9 +285,9 @@ if config.version in USE_REVOLUTION_SDK_VERSIONS:
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# Debug flags
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if args.debug:
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# Or -sym dwarf-2 for Wii compilers
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cflags_base.extend(["-sym on", "-DDEBUG=1"])
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cflags_base.extend(["-sym on", "-DDEBUG=1", "-DDEBUG_DEFINED=1", "-DNDEBUG_DEFINED=0"])
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else:
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cflags_base.append("-DNDEBUG=1")
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cflags_base.extend(["-DNDEBUG=1", "-DNDEBUG_DEFINED=1", "-DDEBUG_DEFINED=0"])
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# Warning flags
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if args.warn == "all":
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@@ -479,26 +479,26 @@ inline f32 J2DHermiteInterpolation<f32>(f32 f1, f32* f2, f32* f3, f32* f4, f32*
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}
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template <>
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inline f32 J2DHermiteInterpolation<s16>(register f32 pp1, register s16* pp2, register s16* pp3,
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register s16* pp4, register s16* pp5, register s16* pp6,
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register s16* pp7) {
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inline f32 J2DHermiteInterpolation<s16>(__REGISTER f32 pp1, __REGISTER s16* pp2, __REGISTER s16* pp3,
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__REGISTER s16* pp4, __REGISTER s16* pp5, __REGISTER s16* pp6,
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__REGISTER s16* pp7) {
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#ifdef __MWERKS__
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register f32 p1 = pp1;
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register f32 ff8;
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register f32 ff7;
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register f32 ff6;
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register f32 ff5;
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register f32 ff4;
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register f32 ff3;
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register f32 ff2;
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register f32 ff0;
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register f32 fout;
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register s16* p2 = pp2;
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register s16* p3 = pp3;
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register s16* p4 = pp4;
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register s16* p5 = pp5;
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register s16* p6 = pp6;
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register s16* p7 = pp7;
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__REGISTER f32 p1 = pp1;
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__REGISTER f32 ff8;
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__REGISTER f32 ff7;
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__REGISTER f32 ff6;
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__REGISTER f32 ff5;
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__REGISTER f32 ff4;
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__REGISTER f32 ff3;
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__REGISTER f32 ff2;
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__REGISTER f32 ff0;
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__REGISTER f32 fout;
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__REGISTER s16* p2 = pp2;
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__REGISTER s16* p3 = pp3;
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__REGISTER s16* p4 = pp4;
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__REGISTER s16* p5 = pp5;
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__REGISTER s16* p6 = pp6;
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__REGISTER s16* p7 = pp7;
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// clang-format off
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asm {
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psq_l ff2, 0(p2), 0x1, 5
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@@ -100,7 +100,7 @@ public:
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/* 0x10 */ u32 mFlags;
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}; // Size: 0x14
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inline void J3DFillZero32B(register void* param_0, register u32 param_1) {
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inline void J3DFillZero32B(__REGISTER void* param_0, __REGISTER u32 param_1) {
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#ifdef __MWERKS__
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asm {
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srwi param_1, param_1, 5
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@@ -4,13 +4,13 @@
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#include "JSystem/J3DGraphBase/J3DSys.h"
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// matches debug
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inline f32 J3DCalcZValue(register MtxP m, register Vec v) {
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inline f32 J3DCalcZValue(__REGISTER MtxP m, __REGISTER Vec v) {
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#ifdef __MWERKS__
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register f32 temp_f4;
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register f32 out;
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register f32 temp_f0;
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register f32 temp_f2;
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register f32 temp_f1 = 1.0f;
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__REGISTER f32 temp_f4;
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__REGISTER f32 out;
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__REGISTER f32 temp_f0;
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__REGISTER f32 temp_f2;
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__REGISTER f32 temp_f1 = 1.0f;
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// clang-format off
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asm {
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@@ -54,9 +54,9 @@ struct J3DTextureSRTInfo {
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inline void operator=(J3DTextureSRTInfo const& other) {
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#ifdef __MWERKS__
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register const f32* src = &other.mScaleX;
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register f32* dst = &mScaleX;
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register f32 xy;
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__REGISTER const f32* src = &other.mScaleX;
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__REGISTER f32* dst = &mScaleX;
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__REGISTER f32 xy;
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asm {
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psq_l xy, 0(src), 0, 0
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psq_st xy, 0(dst), 0, 0
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@@ -23,10 +23,10 @@ struct J3DTransformInfo {
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} */
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#ifdef __MWERKS__
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inline J3DTransformInfo& operator=(const register J3DTransformInfo& b) {
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register const J3DTransformInfo& var_r31 = b;
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register J3DTransformInfo& var_r30 = *this;
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register f32 var_f31;
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inline J3DTransformInfo& operator=(const __REGISTER J3DTransformInfo& b) {
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__REGISTER const J3DTransformInfo& var_r31 = b;
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__REGISTER J3DTransformInfo& var_r30 = *this;
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__REGISTER f32 var_f31;
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asm {
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psq_l var_f31, J3DTransformInfo.mScale(var_r31), 0, 0
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psq_st var_f31, J3DTransformInfo.mScale(var_r30), 0, 0
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@@ -64,13 +64,13 @@ void J3DScaleNrmMtx33(f32 (*)[3], const Vec&);
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void J3DMtxProjConcat(f32 (*)[4], f32 (*)[4], f32 (*)[4]);
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void J3DPSMtxArrayConcat(f32 (*)[4], f32 (*)[4], f32 (*)[4], u32);
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inline void J3DPSMtx33Copy(register Mtx3P src, register Mtx3P dst) {
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inline void J3DPSMtx33Copy(__REGISTER Mtx3P src, __REGISTER Mtx3P dst) {
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#ifdef __MWERKS__
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register f32 fr4;
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register f32 fr3;
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register f32 fr2;
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register f32 fr1;
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register f32 fr0;
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__REGISTER f32 fr4;
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__REGISTER f32 fr3;
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__REGISTER f32 fr2;
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__REGISTER f32 fr1;
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__REGISTER f32 fr0;
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asm {
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psq_l fr4, 0(src), 0, 0
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@@ -87,14 +87,14 @@ inline void J3DPSMtx33Copy(register Mtx3P src, register Mtx3P dst) {
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#endif
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}
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inline void J3DPSMtx33CopyFrom34(register MtxP src, register Mtx3P dst) {
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inline void J3DPSMtx33CopyFrom34(__REGISTER MtxP src, __REGISTER Mtx3P dst) {
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#ifdef __MWERKS__
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register f32 x_y1;
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register f32 z1;
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register f32 x_y2;
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register f32 z2;
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register f32 x_y3;
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register f32 z3;
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__REGISTER f32 x_y1;
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__REGISTER f32 z1;
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__REGISTER f32 x_y2;
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__REGISTER f32 z2;
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__REGISTER f32 x_y3;
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__REGISTER f32 z3;
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asm {
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psq_l x_y1, 0(src), 0, 0
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lfs z1, 8(src)
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@@ -112,7 +112,7 @@ inline void J3DPSMtx33CopyFrom34(register MtxP src, register Mtx3P dst) {
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#endif
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}
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inline void J3DPSMulMtxVec(register MtxP mtx, register Vec* vec, register Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER MtxP mtx, __REGISTER Vec* vec, __REGISTER Vec* dst) {
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#ifdef __MWERKS__
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asm {
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psq_l f0, 0(vec), 0, 0
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@@ -139,7 +139,7 @@ inline void J3DPSMulMtxVec(register MtxP mtx, register Vec* vec, register Vec* d
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#endif
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}
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inline void J3DPSMulMtxVec(register MtxP mtx, register S16Vec* vec, register S16Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER MtxP mtx, __REGISTER S16Vec* vec, __REGISTER S16Vec* dst) {
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#ifdef __MWERKS__
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asm {
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psq_l f0, 0(vec), 0, 7
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@@ -166,7 +166,7 @@ inline void J3DPSMulMtxVec(register MtxP mtx, register S16Vec* vec, register S16
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#endif
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}
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inline void J3DPSMulMtxVec(register Mtx3P mtx, register Vec* vec, register Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER Mtx3P mtx, __REGISTER Vec* vec, __REGISTER Vec* dst) {
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#ifdef __MWERKS__
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asm {
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lis r6, PSMulUnit01@ha
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@@ -197,7 +197,7 @@ inline void J3DPSMulMtxVec(register Mtx3P mtx, register Vec* vec, register Vec*
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#endif
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}
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inline void J3DPSMulMtxVec(register Mtx3P mtx, register S16Vec* vec, register S16Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER Mtx3P mtx, __REGISTER S16Vec* vec, __REGISTER S16Vec* dst) {
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#ifdef __MWERKS__
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asm {
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lis r6, PSMulUnit01@ha
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+27
-27
@@ -127,11 +127,11 @@ struct TVec3<s16> {
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inline void setTVec3f(const f32* vec_a, f32* vec_b) {
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#ifdef __MWERKS__
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const register f32* v_a = vec_a;
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register f32* v_b = vec_b;
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const __REGISTER f32* v_a = vec_a;
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__REGISTER f32* v_b = vec_b;
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register f32 a_x;
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register f32 b_x;
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__REGISTER f32 a_x;
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__REGISTER f32 b_x;
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asm {
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psq_l a_x, 0(v_a), 0, 0
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@@ -154,14 +154,14 @@ inline float fsqrt_step(float mag) {
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#endif
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}
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inline void mulInternal(register const f32* a, register const f32* b, register float* dst) {
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inline void mulInternal(__REGISTER const f32* a, __REGISTER const f32* b, __REGISTER float* dst) {
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#ifdef __MWERKS__
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register f32 a_x_y;
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register f32 b_x_y;
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register f32 x_y;
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register f32 za;
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register f32 zb;
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register f32 z;
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__REGISTER f32 a_x_y;
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__REGISTER f32 b_x_y;
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__REGISTER f32 x_y;
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__REGISTER f32 za;
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__REGISTER f32 zb;
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__REGISTER f32 z;
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asm {
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psq_l a_x_y, 0(a), 0, 0
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@@ -283,12 +283,12 @@ struct TVec3<f32> : public Vec {
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return VECMag((Vec*)this);
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}
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void scale(register f32 sc) {
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void scale(__REGISTER f32 sc) {
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#ifdef __MWERKS__
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register f32 z;
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register f32 x_y;
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register f32* dst = &x;
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register f32 zres;
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__REGISTER f32 z;
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__REGISTER f32 x_y;
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__REGISTER f32* dst = &x;
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__REGISTER f32 zres;
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asm {
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psq_l x_y, 0(dst), 0, 0
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@@ -301,13 +301,13 @@ struct TVec3<f32> : public Vec {
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#endif
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}
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void scale(register f32 sc, const TVec3<f32>& other) {
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void scale(__REGISTER f32 sc, const TVec3<f32>& other) {
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#ifdef __MWERKS__
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register const f32* src = &other.x;
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register f32 z;
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register f32 x_y;
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register f32* dst = &x;
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register f32 zres;
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__REGISTER const f32* src = &other.x;
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__REGISTER f32 z;
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__REGISTER f32 x_y;
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__REGISTER f32* dst = &x;
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__REGISTER f32 zres;
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asm {
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psq_l x_y, 0(src), 0, 0
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@@ -320,16 +320,16 @@ struct TVec3<f32> : public Vec {
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#endif
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}
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void scaleAdd(register f32 sc, const TVec3<f32>& a, const TVec3<f32>& b) {
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void scaleAdd(__REGISTER f32 sc, const TVec3<f32>& a, const TVec3<f32>& b) {
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JMAVECScaleAdd(&a, &b, this, sc);
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}
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void negateInternal(TVec3<f32>* dst) {
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#ifdef __MWERKS__
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register f32* rdst = &dst->x;
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const register f32* src = &x;
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register f32 x_y;
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register f32 z;
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__REGISTER f32* rdst = &dst->x;
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const __REGISTER f32* src = &x;
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__REGISTER f32 x_y;
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__REGISTER f32 z;
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asm {
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psq_l x_y, 0(src), 0, 0
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@@ -7,9 +7,9 @@
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void JMAMTXApplyScale(const Mtx, Mtx, f32, f32, f32);
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void JMAEulerToQuat(s16 param_0, s16 param_1, s16 param_2, Quaternion* param_3);
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void JMAQuatLerp(const Quaternion*, const Quaternion*, f32, Quaternion*);
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void JMAFastVECNormalize(register const Vec* src, register Vec* dst);
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void JMAVECScaleAdd(register const Vec* vec1, register const Vec* vec2, register Vec* dst,
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register f32 scale);
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void JMAFastVECNormalize(__REGISTER const Vec* src, __REGISTER Vec* dst);
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void JMAVECScaleAdd(__REGISTER const Vec* vec1, __REGISTER const Vec* vec2, __REGISTER Vec* dst,
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__REGISTER f32 scale);
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inline int JMAAbs(int value) {
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#ifdef __MWERKS__
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@@ -23,9 +23,9 @@ inline f32 JMAFastReciprocal(f32 value) {
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#endif
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}
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inline float __frsqrtes(register double f) {
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inline float __frsqrtes(__REGISTER double f) {
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#ifdef __MWERKS__
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register float out;
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__REGISTER float out;
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// clang-format off
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asm {
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@@ -37,10 +37,10 @@ inline float __frsqrtes(register double f) {
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#endif
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}
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inline f32 JMAFastSqrt(register const f32 input) {
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inline f32 JMAFastSqrt(__REGISTER const f32 input) {
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#ifdef __MWERKS__
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if (input > 0.0f) {
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register f32 out;
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__REGISTER f32 out;
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asm {
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frsqrte out, input
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}
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@@ -51,17 +51,17 @@ inline f32 JMAFastSqrt(register const f32 input) {
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#endif
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}
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inline f32 JMAHermiteInterpolation(register f32 p1, register f32 p2, register f32 p3,
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register f32 p4, register f32 p5, register f32 p6,
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register f32 p7) {
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inline f32 JMAHermiteInterpolation(__REGISTER f32 p1, __REGISTER f32 p2, __REGISTER f32 p3,
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__REGISTER f32 p4, __REGISTER f32 p5, __REGISTER f32 p6,
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__REGISTER f32 p7) {
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#ifdef __MWERKS__
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register f32 ff25;
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register f32 ff31;
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register f32 ff30;
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register f32 ff29;
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register f32 ff28;
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register f32 ff27;
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register f32 ff26;
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__REGISTER f32 ff25;
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__REGISTER f32 ff31;
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__REGISTER f32 ff30;
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__REGISTER f32 ff29;
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__REGISTER f32 ff28;
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__REGISTER f32 ff27;
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__REGISTER f32 ff26;
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// clang-format off
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asm {
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fsubs ff31, p1, p2
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@@ -99,10 +99,10 @@ inline void fastVECNormalize(const Vec* src, Vec* dst) {
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return JMAFastVECNormalize(src, dst);
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}
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inline void gekko_ps_copy3(register void* dst, register const void* src) {
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inline void gekko_ps_copy3(__REGISTER void* dst, __REGISTER const void* src) {
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#ifdef __MWERKS__
|
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register f32 src0;
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register f32 src1;
|
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__REGISTER f32 src0;
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__REGISTER f32 src1;
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asm {
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psq_l src0, 0(src), 0, 0
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lfs src1, 8(src)
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@@ -112,11 +112,11 @@ inline void gekko_ps_copy3(register void* dst, register const void* src) {
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#endif
|
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}
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inline void gekko_ps_copy6(register void* dst, register const void* src) {
|
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inline void gekko_ps_copy6(__REGISTER void* dst, __REGISTER const void* src) {
|
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#ifdef __MWERKS__
|
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register f32 src0;
|
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register f32 src1;
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register f32 src2;
|
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__REGISTER f32 src0;
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__REGISTER f32 src1;
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__REGISTER f32 src2;
|
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asm {
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psq_l src0, 0(src), 0, 0
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psq_l src1, 8(src), 0, 0
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@@ -128,14 +128,14 @@ inline void gekko_ps_copy6(register void* dst, register const void* src) {
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#endif
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}
|
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inline void gekko_ps_copy12(register void* dst, register const void* src) {
|
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inline void gekko_ps_copy12(__REGISTER void* dst, __REGISTER const void* src) {
|
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#ifdef __MWERKS__
|
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register f32 src0;
|
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register f32 src1;
|
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register f32 src2;
|
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register f32 src3;
|
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register f32 src4;
|
||||
register f32 src5;
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__REGISTER f32 src0;
|
||||
__REGISTER f32 src1;
|
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__REGISTER f32 src2;
|
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__REGISTER f32 src3;
|
||||
__REGISTER f32 src4;
|
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__REGISTER f32 src5;
|
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asm {
|
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psq_l src0, 0(src), 0, 0
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psq_l src1, 8(src), 0, 0
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||||
@@ -153,16 +153,16 @@ inline void gekko_ps_copy12(register void* dst, register const void* src) {
|
||||
#endif
|
||||
}
|
||||
|
||||
inline void gekko_ps_copy16(register void* dst, register const void* src) {
|
||||
inline void gekko_ps_copy16(__REGISTER void* dst, __REGISTER const void* src) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 src0;
|
||||
register f32 src1;
|
||||
register f32 src2;
|
||||
register f32 src3;
|
||||
register f32 src4;
|
||||
register f32 src5;
|
||||
register f32 src6;
|
||||
register f32 src7;
|
||||
__REGISTER f32 src0;
|
||||
__REGISTER f32 src1;
|
||||
__REGISTER f32 src2;
|
||||
__REGISTER f32 src3;
|
||||
__REGISTER f32 src4;
|
||||
__REGISTER f32 src5;
|
||||
__REGISTER f32 src6;
|
||||
__REGISTER f32 src7;
|
||||
asm {
|
||||
psq_l src0, 0(src), 0, 0
|
||||
psq_l src1, 8(src), 0, 0
|
||||
@@ -187,13 +187,13 @@ inline void gekko_ps_copy16(register void* dst, register const void* src) {
|
||||
}; // namespace JMath
|
||||
|
||||
namespace JMathInlineVEC {
|
||||
inline void C_VECAdd(register const Vec* a, register const Vec* b, register Vec* ab) {
|
||||
inline void C_VECAdd(__REGISTER const Vec* a, __REGISTER const Vec* b, __REGISTER Vec* ab) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 axy;
|
||||
register f32 bxy;
|
||||
register f32 az;
|
||||
register f32 sumz;
|
||||
register f32 bz;
|
||||
__REGISTER f32 axy;
|
||||
__REGISTER f32 bxy;
|
||||
__REGISTER f32 az;
|
||||
__REGISTER f32 sumz;
|
||||
__REGISTER f32 bz;
|
||||
asm {
|
||||
psq_l axy, 0(a), 0, 0
|
||||
psq_l bxy, 0(b), 0, 0
|
||||
@@ -207,13 +207,13 @@ namespace JMathInlineVEC {
|
||||
#endif
|
||||
}
|
||||
|
||||
inline void C_VECSubtract(register const Vec* a, register const Vec* b, register Vec* ab) {
|
||||
inline void C_VECSubtract(__REGISTER const Vec* a, __REGISTER const Vec* b, __REGISTER Vec* ab) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 axy;
|
||||
register f32 bxy;
|
||||
register f32 az;
|
||||
register f32 subz;
|
||||
register f32 bz;
|
||||
__REGISTER f32 axy;
|
||||
__REGISTER f32 bxy;
|
||||
__REGISTER f32 az;
|
||||
__REGISTER f32 subz;
|
||||
__REGISTER f32 bz;
|
||||
asm {
|
||||
psq_l axy, 0(a), 0, 0
|
||||
psq_l bxy, 0(b), 0, 0
|
||||
@@ -227,11 +227,11 @@ namespace JMathInlineVEC {
|
||||
#endif
|
||||
}
|
||||
|
||||
inline f32 C_VECSquareMag(register const Vec* v) {
|
||||
inline f32 C_VECSquareMag(__REGISTER const Vec* v) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 x_y;
|
||||
register f32 z;
|
||||
register f32 res;
|
||||
__REGISTER f32 x_y;
|
||||
__REGISTER f32 z;
|
||||
__REGISTER f32 res;
|
||||
|
||||
asm {
|
||||
psq_l x_y, 0(v), 0, 0
|
||||
@@ -244,13 +244,13 @@ namespace JMathInlineVEC {
|
||||
#endif
|
||||
}
|
||||
|
||||
inline f32 C_VECDotProduct(register const Vec *a, register const Vec *b) {
|
||||
inline f32 C_VECDotProduct(__REGISTER const Vec *a, __REGISTER const Vec *b) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 res;
|
||||
register f32 thisyz;
|
||||
register f32 otheryz;
|
||||
register f32 otherxy;
|
||||
register f32 thisxy;
|
||||
__REGISTER f32 res;
|
||||
__REGISTER f32 thisyz;
|
||||
__REGISTER f32 otheryz;
|
||||
__REGISTER f32 otherxy;
|
||||
__REGISTER f32 thisxy;
|
||||
asm {
|
||||
psq_l thisyz, 4(a), 0, 0
|
||||
psq_l otheryz, 4(b), 0, 0
|
||||
|
||||
@@ -288,10 +288,10 @@ extern int __OSInIPL;
|
||||
|
||||
#define ASSERT(cond) ASSERTLINE(__LINE__, cond)
|
||||
|
||||
inline s16 __OSf32tos16(register f32 inF) {
|
||||
register s16 out;
|
||||
inline s16 __OSf32tos16(__REGISTER f32 inF) {
|
||||
__REGISTER s16 out;
|
||||
u32 tmp;
|
||||
register u32* tmpPtr = &tmp;
|
||||
__REGISTER u32* tmpPtr = &tmp;
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
asm {
|
||||
@@ -308,10 +308,10 @@ inline void OSf32tos16(f32* f, s16* out) {
|
||||
*out = __OSf32tos16(*f);
|
||||
}
|
||||
|
||||
inline u8 __OSf32tou8(register f32 inF) {
|
||||
register u8 out;
|
||||
inline u8 __OSf32tou8(__REGISTER f32 inF) {
|
||||
__REGISTER u8 out;
|
||||
u32 tmp;
|
||||
register u32* tmpPtr = &tmp;
|
||||
__REGISTER u32* tmpPtr = &tmp;
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
asm {
|
||||
|
||||
@@ -76,6 +76,12 @@ typedef unsigned int uint;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define __REGISTER register
|
||||
#else
|
||||
#define __REGISTER
|
||||
#endif
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#endif
|
||||
|
||||
@@ -306,7 +306,7 @@ extern BOOL __OSInReboot;
|
||||
|
||||
#define ASSERT(cond) ASSERTLINE(__LINE__, cond)
|
||||
|
||||
inline s16 __OSf32tos16(register f32 inF) {
|
||||
inline s16 __OSf32tos16(__REGISTER f32 inF) {
|
||||
#ifdef __MWERKS__
|
||||
register s16 out;
|
||||
u32 tmp;
|
||||
@@ -327,7 +327,7 @@ inline void OSf32tos16(f32* f, s16* out) {
|
||||
*out = __OSf32tos16(*f);
|
||||
}
|
||||
|
||||
inline u8 __OSf32tou8(register f32 inF) {
|
||||
inline u8 __OSf32tou8(__REGISTER f32 inF) {
|
||||
#ifdef __MWERKS__
|
||||
register u8 out;
|
||||
u32 tmp;
|
||||
|
||||
@@ -73,6 +73,12 @@ typedef unsigned int uint;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define __REGISTER register
|
||||
#else
|
||||
#define __REGISTER
|
||||
#endif
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#endif
|
||||
|
||||
@@ -507,10 +507,10 @@ inline f32 J3DHermiteInterpolation(f32 p1, f32 const* p2, f32 const* p3, f32 con
|
||||
return JMAHermiteInterpolation(p1, *p2, *p3, *p4, *p5, *p6, *p7);
|
||||
}
|
||||
|
||||
inline f32 J3DHermiteInterpolation(register f32 pp1, register s16 const* pp2,
|
||||
register s16 const* pp3, register s16 const* pp4,
|
||||
register s16 const* pp5, register s16 const* pp6,
|
||||
register s16 const* pp7) {
|
||||
inline f32 J3DHermiteInterpolation(__REGISTER f32 pp1, __REGISTER s16 const* pp2,
|
||||
__REGISTER s16 const* pp3, __REGISTER s16 const* pp4,
|
||||
__REGISTER s16 const* pp5, __REGISTER s16 const* pp6,
|
||||
__REGISTER s16 const* pp7) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 p1 = pp1;
|
||||
register f32 ff8;
|
||||
|
||||
@@ -237,10 +237,10 @@ s32 J3DMtxBuffer::createBumpMtxArray(J3DModelData* i_modelData, u32 mtxNum) {
|
||||
static f32 J3DUnit01[] = { 0.0f, 1.0f };
|
||||
|
||||
void J3DMtxBuffer::calcWeightEnvelopeMtx() {
|
||||
register MtxP weightAnmMtx;
|
||||
register Mtx* worldMtx;
|
||||
register Mtx* invMtx;
|
||||
register f32 weight;
|
||||
__REGISTER MtxP weightAnmMtx;
|
||||
__REGISTER Mtx* worldMtx;
|
||||
__REGISTER Mtx* invMtx;
|
||||
__REGISTER f32 weight;
|
||||
int idx;
|
||||
int j;
|
||||
int mixNum;
|
||||
@@ -251,27 +251,27 @@ void J3DMtxBuffer::calcWeightEnvelopeMtx() {
|
||||
u8* pScale;
|
||||
|
||||
#if DEBUG || !__MWERKS__
|
||||
register Mtx mtx;
|
||||
__REGISTER Mtx mtx;
|
||||
#else
|
||||
register f32 var_f1;
|
||||
register f32 var_f2;
|
||||
register f32 var_f3;
|
||||
register f32 var_f4;
|
||||
register f32 var_f5;
|
||||
register f32 var_f6;
|
||||
register f32 var_f7;
|
||||
register f32 var_f8;
|
||||
register f32 var_f9;
|
||||
register f32 var_f10;
|
||||
register f32 var_f11;
|
||||
register f32 var_f12;
|
||||
register f32 var_f13;
|
||||
register f32 var_f31;
|
||||
register f32 var_f30;
|
||||
register f32 var_f29;
|
||||
register f32 var_f28;
|
||||
register f32 var_f27;
|
||||
register f32* var_r7 = J3DUnit01;
|
||||
__REGISTER f32 var_f1;
|
||||
__REGISTER f32 var_f2;
|
||||
__REGISTER f32 var_f3;
|
||||
__REGISTER f32 var_f4;
|
||||
__REGISTER f32 var_f5;
|
||||
__REGISTER f32 var_f6;
|
||||
__REGISTER f32 var_f7;
|
||||
__REGISTER f32 var_f8;
|
||||
__REGISTER f32 var_f9;
|
||||
__REGISTER f32 var_f10;
|
||||
__REGISTER f32 var_f11;
|
||||
__REGISTER f32 var_f12;
|
||||
__REGISTER f32 var_f13;
|
||||
__REGISTER f32 var_f31;
|
||||
__REGISTER f32 var_f30;
|
||||
__REGISTER f32 var_f29;
|
||||
__REGISTER f32 var_f28;
|
||||
__REGISTER f32 var_f27;
|
||||
__REGISTER f32* var_r7 = J3DUnit01;
|
||||
#endif
|
||||
|
||||
i = -1;
|
||||
@@ -316,8 +316,8 @@ void J3DMtxBuffer::calcWeightEnvelopeMtx() {
|
||||
MTXConcat(*worldMtx, *invMtx, mtx);
|
||||
#else
|
||||
// Fakematch? Doesn't match if worldMtx and invMtx are used directly.
|
||||
register void* var_r5 = worldMtx;
|
||||
register void* var_r6 = invMtx;
|
||||
__REGISTER void* var_r5 = worldMtx;
|
||||
__REGISTER void* var_r6 = invMtx;
|
||||
asm {
|
||||
psq_l var_f2, 0x0(var_r6), 0, 0 /* qr0 */
|
||||
psq_l var_f1, 0x0(var_r5), 0, 0 /* qr0 */
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
#include "JSystem/JMath/JMATrigonometric.h"
|
||||
#include "JSystem/JMath/JMath.h"
|
||||
|
||||
void __MTGQR7(register u32 v) {
|
||||
void __MTGQR7(__REGISTER u32 v) {
|
||||
#ifdef __MWERKS__
|
||||
// clang-format off
|
||||
asm {
|
||||
@@ -23,8 +23,8 @@ void J3DGQRSetup7(u32 r0, u32 r1, u32 r2, u32 r3) {
|
||||
|
||||
// this uses a non-standard sqrtf, not sure why or how its supposed to be setup
|
||||
#if !PLATFORM_SHIELD
|
||||
inline f32 J3D_sqrtf(register f32 x) {
|
||||
register f32 recip;
|
||||
inline f32 J3D_sqrtf(__REGISTER f32 x) {
|
||||
__REGISTER f32 recip;
|
||||
|
||||
if (x > 0.0f) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
@@ -38,7 +38,7 @@ inline f32 J3D_sqrtf(register f32 x) {
|
||||
#define J3D_sqrtf sqrtf
|
||||
#endif
|
||||
|
||||
void J3DCalcBBoardMtx(register Mtx mtx) {
|
||||
void J3DCalcBBoardMtx(__REGISTER Mtx mtx) {
|
||||
f32 x = (mtx[0][0] * mtx[0][0]) + (mtx[1][0] * mtx[1][0]) + (mtx[2][0] * mtx[2][0]);
|
||||
f32 y = (mtx[0][1] * mtx[0][1]) + (mtx[1][1] * mtx[1][1]) + (mtx[2][1] * mtx[2][1]);
|
||||
f32 z = (mtx[0][2] * mtx[0][2]) + (mtx[1][2] * mtx[1][2]) + (mtx[2][2] * mtx[2][2]);
|
||||
@@ -53,7 +53,7 @@ void J3DCalcBBoardMtx(register Mtx mtx) {
|
||||
z = J3D_sqrtf(z);
|
||||
}
|
||||
|
||||
register f32 zero = 0.0f;
|
||||
__REGISTER f32 zero = 0.0f;
|
||||
// zero out gaps of zeroes
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
@@ -101,7 +101,7 @@ void J3DCalcYBBoardMtx(Mtx mtx) {
|
||||
mtx[2][2] = vec.z * z;
|
||||
}
|
||||
|
||||
asm void J3DPSCalcInverseTranspose(register Mtx src, register Mtx33 dst) {
|
||||
asm void J3DPSCalcInverseTranspose(__REGISTER Mtx src, __REGISTER Mtx33 dst) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
psq_l f0, 0(src), 1, 0
|
||||
psq_l f1, 4(src), 0, 0
|
||||
@@ -290,7 +290,7 @@ void J3DGetTextureMtxMayaOld(const J3DTextureSRTInfo& srt, Mtx dst) {
|
||||
dst[2][2] = 1.0f;
|
||||
}
|
||||
|
||||
asm void J3DScaleNrmMtx(register Mtx mtx, const register Vec& scl) {
|
||||
asm void J3DScaleNrmMtx(__REGISTER Mtx mtx, const __REGISTER Vec& scl) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
nofralloc;
|
||||
|
||||
@@ -326,7 +326,7 @@ asm void J3DScaleNrmMtx(register Mtx mtx, const register Vec& scl) {
|
||||
#endif // clang-format on
|
||||
}
|
||||
|
||||
asm void J3DScaleNrmMtx33(register Mtx33 mtx, const register Vec& scale) {
|
||||
asm void J3DScaleNrmMtx33(__REGISTER Mtx33 mtx, const __REGISTER Vec& scale) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
psq_l f0, 0(mtx), 0, 0
|
||||
psq_l f6, 0(scale), 0, 0
|
||||
@@ -352,7 +352,7 @@ asm void J3DScaleNrmMtx33(register Mtx33 mtx, const register Vec& scale) {
|
||||
#endif // clang-format on
|
||||
}
|
||||
|
||||
asm void J3DMtxProjConcat(register Mtx mtx1, register Mtx mtx2, register Mtx dst) {
|
||||
asm void J3DMtxProjConcat(__REGISTER Mtx mtx1, __REGISTER Mtx mtx2, __REGISTER Mtx dst) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
psq_l f2, 0(mtx1), 0, 0
|
||||
psq_l f3, 8(mtx1), 0, 0
|
||||
|
||||
+15
-15
@@ -19,10 +19,10 @@ void JMAEulerToQuat(s16 x, s16 y, s16 z, Quaternion* quat) {
|
||||
quat->z = sinZ * (cosX * cosY) - cosZ * (sinX * sinY);
|
||||
}
|
||||
|
||||
void JMAQuatLerp(register const Quaternion* p, register const Quaternion* q, f32 t,
|
||||
void JMAQuatLerp(__REGISTER const Quaternion* p, __REGISTER const Quaternion* q, f32 t,
|
||||
Quaternion* dst) {
|
||||
register f32 pxy, pzw, qxy, qzw;
|
||||
register f32 dp;
|
||||
__REGISTER f32 pxy, pzw, qxy, qzw;
|
||||
__REGISTER f32 dp;
|
||||
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
// compute dot product
|
||||
@@ -52,8 +52,8 @@ void JMAQuatLerp(register const Quaternion* p, register const Quaternion* q, f32
|
||||
}
|
||||
}
|
||||
|
||||
void JMAFastVECNormalize(register const Vec* src, register Vec* dst) {
|
||||
register f32 vxy, rxy, vz, length;
|
||||
void JMAFastVECNormalize(__REGISTER const Vec* src, __REGISTER Vec* dst) {
|
||||
__REGISTER f32 vxy, rxy, vz, length;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
psq_l vxy, 0(src), 0, 0
|
||||
@@ -70,11 +70,11 @@ void JMAFastVECNormalize(register const Vec* src, register Vec* dst) {
|
||||
#endif // clang-format on
|
||||
}
|
||||
|
||||
void JMAVECScaleAdd(register const Vec* vec1, register const Vec* vec2, register Vec* dst,
|
||||
register f32 scale) {
|
||||
register f32 v1xy;
|
||||
register f32 v2xy = scale;
|
||||
register f32 rxy, v1z, v2z, rz;
|
||||
void JMAVECScaleAdd(__REGISTER const Vec* vec1, __REGISTER const Vec* vec2, __REGISTER Vec* dst,
|
||||
__REGISTER f32 scale) {
|
||||
__REGISTER f32 v1xy;
|
||||
__REGISTER f32 v2xy = scale;
|
||||
__REGISTER f32 rxy, v1z, v2z, rz;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
psq_l v1xy, 0(vec1), 0, 0
|
||||
@@ -90,11 +90,11 @@ void JMAVECScaleAdd(register const Vec* vec1, register const Vec* vec2, register
|
||||
#endif // clang-format on
|
||||
}
|
||||
|
||||
void JMAMTXApplyScale(register const Mtx src, register Mtx dst, register f32 xScale,
|
||||
register f32 yScale, register f32 zScale) {
|
||||
register f32 scale = yScale;
|
||||
register f32 x, y, z;
|
||||
register f32 normal = 1.0f;
|
||||
void JMAMTXApplyScale(__REGISTER const Mtx src, __REGISTER Mtx dst, __REGISTER f32 xScale,
|
||||
__REGISTER f32 yScale, __REGISTER f32 zScale) {
|
||||
__REGISTER f32 scale = yScale;
|
||||
__REGISTER f32 x, y, z;
|
||||
__REGISTER f32 normal = 1.0f;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
// scale first 2 components
|
||||
|
||||
@@ -106,7 +106,7 @@ static const u32 __constants[] = {
|
||||
0x00000000, 0x00000000, 0x41F00000, 0x00000000, 0x41E00000, 0x00000000,
|
||||
};
|
||||
|
||||
asm u32 __cvt_fp2unsigned(register f64 d)
|
||||
asm u32 __cvt_fp2unsigned(__REGISTER f64 d)
|
||||
{
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
nofralloc
|
||||
|
||||
@@ -90,10 +90,10 @@ DSError TRKInitializeTarget() {
|
||||
#define __dcbi(a, b) asm { dcbi a, b }
|
||||
#define __dcbfASM(a, b) asm { dcbf a, b }
|
||||
|
||||
void TRK__read_aram(register int c, register u32 p2, void* p3) {
|
||||
void TRK__read_aram(__REGISTER int c, __REGISTER u32 p2, void* p3) {
|
||||
u32 err;
|
||||
int i;
|
||||
register int counter;
|
||||
__REGISTER int counter;
|
||||
u16 r;
|
||||
u32 g;
|
||||
u32 x;
|
||||
@@ -131,16 +131,16 @@ void TRK__read_aram(register int c, register u32 p2, void* p3) {
|
||||
}
|
||||
}
|
||||
|
||||
void TRK__write_aram(register int c, register u32 p2, void* p3) {
|
||||
void TRK__write_aram(__REGISTER int c, __REGISTER u32 p2, void* p3) {
|
||||
u8 buff[32] ATTRIBUTE_ALIGN(32);
|
||||
u32 err;
|
||||
register int count = c;
|
||||
register u32 bf;
|
||||
__REGISTER int count = c;
|
||||
__REGISTER u32 bf;
|
||||
u32 uVar1;
|
||||
u32 size;
|
||||
u16 r;
|
||||
register u32 g;
|
||||
register int counter;
|
||||
__REGISTER u32 g;
|
||||
__REGISTER int counter;
|
||||
u32 i;
|
||||
|
||||
if ((size_t)p2 < 0x4000 || p2 + *(u32*)p3 > 0x8000000) {
|
||||
|
||||
+10
-10
@@ -71,12 +71,12 @@ DSError TRKPPCAccessFPRegister(void* srcDestPtr, u32 fpr, BOOL read);
|
||||
DSError TRKPPCAccessSpecialReg(void* value, u32* access_func, BOOL read);
|
||||
static void TRKExceptionHandler(u16);
|
||||
void TRKInterruptHandlerEnableInterrupts(void);
|
||||
void WriteFPSCR(register f64*);
|
||||
void ReadFPSCR(register f64*);
|
||||
void __TRK_set_MSR(register u32 msr);
|
||||
void WriteFPSCR(__REGISTER f64*);
|
||||
void ReadFPSCR(__REGISTER f64*);
|
||||
void __TRK_set_MSR(__REGISTER u32 msr);
|
||||
u32 __TRK_get_MSR();
|
||||
void TRK_ppc_memcpy(register void* dest, register const void* src, register int n,
|
||||
register u32 param_4, register u32 param_5);
|
||||
void TRK_ppc_memcpy(__REGISTER void* dest, __REGISTER const void* src, __REGISTER int n,
|
||||
__REGISTER u32 param_4, __REGISTER u32 param_5);
|
||||
|
||||
void TRKRestoreExtended1Block();
|
||||
void TRKUARTInterruptHandler();
|
||||
@@ -827,7 +827,7 @@ asm u32 __TRK_get_MSR() {
|
||||
// clang-format on
|
||||
}
|
||||
|
||||
asm void __TRK_set_MSR(register u32) {
|
||||
asm void __TRK_set_MSR(__REGISTER u32) {
|
||||
// clang-format off
|
||||
nofralloc
|
||||
mtmsr r3
|
||||
@@ -835,8 +835,8 @@ asm void __TRK_set_MSR(register u32) {
|
||||
// clang-format on
|
||||
}
|
||||
|
||||
static asm void TRK_ppc_memcpy(register void* dest, register const void* src, register int n,
|
||||
register u32 param_4, register u32 param_5) {
|
||||
static asm void TRK_ppc_memcpy(__REGISTER void* dest, __REGISTER const void* src, __REGISTER int n,
|
||||
__REGISTER u32 param_4, __REGISTER u32 param_5) {
|
||||
// clang-format off
|
||||
#define msr r8
|
||||
#define byte r9
|
||||
@@ -1113,7 +1113,7 @@ asm void TRKInterruptHandlerEnableInterrupts(void) {
|
||||
// clang-format on
|
||||
}
|
||||
|
||||
asm void ReadFPSCR(register f64*) {
|
||||
asm void ReadFPSCR(__REGISTER f64*) {
|
||||
// clang-format off
|
||||
nofralloc
|
||||
stwu r1, -0x40(r1)
|
||||
@@ -1128,7 +1128,7 @@ asm void ReadFPSCR(register f64*) {
|
||||
// clang-format on
|
||||
}
|
||||
|
||||
asm void WriteFPSCR(register f64*) {
|
||||
asm void WriteFPSCR(__REGISTER f64*) {
|
||||
// clang-format off
|
||||
nofralloc
|
||||
stwu r1, -0x40(r1)
|
||||
|
||||
@@ -2533,9 +2533,9 @@ void daAlink_c::setRoofHangHandOnSE(cBgS_PolyInfo* unused) {
|
||||
int daAlink_c::checkRoofHangMovePos() {
|
||||
static const s16 offsetAngle[] = {
|
||||
0x0000,
|
||||
0x8000,
|
||||
-0x8000,
|
||||
0x4000,
|
||||
0xC000,
|
||||
-0x4000,
|
||||
};
|
||||
|
||||
if (field_0x2f98 >= 4) {
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user