Commit Graph

1755 Commits

Author SHA1 Message Date
Nick Clifton ce6072b921 bfd:
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
        display the new ARM hard-float/soft-float ABI flags for EABI_VER5
        (elf32_arm_post_process_headers): Add the hard-float/soft-float
        ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.

binutils:
        * readelf.c (decode_ARM_machine_flags): Recognise and display the
        new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
        the code for EABI_VER4 and EABI_VER5 to allow this.

elfcpp:
        * arm.h: New enum for EABI soft- and hard-float flags.

gold:
        * gold.cc (Target_arm::do_adjust_elf_header): Add the
        hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
        in EABI_VER5.

include:
        * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
        (EF_ARM_ABI_FLOAT_HARD): Likewise.

ld/testsuite:
        * ld-arm/eabi-hard-float.s: New test source.
        * ld-arm/eabi-soft-float.s: New test source.
        * ld-arm/eabi-hard-float.d: New test.
        * ld-arm/eabi-soft-float.d: New test.
        * ld-arm/eabi-soft-float-ABI4.d: New test.
        * ld-arm/eabi-soft-float-r.d: New test.
        * ld-arm/arm-elf.xp: Use the new tests.

binutils:
	PR binutils/14779
	* configure.in: Add checks for wchar.h and mbstate_t.
	* config.in: Regenerate.
	* configure: Regenerate.
	* readelf.c: Conditionally include wchar.h.
	(print_symbol): Conditionally use mbstate_t.
2012-10-30 12:44:57 +00:00
Nick Clifton e0ec68e640 * dwarf2.h (DW_AT_APPLE_optimized, DW_AT_APPLE_flags)
(DW_AT_APPLE_isa, DW_AT_APPLE_block)
	(DW_AT_APPLE_major_runtime_vers, DW_AT_APPLE_runtime_class)
	(DW_AT_APPLE_omit_frame_ptr, DW_AT_APPLE_property_name)
	(DW_AT_APPLE_property_getter, DW_AT_APPLE_property_setter)
	(DW_AT_APPLE_property_attribute, DW_AT_APPLE_objc_complete_type)
	(DW_AT_APPLE_property, DW_OP_GNU_entry_value): New macros.
2012-10-26 15:07:21 +00:00
H.J. Lu f28863f1f0 Move disable_target_specific_optimizations to bfd_link_info
include/

	* bfdlink.h (bfd_link_info): Add
	disable_target_specific_optimizations.

ld/

	* ld.h (command_line): Remove
	disable_target_specific_optimizations.
	(RELAXATION_DISABLED_BY_DEFAULT): Removed.
	(RELAXATION_DISABLED_BY_USER): Likewise.
	(RELAXATION_ENABLED): Likewise.
	(DISABLE_RELAXATION): Likewise.
	(ENABLE_RELAXATION): Likewise.

	* ldmain.c (main): Updated.

	* ldmain.h (RELAXATION_DISABLED_BY_DEFAULT): New macro.
	(RELAXATION_DISABLED_BY_USER): Likewise.
	(RELAXATION_ENABLED): Likewise.
	(DISABLE_RELAXATION): Likewise.
	(ENABLE_RELAXATION): Likewise.
2012-10-24 11:09:28 +00:00
Tom Tromey c81a67683f binutils
* readelf.c (get_note_type): Handle NT_SIGINFO, NT_FILE.
	(print_core_note): New function.
	(process_note): Call it.
include/common/elf
	* common.h (NT_SIGINFO, NT_FILE): New defines.
2012-10-23 17:46:44 +00:00
Nathan Sidwell cdc5dd85f1 bfd/
* bfd-in.h (bfd_elf_stack_segment_size): Declare.
	* bfd-in2.h: Rebuilt.
	* elfxx-target.h (elf_backend_stack_align): New.
	(elfNN_bed): Add it.
	* elf-bfd.h (struct elf_backend_data): Add stack_align field.
	* elf.c (bfd_elf_map_sections_to_segments): Pay attention to
	stack_align and stacksize for PT_GNU_STACK segment.
	(assign_file_positions_for_non_load_sections): Set p_memsz for
	PT_GNU_STACK segment.
	(copy_elf_program_header): Copy PT_GNU_STACK size.
	* elflink.c (bfd_elf_stack_segment_size): New function, taken from
	uclinux backends.
	(bfd_elf_size_dynamic_sections): Determine
	PT_GNU_STACK requirements after calling backend.  Pay attention to
	stacksize.
	* elf32-bfin.c (elf32_bfinfdpic_always_size_sections): Call
	bfd_elf_stack_segment_size.
	(elf32_bfinfdpic_modify_program_headers): Delete.
	(elf32_bfingfdpic_copy_private_bfd_data): Don't copy PT_GNU_STACK
	here.
	(elf_backend_stack_align): Override.
	(elf_backend_modify_program_headers): Don't override.
	* elf32-frv.c (frvfdpic_always_size_sections): Call
	bfd_elf_stack_segment_size.
	(elf32_frvfdpic_modify_program_headers): Delete.
	(elf32_frvfdpic_copy_private_bfd_data): Don't copy PT_GNU_STACK
	here.
	(elf_backend_stack_align): Override.
	(elf_backend_modify_program_headers): Don't override.
	* elf32-lm32.c (lm32_elf_always_size_sections): Leave
	PT_GNU_STACK creation to underlying elf support.  Check
	__stacksize here for backwards compatibility, and set it if
	needed.
	(lm32_elf_modify_segment_map): Delete.
	(lm32_elf_modify_program_headers): Delete.
	(elf_backend_stack_align): Override.
	(elf_backend_modify_segment_map): Don't override.
	(elf_backend_modify_program_headers): Don't override.
	* elf32-sh.c (sh_elf_always_size_sections): Call
	bfd_elf_stack_segment_size.
	(sh_elf_modify_program_headers): Delete.
	(sh_elf_copy_private_data): Don't copy PT_GNU_STACK
	here.
	(elf_backend_stack_align): Override.
	(elf_backend_modify_program_headers): Don't override.
	* elf32-tic6x.c (elf32_tic6x_always_size_sections): Call
	bfd_elf_stack_segment_size.
	(elf32_tic6x_modify_program_headers): Delete.
	(elf32_tic6x_copy_private_data): Delete.
	(elf_backend_stack_align): Override.
	(bfd_elf32_bfd_copy_private_bfd_data): Don't override.
	(elf_backend_modify_program_headers): Don't override.

	include/
	* bfdlink.h (struct bfd_link_info): Add stacksize option.

	ld/
	* ld.texinfo (stack-size): New option.
	* emultempl/elf32.em: Add stack-size option.

	ld/testsuite/
	* ld-elf/binutils.exp: Add -z stack-size=0.
	* ld-elf/elf.exp: Add stack-exec and stack-size tests.
	* ld-elf/orphan-region.d: Add stack-size option. Remove xfail.
	* ld-elf/stack-exec.rd: New.
	* ld-elf/stack-size.rd: New.
	* ld-elf/stack.s: New.
	* ld-scripts/empty-aligned.d: Add stack-size option.
	* ld-sh/fdpic-stack-set.d: New.
	* ld-tic6x/shlib-1.rd: Remove __stacksize symbol.
	* ld-tic6x/shlib-1b.rd: Likewise.
	* ld-tic6x/shlib-1r.rd: Likewise.
	* ld-tic6x/shlib-1rb.rd: Likewise.
	* ld-tic6x/shlib-app-1.rd: Likewise.
	* ld-tic6x/shlib-app-1b.rd: Likewise.
	* ld-tic6x/shlib-app-1r.rd: Likewise.
	* ld-tic6x/shlib-app-1rb.rd: Likewise.
	* ld-tic6x/shlib-noindex.rd: Likewise.
	* ld-tic6x/static-app-1.rd: Likewise.
	* ld-tic6x/static-app-1b.rd: Likewise.
	* ld-tic6x/static-app-1r.rd: Likewise.
	* ld-tic6x/static-app-1rb.rd: Likewise.
2012-10-23 09:33:54 +00:00
Alan Modra 3dfe1f6c69 include/
PR ld/14426
	* bfdlink.h (bfd_link_info): Add ignore_hash.
ld/
	PR ld/14426
	* ldlex.h (option_values): Add OPTION_IGNORE_UNRESOLVED_SYMBOL.
	* lexsup.c (parse_args): Likewise.
	(ld_options): Describe --ignore-unresolved-symbol.
	* ldmain.h (add_ignoresym): Declare.
	* ldmain.c (add_ignoresym): New function, extracted from..
	(undefined_symbol): ..here.  Return if the symbol is in ignore_hash.
	(constructor_callback): Don't use global link_info here.
	(reloc_overflow): Likewise.
2012-10-22 13:33:48 +00:00
John David Anglin 6832e38a83 * hppa.h (pa_opcodes): Use "cX" completer instead of "cx" in fstqx
opcodes.  Likewise, use "cM" instead of "cm" in fstqs opcodes.
2012-10-15 00:22:35 +00:00
DJ Delorie 51107c1dd9 merge from gcc 2012-10-10 03:11:22 +00:00
Andreas Krebbel 992d53f5fd 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
	* doc/as.texinfo: Document new option zEC12.
	* doc/c-s390.texi: Likewise.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/s390.exp: Run zEC12 tests.
	* gas/s390/zarch-zEC12.d: New file.
	* gas/s390/zarch-zEC12.s: New file.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-mkopc.c: Support new option zEC12.
	* s390-opc.c: Add new instruction formats.
	* s390-opc.txt: Add new instructions for zEC12.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:32 +00:00
Anthony Green a54a918ff3 Don't abort() when disassembling bad moxie instructions. 2012-09-28 03:53:39 +00:00
Richard Earnshaw 5e99ba945a 2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
bfd/

	* bfd-in2.h: Regenerated.
	* elf64-aarch64.c
	(elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO.
	(elf64_aarch64_reloc_map): Add reloc entry.
	(aarch64_resolve_relocation): Likewise.
	(bfd_elf_aarch64_put_addend): Likewise.
	(aarch64_reloc_got_type): Likewise.
	(elf64_aarch64_final_link_relocate): Likewise.
	(lf64_aarch64_check_relocs): Likewise.
	(elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21
	reloc.
	* libbfd.h: Regenerated.
	* reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc.

	gas/

	* config/tc-aarch64.c
	(reloc_table): Add reloc to table entry.
	(parse_address_main): Add support for #:<reloc_op>:<symbol>.
	(parse_operands): Check for unused reloc.
	(md_apply_fix): New case for reloc.
	(aarch64_force_relocation): Likewise.

	gas/testsuite

	* gas/aarch64/reloc-insn.d
	(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test.
	* gas/aarch64/reloc-insn.s
	(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc.

	include/

	* elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.

	ld/testsuite

	* ld-aarch64/aarch64-elf.exp: New reloc tests.
	* ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test
	failure (lower bound overflow).
	* ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test
	success (lower bound).
	* ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test
	failure (upper bound overflow).
	* ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test
	success (upper bound).
	* ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 16:25:49 +00:00
Cary Coutant 49c06d620d 2012-09-06 Cary Coutant <ccoutant@google.com>
include/
	* dwarf2.def: Edit comment.
2012-09-06 23:08:07 +00:00
H.J. Lu b29ef5d944 Add Intel Itanium Series 9500 support
bfd/

2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>

	* cpu-ia64-opc.c (ins_cnt6a): New function.
	(ext_cnt6a): Ditto.
	(ins_strd5b): Ditto.
	(ext_strd5b): Ditto.
	(elf64_ia64_operands): Add new operand types.

gas/

2012-09-04  Sergey A. Guriev  <sergey.a.guriev@intel.com>

	* config/tc-ia64.c (reg_symbol): Add a new register.
	(indirect_reg): Ditto.
	(pseudo_func): Add new symbolic constants.
	(operand_match): Add new operand types recognition.
	(operand_insn): Add new register recognition.
	(md_begin): Add new register definition.
	(specify_resource): Add new register recognition.

gas/testsuite/

2012-09-04  Sergey A. Guriev  <sergey.a.guriev@intel.com>

	* gas/testsuite/gas/ia64/psn.d: New file.
	* gas/testsuite/gas/ia64/psn.s: New file.
	* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
	* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
	* gas/testsuite/gas/ia64/opc-m.d: Ditto.

include/opcode/

2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>

	* ia64.h (ia64_opnd): Add new operand types.

opcodes/

2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>

	* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
	* ia64-gen.c: Promote completer index type to longlong.
	(irf_operand): Add new register recognition.
	(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
	(lookup_specifier): Add new resource recognition.
	(insert_bit_table_ent): Relax abort condition according to the
	changed completer index type.
	(print_dis_table): Fix printf format for completer index.
	* ia64-ic.tbl: Add a new instruction class.
	* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
	* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
	* ia64-opc.h: Define short names for new operand types.
	* ia64-raw.tbl: Add new RAW resource for DAHR register.
	* ia64-waw.tbl: Add new WAW resource for DAHR register.
	* ia64-asmtab.c: Regenerate.
2012-09-04 13:52:04 +00:00
Walter Lee aafdd9a5fc Add support for constructing pc-relative addresses to the plt, by
adding the necessary assembly operators and relocations.

bfd:
	* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
	* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
	(tilegx_reloc_map): Ditto.
	(reloc_to_create_func): Ditto.
	(tilegx_elf_check_relocs): Ditto.
	(tilegx_elf_gc_sweep_hook): Ditto.
	(tilegx_elf_relocate_section): Ditto.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas:
	* tc-tilegx.c (O_hw0_plt): Define operator.
	(O_hw1_plt): Ditto.
	(O_hw1_last_plt): Ditto.
	(O_hw2_last_plt): Ditto.
	(md_begin): Handle new operators.
	(emit_tilegx_instruction): Ditto.
	(md_apply_fix): Ditto.
	* doc/c-tilegx.texi: Document new operators.

include/elf:
	* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
	(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL	): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
Sriraman Tallam 3883a0743b Patch adds support to allow plugins to map selected subset of sections to unique
segments.


2012-08-24  Sriraman Tallam  <tmsriram@google.com>

	* gold.cc (queue_middle_tasks): Call layout again when unique
	segments for sections is desired.
	* layout.cc (Layout::Layout): Initialize new members.
	(Layout::get_output_section_flags): New function.
	(Layout::choose_output_section): Call get_output_section_flags.
	(Layout::layout): Make output section for mapping to a unique segment.
	(Layout::insert_section_segment_map): New function.
	(Layout::attach_allocated_section_to_segment): Make unique segment for
	output sections marked so.
	(Layout::segment_precedes): Check for unique segments when sorting.
	* layout.h (Layout::Unique_segment_info): New struct.
	(Layout::Section_segment_map): New typedef.
	(Layout::insert_section_segment_map): New function.
	(Layout::get_output_section_flags): New function.
	(Layout::is_unique_segment_for_sections_specified): New function.
	(Layout::set_unique_segment_for_sections_specified): New function.
	(Layout::unique_segment_for_sections_specified_): New member.
	(Layout::section_segment_map_): New member.
	* object.cc (Sized_relobj_file<size, big_endian>::do_layout):
	Rename is_gc_pass_one to is_pass_one.
	Rename is_gc_pass_two to is_pass_two.
	Rename is_gc_or_icf to is_two_pass.
	Check for which pass based on whether symbols data is present.
	Make it two pass when unique segments for sections is desired.
	* output.cc (Output_section::Output_section): Initialize new
	members.
	* output.h (Output_section::is_unique_segment): New function.
	(Output_section::set_is_unique_segment): New function.
	(Output_section::is_unique_segment_): New member.
	(Output_section::extra_segment_flags): New function.
	(Output_section::set_extra_segment_flags): New function.
	(Output_section::extra_segment_flags_): New member.
	(Output_section::segment_alignment): New function.
	(Output_section::set_segment_alignment): New function.
	(Output_section::segment_alignment_): New member.
	(Output_segment::Output_segment): Initialize is_unique_segment_.
	(Output_segment::is_unique_segment): New function.
	(Output_segment::set_is_unique_segment): New function.
	(Output_segment::is_unique_segment_): New member.
	* plugin.cc (allow_unique_segment_for_sections): New function.
	(unique_segment_for_sections): New function.
	(Plugin::load): Add new functions to transfer vector.
	* Makefile.am (plugin_final_layout.readelf.stdout): Add readelf output.
	* Makefile.in: Regenerate.
	* testsuite/plugin_final_layout.sh: Check if unique segment
	functionality works.
	* testsuite/plugin_section_order.c (onload): Check if new interfaces
	are available.
	(allow_unique_segment_for_sections): New global.
	(unique_segment_for_sections): New global.
	(claim_file_hook): Call allow_unique_segment_for_sections.
	(all_symbols_read_hook): Call unique_segment_for_sections.


2012-08-24  Sriraman Tallam  <tmsriram@google.com>

	* plugin-api.h (ld_plugin_allow_unique_segment_for_sections):
	New interface.
	(ld_plugin_unique_segment_for_sections): New interface.
	(LDPT_ALLOW_UNIQUE_SEGMENT_FOR_SECTIONS): New enum val.
	(LDPT_UNIQUE_SEGMENT_FOR_SECTIONS): New enum val.
	(tv_allow_unique_segment_for_sections): New member.
	(tv_unique_segment_for_sections): New member.
2012-08-24 18:35:35 +00:00
Matthew Gretton-Dann c79316b3f1 * gas/config/tc-arm.c (check_obsolete): New function.
(do_rd_rm_rn): Check swp{b} for obsoletion.
	* gas/testsuite/gas/arm/armv8-a-bad.d: New testcase.
	* gas/testsuite/gas/arm/armv8-a-bad.l: Likewise.
	* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
	* gas/testsuite/gas/arm/depr-swp.l: Update for change in expected output.
	* gas/testsuite/gas/arm/depr-swp.s: Add additional test.
	* include/opcode/arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 07:52:49 +00:00
Matthew Gretton-Dann d8ceaef9a6 * bfd/elf32-arm.c (v8): New array.
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
	(elf32_arm_merge_eabi_attributes): Likewise.
	(VFP_VERSION_COUNT): New define.
	* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
	(arm_attr_tag_FP_arch): Likewise.
	(arm_attr_tag_Advanced_SIMD_arch): Likewise.
	* gas/config/tc-arm.h (arm_ext_v8): New variable.
	(fpu_vfp_ext_armv8): Likewise.
	(fpu_neon_ext_armv8): Likewise.
	(fpu_crypto_ext_armv8): Likewise.
	(arm_archs): Add armv8-a.
	(arm_extensions): Add crypto, fp, and simd.
	(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
	(cpu_arch_ver): Add support for ARMv8.
	(aeabi_set_public_sttributes): Likewise.
	* gas/doc/c-arm.texi (ARM Options): Document new architecture and
	extension options for ARMv8.
	* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
	output.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
	* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
	* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
	(MAX_TAG_CPU_ARCH): Update.
	* include/opcode/arm.h (ARM_EXT_V8): New define.
	(FPU_VFP_EXT_ARMV8): Likewise.
	(FPU_NEON_EXT_ARMV8): Likewise.
	(FPU_CRYPTO_EXT_ARMV8): Likewise.
	(ARM_AEXT_V8A): Likewise.
	(FPU_VFP_ARMV8): Likwise.
	(FPU_NEON_ARMV8): Likewise.
	(FPU_CRYPTO_ARMV8): Likewise.
	(FPU_ARCH_VFP_ARMV8): Likewise.
	(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
	(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
	(ARM_ARCH_V8A): Likwise.
	(ARM_ARCH_V8A_FP): Likewise.
	(ARM_ARCH_V8A_SIMD): Likewise.
	(ARM_ARCH_V8A_CRYPTO): Likewise.
	* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
	* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
	output.
	* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
	* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
2012-08-24 07:50:37 +00:00
David S. Miller 85bf7fcf56 Fix sparc opcode encoding for 4-arg crypto instructions.
include/opcode

	* sparc.h (F3F4): New macro.

opcodes

	* sparc-opc.c (4-argument crypto instructions): Fix encoding using
	F3F4 macro.

gas/testsuite

	* gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
2012-08-21 23:00:35 +00:00
Nick Clifton de522be6db Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:48 +00:00
Maciej W. Rozycki 1a2ec5c32f include/opcode/
* mips.h (mips_opcode): Add the exclusions field.
	(OPCODE_IS_MEMBER): Remove macro.
	(cpu_is_member): New inline function.
	(opcode_is_member): Likewise.

	opcodes/
	* micromips-opc.c (micromips_opcodes): Update comment.
	* mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
	instructions for IOCT as appropriate.
	* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
	opcode_is_member.
	* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
	the result of a check for the -Wno-missing-field-initializers
	GCC option.
	* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
	(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
	compilation.
	(mips16-opc.lo): Likewise.
	(micromips-opc.lo): Likewise.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
	* Makefile.in: Regenerate.

	gas/
	* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
	(is_opcode_valid): Remove coprocessor instruction exclusions.
	Replace OPCODE_IS_MEMBER with opcode_is_member.
	(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
	opcode_is_member.
	(macro): Remove coprocessor instruction exclusions.
2012-08-13 14:26:10 +00:00
Sean Keys da73a9fcb7 * elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING
0x000000200
2012-08-02 20:10:10 +00:00
Sean Keys df6b83d911 * m68hc11.h: #define E_M68HC11_NO_BANK_WARNING
0x000000200
2012-08-02 20:08:54 +00:00
Maciej W. Rozycki f4c77298de include/opcode/
* mips.h: Document microMIPS DSP ASE usage.
	(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
	microMIPS DSP ASE support.
	(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
	(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
	(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
	(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
	(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
	(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
	(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.

	gas/
	* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
	(macro) <M_BALIGN>: Update error handling.
	(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
	<'7', '8', '0', '@', '^'>: Likewise.
	(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
	<'9'>: Fix formatting.
	<'0', '@'>: Handle microMIPS.
	<'^'>: New case.

	gas/testsuite/
	* gas/mips/micromips@mips32-dsp.d: New.
	* gas/mips/micromips@mips32-dspr2.d: New.
	* gas/mips/mips32-dsp.d: Remove -mips32r2.
	* gas/mips/mips32-dspr2.d: Likewise.
	* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
	for micromips.  Use run_dump_test_arches to run dsp tests.

	opcodes/
	* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
	(DSP_VOLA): Likewise.
	(D32, D33): Likewise.
	(micromips_opcodes): Add DSP ASE instructions.
	* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
	<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
Sean Keys 49e7643e9a 2012-07-05 Sean Keys <skeys@ipdatasys.com>
* opcode/xgate.h: Changed the format string for mode
        XGATE_OP_DYA_MON.
2012-07-30 21:44:51 +00:00
Nick Clifton 7ae7345dd6 Fix attributation of PR 13135 patch. 2012-07-26 14:05:37 +00:00