Commit Graph

176623 Commits

Author SHA1 Message Date
Rafael Espindola cd2de416eb Run clang-format in a small chunk of code I am about to change.
llvm-svn: 211201
2014-06-18 18:26:53 +00:00
Greg Clayton ce1843bcd6 Add an option for debugserver to propagate its environment to programs it launches using the --forward-env or -F:
% ./debugserver --forward-env localhost:1234 -- /bin/ls
% ./debugserver -F localhost:1234 -- /bin/ls

Also allow new environment variables to be set using the "--env" or "-e":

% ./debugserver --env FOO=1 --env BAR=2 localhost:1234 -- /bin/ls
% ./debugserver -e FOO=1 -e BAR=2 localhost:1234 -- /bin/ls

<rdar://problem/17350654> 

llvm-svn: 211200
2014-06-18 18:26:50 +00:00
Justin Bogner 989574ca99 ProfileData: Fix copy-paste type in RawInstrProfReader
These deleted definitions had the wrong types.

Patch by Alex L!

llvm-svn: 211199
2014-06-18 18:20:44 +00:00
Weiming Zhao 8c89973462 [ARM] [MC] Refactor the constant pool classes
ARMTargetStreamer implements ConstantPool and AssmeblerConstantPools
to keep track of assembler-generated constant pools that are used for
ldr-pseudo.

When implementing ldr-pseudo for AArch64, these two classes can be reused.
So this patch factors them out from ARM target to the general MC lib.

llvm-svn: 211198
2014-06-18 18:17:25 +00:00
Fariborz Jahanian caaa5f55b6 Objective-C. Try to fix the test in buildbot in my last patch.
llvm-svn: 211197
2014-06-18 18:16:37 +00:00
Ed Maste f054c7ed68 ADT: correct typo in comment
llvm-svn: 211196
2014-06-18 18:08:55 +00:00
Fariborz Jahanian 285b6b6585 Objective-C. Attributes on class declarations carry over
to forward class declarations for diagnosis. 
// rdar://16681279

llvm-svn: 211195
2014-06-18 17:58:27 +00:00
Jan Vesely 85f0dbce5c R600: Expand vector fceil
Move fp64 fceil tests to fceil64.ll

v2: rebase

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 211194
2014-06-18 17:57:29 +00:00
Ulrich Weigand ad0cb91ed9 [PowerPC] Simplify and improve loading into TOC register
During an indirect function call sequence on the 64-bit SVR4 ABI,
generate code must load and then restore the TOC register.

This does not use a regular LOAD instruction since the TOC
register r2 is marked as reserved.  Instead, the are two
special instruction patterns:

 let RST = 2, DS = 2 in
 def LDinto_toc: DSForm_1a<58, 0, (outs), (ins g8rc:$reg),
                     "ld 2, 8($reg)", IIC_LdStLD,
                     [(PPCload_toc i64:$reg)]>, isPPC64;
 
 let RST = 2, DS = 10, RA = 1 in
 def LDtoc_restore : DSForm_1a<58, 0, (outs), (ins),
                     "ld 2, 40(1)", IIC_LdStLD,
                     [(PPCtoc_restore)]>, isPPC64;

Note that these not only restrict the destination of the
load to r2, but they also restrict the *source* of the
load to particular address combinations.  The latter is
a problem when we want to support the ELFv2 ABI, since
there the TOC save slot is no longer at 40(1).

This patch replaces those two instructions with a single
instruction pattern that only hard-codes r2 as destination,
but supports generic addresses as source.  This will allow
supporting the ELFv2 ABI, and also helps generate more
efficient code for calls to absolute addresses (allowing
simplification of the ppc64-calls.ll test case).

llvm-svn: 211193
2014-06-18 17:52:49 +00:00
Matt Arsenault d22626f6bb Work around ridiculous warning.
Apparently C++ doesn't really have hex floating point constants.

llvm-svn: 211192
2014-06-18 17:45:58 +00:00
Marshall Clow 2f4bfdecb3 Formatting improvements in the <string_view> synopsis suggested by RSmith. No functionality change.
llvm-svn: 211191
2014-06-18 17:44:04 +00:00
Ulrich Weigand e581920d12 [PowerPC] Add back test case for absolute calls (removed in r211174)
As requested by Hal Finkel, this adds back a test for calls to
a known-constant function pointer value, and verifies that the
64-bit SVR4 indirect function call sequence is used.

llvm-svn: 211190
2014-06-18 17:28:56 +00:00
Hans Wennborg 23d26a3ef7 Make clang-cl accept .lib inputs (PR20065)
Patch by Ehsan Akhgari!

(Tiny tweak by me: renamed PathSegment to LibDir.)

Differential Revision: http://reviews.llvm.org/D4192

llvm-svn: 211189
2014-06-18 17:21:50 +00:00
Arnold Schwaighofer fc308f5c9f Add a triple so that right syntax is choosen on mac osx systems
llvm-svn: 211188
2014-06-18 17:20:49 +00:00
Matt Arsenault 43160e7af2 R600/SI: Add intrinsics for brev instructions
llvm-svn: 211187
2014-06-18 17:13:57 +00:00
Matt Arsenault dbc9aae1fb R600/SI: Prettier operand printing for 64-bit ops.
Copy what is done for 32-bit already so the order is about the same.

llvm-svn: 211186
2014-06-18 17:13:51 +00:00
Matheus Almeida 784f797d4c [mips] SYNC $stype instruction was added in Mips32
but SYNC with an implied operand ($stype = 0) is valid since Mips2.

llvm-svn: 211185
2014-06-18 17:10:30 +00:00
Rafael Espindola 24d8b84838 Fix a memory leak in the error path.
llvm-svn: 211184
2014-06-18 17:07:15 +00:00
Matt Arsenault 4601093267 R600: Implement f64 ftrunc, ffloor and fceil.
CI has instructions for these, so this fixes them for older hardware.

llvm-svn: 211183
2014-06-18 17:05:30 +00:00
Matt Arsenault e8208ec95b R600: Custom lower f64 frint for pre-CI
llvm-svn: 211182
2014-06-18 17:05:26 +00:00
Matt Arsenault 7aeb813b2a R600/SI: Temporary fix for f64 fneg
This should be a source modifier, but this unblocks
most of my math patches.

llvm-svn: 211181
2014-06-18 17:05:22 +00:00
Matt Arsenault 520e7c44c1 R600/SI: Comparisons set vcc.
llvm-svn: 211178
2014-06-18 16:53:48 +00:00
Saleem Abdulrasool df903939c9 Driver: correct the backend option spelling
The backend option does not have an '-enable' prefix.

llvm-svn: 211177
2014-06-18 16:52:24 +00:00
Adam Nemet efd0785d82 [X86] AVX512: Add non-temporal stores
Note that I followed the AVX2 convention here and didn't add LLVM intrinsics
for stores.  These can be generated with the nontemporal hint on LLVM IR
stores (see new test). The GCC builtins are lowered directly into nontemporal
stores.

<rdar://problem/17082571>

llvm-svn: 211176
2014-06-18 16:51:10 +00:00
Adam Nemet ded81a810c [X86] AVX512: Specify compressed displacement for vmovntdqa
Use the max 64-bit element size with EVEX_CD8.  This should work since element
size is ignored for a full-vector access (FVM).

llvm-svn: 211175
2014-06-18 16:51:07 +00:00