mirror of
https://github.com/encounter/decomp-permuter.git
synced 2026-07-10 03:18:46 -07:00
Add arch settings for ARM32 (#127)
This commit is contained in:
abaresk
@@ -8,9 +8,7 @@ The modes can also be combined, by using the `PERM_RANDOMIZE` macro.
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[<img src="https://asciinema.org/a/232846.svg" height="300">](https://asciinema.org/a/232846)
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The main target for the tool is MIPS code compiled by old compilers (IDO, possibly GCC).
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Getting it to work on other architectures shouldn't be too hard, however.
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https://github.com/laqieer/decomp-permuter-arm has an ARM port.
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This tool supports MIPS (compiled by IDO, possibly GCC), PowerPC, and ARM32 assembly.
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## Usage
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@@ -0,0 +1,19 @@
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#!/bin/bash
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### NOTE: Ensure that `arm-none-eabi-objdump` is in your environment PATH var.
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### Set this to the root of your decomp project repository.
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WORKING_DIR="/home/user/pokeheartgold"
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### Set this to the relative path of the C compiler in your repo.
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CC="tools/mwccarm/2.0/sp2p2/mwccarm.exe"
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C_NAME="$1"
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O_NAME="$3"
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pushd $WORKING_DIR
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### Change any compile flags here, and remove wine if you are using windows ofc.
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wine $CC -O4,p -enum int -lang c99 -Cpp_exceptions off -gccext,on -proc arm946e -msgstyle gcc -gccinc -i ./include -ipa file -interworking -inline on,noauto -char signed -gccdep -MD -c -o $O_NAME $C_NAME
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popd
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+124
-54
@@ -40,6 +40,7 @@ class ArchSettings:
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re_reg: Pattern[str]
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re_sprel: Pattern[str]
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re_includes_sp: Pattern[str]
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sp_ref_insns: List[str]
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reloc_str: str
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branch_instructions: Set[str]
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forbidden: Set[str] = field(default_factory=lambda: set(string.ascii_letters + "_"))
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@@ -100,6 +101,34 @@ PPC_BRANCH_INSTRUCTIONS = {
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PPC_BRANCH_LIKELY_INSTRUCTIONS: Set[str] = set()
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ARM32_PREFIXES = {"b", "bl"}
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ARM32_CONDS = {
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"",
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"eq",
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"ne",
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"cs",
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"cc",
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"mi",
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"pl",
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"vs",
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"vc",
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"hi",
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"ls",
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"ge",
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"lt",
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"gt",
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"le",
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"al",
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}
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ARM32_SUFFIXES = {"", ".n", ".w"}
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ARM32_BRANCH_INSTRUCTIONS = {
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f"{prefix}{cond}{suffix}"
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for prefix in ARM32_PREFIXES
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for cond in ARM32_CONDS
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for suffix in ARM32_SUFFIXES
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}
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MIPS_SETTINGS: ArchSettings = ArchSettings(
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name="mips",
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re_comment=re.compile(r"<.*?>"),
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@@ -108,6 +137,7 @@ MIPS_SETTINGS: ArchSettings = ArchSettings(
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),
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re_sprel=re.compile(r"(?<=,)([0-9]+|0x[0-9a-f]+)\((sp|s8)\)"),
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re_includes_sp=re.compile(r"\b(sp|s8)\b"),
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sp_ref_insns=["addiu"],
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reloc_str="R_MIPS_",
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objdump=["mips-linux-gnu-objdump", "-drz", "-m", "mips:4300"],
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branch_likely_instructions=MIPS_BRANCH_LIKELY_INSTRUCTIONS,
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@@ -118,6 +148,7 @@ MIPS_SETTINGS: ArchSettings = ArchSettings(
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PPC_SETTINGS: ArchSettings = ArchSettings(
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name="ppc",
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re_includes_sp=re.compile(r"\b(r1)\b"),
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sp_ref_insns=[],
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re_comment=re.compile(r"(<.*>|//.*$)"),
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re_reg=re.compile(r"\$?\b([rf][0-9]+)\b"),
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re_sprel=re.compile(r"(?<=,)(-?[0-9]+|-?0x[0-9a-f]+)\(r1\)"),
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@@ -128,6 +159,27 @@ PPC_SETTINGS: ArchSettings = ArchSettings(
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)
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ARM32_SETTINGS: ArchSettings = ArchSettings(
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name="arm32",
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re_includes_sp=re.compile(r"\b(sp)\b"),
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sp_ref_insns=["add", "sub"],
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re_comment=re.compile(r"(<.*>|//.*$)"),
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# Includes:
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# - General purpose registers: r0..13
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# - Frame pointer registers: lr (r14), pc (r15)
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# - VFP/NEON registers: s0..31, d0..31, q0..15, fpscr, fpexc, fpsid
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# SP should not be in this list.
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re_reg=re.compile(
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r"\$?\b([rq][0-9]|[rq]1[0-5]|pc|lr|[ds][12]?[0-9]|[ds]3[01]|fp(scr|exc|sid))\b"
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),
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re_sprel=re.compile(r"sp, #-?(0x[0-9a-fA-F]+|[0-9]+)\b"),
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reloc_str="R_ARM_",
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objdump=["arm-none-eabi-objdump", "-drz"],
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branch_instructions=ARM32_BRANCH_INSTRUCTIONS,
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branch_likely_instructions=set(),
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)
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def get_arch(o_file: str) -> ArchSettings:
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# https://refspecs.linuxfoundation.org/elf/gabi4+/ch4.eheader.html
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with open(o_file, "rb") as f:
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@@ -140,7 +192,8 @@ def get_arch(o_file: str) -> ArchSettings:
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return MIPS_SETTINGS
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if arch == 20:
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return PPC_SETTINGS
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# TODO: support ARM (0x28)
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if arch == 40:
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return ARM32_SETTINGS
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raise Exception("Bad ELF")
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@@ -189,6 +242,67 @@ def pre_process(mnemonic: str, args: str, next_row: Optional[str]) -> Tuple[str,
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return mnemonic, args
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def process_mips_reloc(reloc_row: str, prev: str, repl: str, imm: str) -> str:
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# Sometimes s8 is used as a non-framepointer, but we've already lost
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# the immediate value by pretending it is one. This isn't too bad,
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# since it's rare and applies consistently. But we do need to handle it
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# here to avoid a crash, by pretending that lost imms are zero for
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# relocations.
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if imm != "0" and imm != "imm" and imm != "addr":
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repl += "+" + imm if int(imm, 0) > 0 else imm
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if any(
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reloc in reloc_row
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for reloc in ["R_MIPS_LO16", "R_MIPS_LITERAL", "R_MIPS_GPREL16"]
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):
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repl = f"%lo({repl})"
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elif "R_MIPS_HI16" in reloc_row:
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# Ideally we'd pair up R_MIPS_LO16 and R_MIPS_HI16 to generate a
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# correct addend for each, but objdump doesn't give us the order of
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# the relocations, so we can't find the right LO16. :(
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repl = f"%hi({repl})"
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else:
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assert "R_MIPS_26" in reloc_row, f"unknown relocation type '{reloc_row}'"
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return repl
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def process_ppc_reloc(reloc_row: str, prev: str, repl: str) -> str:
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assert any(
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r in reloc_row for r in ["R_PPC_REL24", "R_PPC_ADDR16", "R_PPC_EMB_SDA21"]
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), f"unknown relocation type '{reloc_row}' for line '{prev}'"
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if "R_PPC_REL24" in reloc_row:
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# function calls
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return repl
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elif "R_PPC_ADDR16_HI" in reloc_row:
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# absolute hi of addr
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return f"{repl}@h"
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elif "R_PPC_ADDR16_HA" in reloc_row:
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# adjusted hi of addr
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return f"{repl}@ha"
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elif "R_PPC_ADDR16_LO" in reloc_row:
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# lo of addr
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return f"{repl}@l"
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elif "R_PPC_ADDR16" in reloc_row:
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# 16-bit absolute addr
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if "+0x7" in repl:
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# remove the very large addends as they are an artifact of (label-_SDA(2)_BASE_)
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# computations and are unimportant in a diff setting.
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if int(repl.split("+")[1], 16) > 0x70000000:
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return repl.split("+")[0]
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elif "R_PPC_EMB_SDA21" in reloc_row:
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# sda21 relocations; r2/r13 --> 0 swaps are performed in an earlier processing step
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return f"{repl}@sda21"
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return repl
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def process_arm32_reloc(reloc_row: str, prev: str, repl: str) -> str:
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assert any(
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r in reloc_row for r in ["R_ARM_THM_CALL", "R_ARM_CALL", "R_ARM_ABS32"]
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), f"unknown relocation type '{reloc_row}' for line '{prev}'"
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return repl
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def process_reloc(reloc_row: str, prev: str) -> Optional[str]:
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if prev == "<skipped>":
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return None
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@@ -201,60 +315,16 @@ def process_reloc(reloc_row: str, prev: str) -> Optional[str]:
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assert ign_branch_targets
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return None
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if "R_PPC_" in reloc_row:
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assert any(
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r in reloc_row for r in ["R_PPC_REL24", "R_PPC_ADDR16", "R_PPC_EMB_SDA21"]
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), f"unknown relocation type '{reloc_row}' for line '{prev}'"
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if "R_PPC_REL24" in reloc_row:
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# function calls
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pass
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elif "R_PPC_ADDR16_HI" in reloc_row:
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# absolute hi of addr
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repl = f"{repl}@h"
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elif "R_PPC_ADDR16_HA" in reloc_row:
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# adjusted hi of addr
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repl = f"{repl}@ha"
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elif "R_PPC_ADDR16_LO" in reloc_row:
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# lo of addr
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repl = f"{repl}@l"
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elif "R_PPC_ADDR16" in reloc_row:
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# 16-bit absolute addr
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if "+0x7" in repl:
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# remove the very large addends as they are an artifact of (label-_SDA(2)_BASE_)
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# computations and are unimportant in a diff setting.
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if int(repl.split("+")[1], 16) > 0x70000000:
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repl = repl.split("+")[0]
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elif "R_PPC_EMB_SDA21" in reloc_row:
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# sda21 relocations; r2/r13 --> 0 swaps are performed in an earlier processing step
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repl = f"{repl}@sda21"
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return before + repl + after
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if "R_MIPS_" in reloc_row:
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# Sometimes s8 is used as a non-framepointer, but we've already lost
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# the immediate value by pretending it is one. This isn't too bad,
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# since it's rare and applies consistently. But we do need to handle it
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# here to avoid a crash, by pretending that lost imms are zero for
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# relocations.
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if imm != "0" and imm != "imm" and imm != "addr":
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repl += "+" + imm if int(imm, 0) > 0 else imm
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if any(
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reloc in reloc_row
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for reloc in ["R_MIPS_LO16", "R_MIPS_LITERAL", "R_MIPS_GPREL16"]
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):
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repl = f"%lo({repl})"
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elif "R_MIPS_HI16" in reloc_row:
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# Ideally we'd pair up R_MIPS_LO16 and R_MIPS_HI16 to generate a
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# correct addend for each, but objdump doesn't give us the order of
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# the relocations, so we can't find the right LO16. :(
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repl = f"%hi({repl})"
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else:
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assert "R_MIPS_26" in reloc_row, f"unknown relocation type '{reloc_row}'"
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return before + repl + after
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new_repl = process_mips_reloc(reloc_row, prev, repl, imm)
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elif "R_PPC_" in reloc_row:
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new_repl = process_ppc_reloc(reloc_row, prev, repl)
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elif "R_ARM_" in reloc_row:
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new_repl = process_arm32_reloc(reloc_row, prev, repl)
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else:
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raise Exception(f"unknown relocation type: {reloc_row}")
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raise Exception(f"unknown relocation type: {reloc_row}")
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return before + new_repl + after
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def simplify_objdump(
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@@ -305,7 +375,7 @@ def simplify_objdump(
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row = re.sub(arch.re_reg, "<reg>", row)
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if not stack_differences:
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if mnemonic == "addiu" and arch.re_includes_sp.search(args):
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if mnemonic in arch.sp_ref_insns and arch.re_includes_sp.search(args):
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row = re.sub(re_int_full, "imm", row)
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if mnemonic in arch.branch_instructions:
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if ign_branch_targets:
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@@ -59,6 +59,10 @@ class Scorer:
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if arch.name == "mips":
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return "." in field
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# Example: ".text+0x34"
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if arch.name == "arm32":
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return "." in field
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return False
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def diff_sameline(old_line: Line, new_line: Line) -> None:
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