Reflect that VMX128 and AltiVec are now enabled by default for the
powerpc-xbox360-pe triple, and that the assembler outputs pe-powerpcbe
format. Remove the now-unnecessary -Mvmx128 and -mvmx128 flags from
the primary usage examples.
Set the GAS output format to "pe-powerpcbe" when the target environment
is PE (TE_PE), so the assembler produces Xbox 360 PE/COFF object files
with the correct IMAGE_FILE_MACHINE_POWERPCBE machine type instead of
XCOFF.
Add bfd_mach_ppc_xenon machine type for the Xbox 360 Xenon CPU. Set
it in the COFF backend when PPCBEMAGIC is detected, so the disassembler
and assembler automatically select the correct instruction set.
The disassembler now defaults to the vmx128 dialect for bfd_mach_ppc_xenon,
so -Mvmx128 is no longer required. The assembler detects TARGET_OS="pe"
and enables PPC + AltiVec + VMX128 by default, so -mvmx128 is no longer
required for the powerpc-xbox360-pe triple.
Add objdump and GAS support for Xbox 360 (Xenon) object files, which
use PE/COFF format with IMAGE_FILE_MACHINE_POWERPCBE (0x01F2). The
format uses little-endian structural headers with big-endian PowerPC
code and data sections.
BFD changes:
- New include/coff/powerpc.h with PPCBEMAGIC and IMAGE_REL_PPC_*
relocation type definitions
- New bfd/coff-ppc-be.c backend with relocation howtos for all 22
PowerPC COFF relocation types
- New bfd/pe-ppc-be.c PE wrapper defining powerpc_pe_be_vec target
- Register PPCBEMAGIC in coffcode.h for arch/magic detection
- Register target in targets.c, config.bfd, configure.ac, Makefile
Opcodes changes:
- Add PPC_OPCODE_VMX128 flag for Xbox 360 VMX128 extension
- Add 89 VMX128 instructions across primary opcodes 4, 5, and 6
- Add VD128/VA128/VB128 operand types with insert/extract functions
for 7-bit scattered register encoding (v0-v127)
- Add vmx128 CPU option to ppc_opts[] and ppc-dis.c
GAS changes:
- Add -mvmx128 command-line option and help text
- Add powerpc-xbox360-pe target to gas/configure.tgt
- Support .machine "vmx128" directive
Tested against Xbox 360 object files with 100% instruction decode rate
and verified assembly round-trip against powerpc-rs reference encodings.
Luke Street