mirror of
https://github.com/encounter/Decrypt9.git
synced 2026-07-10 03:18:50 -07:00
Add arm9loaderhax build
This commit is contained in:
@@ -54,6 +54,8 @@ ifeq ($(EXEC_METHOD),GATEWAY)
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LDFLAGS += --specs=../gateway.specs
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else ifeq ($(EXEC_METHOD),BOOTSTRAP)
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LDFLAGS += --specs=../bootstrap.specs
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else ifeq ($(EXEC_METHOD),A9LH)
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LDFLAGS += --specs=../a9lh.specs
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endif
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LIBS :=
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@@ -108,7 +110,7 @@ export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \
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export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib)
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.PHONY: common clean all gateway bootstrap cakehax cakerop brahma release
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.PHONY: common clean all gateway bootstrap a9lh cakehax cakerop brahma release
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#---------------------------------------------------------------------------------
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all: brahma
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@@ -128,6 +130,10 @@ gateway: common
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bootstrap: common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=BOOTSTRAP
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a9lh: common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=A9LH
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@cp $(OUTPUT).bin $(OUTPUT_D)/arm9loaderhax.bin
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cakehax: submodules common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=GATEWAY
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@make dir_out=$(OUTPUT_D) name=$(TARGET).dat -C CakeHax bigpayload
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@@ -151,6 +157,8 @@ release:
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@make --no-print-directory gateway
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@-make --no-print-directory cakerop
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@rm -fr $(BUILD) $(OUTPUT).bin $(OUTPUT).elf $(CURDIR)/$(LOADER)/data
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@make --no-print-directory a9lh
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@rm -fr $(BUILD) $(OUTPUT).bin $(OUTPUT).elf $(CURDIR)/$(LOADER)/data
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@-make --no-print-directory brahma
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@[ -d $(RELEASE) ] || mkdir -p $(RELEASE)
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@[ -d $(RELEASE)/$(TARGET) ] || mkdir -p $(RELEASE)/$(TARGET)
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@@ -161,6 +169,7 @@ release:
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@-cp $(OUTPUT).nds $(RELEASE)
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@-cp $(OUTPUT).3dsx $(RELEASE)/$(TARGET)
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@-cp $(OUTPUT).smdh $(RELEASE)/$(TARGET)
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@-cp $(OUTPUT_D)/arm9loaderhax.bin $(RELEASE)
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@cp $(CURDIR)/scripts/*.py $(RELEASE)/scripts
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@cp $(CURDIR)/README.md $(RELEASE)
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@-[ ! -n "$(strip $(THEME))" ] || (mkdir $(RELEASE)/$(THEME) && cp $(CURDIR)/resources/$(THEME)/*.bin $(RELEASE)/$(THEME))
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@@ -0,0 +1,130 @@
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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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MEMORY
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{
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ram : ORIGIN = 0x23F00000, LENGTH = 128K
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}
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SECTIONS
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{
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.init :
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{
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__text_start = . ;
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KEEP (*(.init))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.plt : { *(.plt) } >ram = 0xff
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.text : /* ALIGN (4): */
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{
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*(.text .stub .text.* .gnu.linkonce.t.*)
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KEEP (*(.text.*personality*))
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/* .gnu.warning sections are handled specially by elf32.em. */
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*(.gnu.warning)
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*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.fini :
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{
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KEEP (*(.fini))
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} >ram =0xff
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__text_end = . ;
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.rodata :
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{
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*(.rodata)
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*all.rodata*(*)
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*(.roda)
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*(.rodata.*)
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*(.gnu.linkonce.r*)
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SORT(CONSTRUCTORS)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ram
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__exidx_start = .;
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.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ram
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__exidx_end = .;
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/* Ensure the __preinit_array_start label is properly aligned. We
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could instead move the label definition inside the section, but
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the linker would then create the section even if it turns out to
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be empty, which isn't pretty. */
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. = ALIGN(32 / 8);
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PROVIDE (__preinit_array_start = .);
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.preinit_array : { KEEP (*(.preinit_array)) } >ram = 0xff
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PROVIDE (__preinit_array_end = .);
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PROVIDE (__init_array_start = .);
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.init_array : { KEEP (*(.init_array)) } >ram = 0xff
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PROVIDE (__init_array_end = .);
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PROVIDE (__fini_array_start = .);
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.fini_array : { KEEP (*(.fini_array)) } >ram = 0xff
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PROVIDE (__fini_array_end = .);
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.ctors :
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{
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/* gcc uses crtbegin.o to find the start of the constructors, so
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we make sure it is first. Because this is a wildcard, it
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doesn't matter if the user does not actually link against
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crtbegin.o; the linker won't look for a file to match a
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wildcard. The wildcard also means that it doesn't matter which
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directory crtbegin.o is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.dtors :
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{
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.eh_frame :
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{
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KEEP (*(.eh_frame))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.gcc_except_table :
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{
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*(.gcc_except_table)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >ram = 0xff
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.jcr : { KEEP (*(.jcr)) } >ram = 0
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.got : { *(.got.plt) *(.got) } >ram = 0
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.data ALIGN(4) : {
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__data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d*)
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CONSTRUCTORS
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. = ALIGN(4);
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__data_end = ABSOLUTE(.) ;
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} >ram = 0xff
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.bss ALIGN(4) :
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{
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__bss_start = ABSOLUTE(.);
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__bss_start__ = ABSOLUTE(.);
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*(.dynbss)
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*(.gnu.linkonce.b*)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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__bss_end__ = ABSOLUTE(.);
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__end__ = ABSOLUTE(.);
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} >ram
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.stack 0x80000 : { _stack = .; *(.stack) }
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}
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@@ -0,0 +1,5 @@
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%rename link old_link
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*link:
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%(old_link) -T ../a9lh.ld%s
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@@ -0,0 +1,93 @@
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#ifdef EXEC_A9LH
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.section ".init"
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.global _start
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.extern main
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.align 4
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.arm
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#define SIZE_32KB 0b01110
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#define SIZE_128KB 0b10000
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#define SIZE_512KB 0b10010
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#define SIZE_2MB 0b10100
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#define SIZE_128MB 0b11010
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#define SIZE_256MB 0b11011
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#define SIZE_4GB 0b11111
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@ Makes a MPU partition value
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#define MAKE_PARTITION(offset, size_enum) \
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(((offset) >> 12 << 12) | ((size_enum) << 1) | 1)
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_start:
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b _init
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_mpu_partition_table:
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.word MAKE_PARTITION(0x00000000, SIZE_4GB) @ 0: Background region
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.word MAKE_PARTITION(0x00000000, SIZE_128MB) @ 1: Instruction TCM (mirrored every 32KB)
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.word MAKE_PARTITION(0x08000000, SIZE_2MB) @ 2: ARM9 internal memory
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.word MAKE_PARTITION(0x10000000, SIZE_128MB) @ 3: IO region
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.word MAKE_PARTITION(0x18000000, SIZE_128MB) @ 4: external device memory
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.word MAKE_PARTITION(0x1FF80000, SIZE_512KB) @ 5: AXI WRAM
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.word MAKE_PARTITION(0x20000000, SIZE_256MB) @ 6: FCRAM
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.word 0 @ 7: Unused
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_populate_mpu:
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push {r4-r5, lr}
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ldr r4, =_mpu_partition_table
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ldr r5, [r4, #0x0] @ mmu_partition_table[0] load
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mcr p15, 0, r5, c6, c0, 0 @ mmu_partition_table[0] write
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ldr r5, [r4, #0x4]
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mcr p15, 0, r5, c6, c1, 0
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ldr r5, [r4, #0x8]
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mcr p15, 0, r5, c6, c2, 0
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ldr r5, [r4, #0xC]
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mcr p15, 0, r5, c6, c3, 0
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ldr r5, [r4, #0x10]
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mcr p15, 0, r5, c6, c4, 0
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ldr r5, [r4, #0x14]
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mcr p15, 0, r5, c6, c5, 0
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ldr r5, [r4, #0x18]
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mcr p15, 0, r5, c6, c6, 0
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ldr r5, [r4, #0x1C]
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mcr p15, 0, r5, c6, c7, 0
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@ Give read/write access to all the memory regions
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ldr r5, =0x03333333
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mcr p15, 0, r5, c5, c0, 2 @ data access
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ldr r5, =0x03300330
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mcr p15, 0, r5, c5, c0, 3 @ instruction access
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mov r5, #0x66
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mcr p15, 0, r5, c2, c0, 0 @ data cachable
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mcr p15, 0, r5, c2, c0, 1 @ instruction cachable
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mov r5, #0x10
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mcr p15, 0, r5, c3, c0, 0 @ data bufferable
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pop {r4-r5, pc}
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_enable_caches:
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push {r4-r5, lr}
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bl _populate_mpu
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mov r5, #0
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mcr p15, 0, r5, c7, c5, 0 @ flush I-cache
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mcr p15, 0, r5, c7, c6, 0 @ flush D-cache
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mrc p15, 0, r4, c1, c0, 0
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orr r4, r4, #(1<<12) @ instruction cache enable
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orr r4, r4, #(1<<2) @ data cache enable
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orr r4, r4, #(1<<0) @ mpu enable
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mcr p15, 0, r4, c1, c0, 0
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pop {r4-r5, pc}
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_init:
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push {r0-r12, lr}
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bl _enable_caches
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bl main
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#endif // EXEC_A9LH
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+1
-1
@@ -35,7 +35,7 @@
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#define DBG_N_CHARS_Y ((DBG_END_Y - DBG_START_Y) / DBG_STEP_Y)
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#define DBG_N_CHARS_X (((DBG_END_X - DBG_START_X) / 8) + 1)
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#ifdef EXEC_GATEWAY
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#if defined(EXEC_GATEWAY) || defined(EXEC_A9LH)
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#define TOP_SCREEN0 (u8*)(*(u32*)((uint32_t)0x080FFFC0 + 4 * (*(u32*)0x080FFFD8 & 1)))
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#define BOT_SCREEN0 (u8*)(*(u32*)((uint32_t)0x080FFFD0 + 4 * (*(u32*)0x080FFFDC & 1)))
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#define TOP_SCREEN1 TOP_SCREEN0
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+1
-1
@@ -9,7 +9,7 @@ static DIR dir;
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bool InitFS()
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{
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#ifndef EXEC_GATEWAY
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#ifdef EXEC_BOOTSTRAP
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// TODO: Magic?
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*(u32*)0x10000020 = 0;
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*(u32*)0x10000020 = 0x340;
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