Commit Graph

52 Commits

Author SHA1 Message Date
Manuel Argüelles
5dad944351 drivers: memc: add NXP S32 QSPI controller
The NXP S32 QSPI controller acts as an interface to up to two serial
flash memory devices, each with up to eight bidirectional data lines,
depending on the platform. It is based on a LUT enginee to interface
through commands with different memory types including flash NOR and
Hyperram.

This patch adds support for the QSPI in S32K344 which supports a single
memory device (side A) with up to four bidirectional data lines and SDR
only. Nevertheless, the memory controller is implemented flexible enough
to be extended to support more feature-rich QSPI blocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-07-26 09:44:14 +02:00
Jeppe Odgaard
cd59e74412 drivers: memc: add update clock function
Add a function to update the flexspi bus clock. This is
needed when write operations are done to the hyperflash.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2023-05-22 10:15:03 +02:00
Gerard Marull-Paretas
989d103d53 drivers: all: mcux: remove conditional support for pinctrl
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Yves Vandervennet
788ba12137 nxp: hal: code update to reflect changes in SDK 2.13
HAL API changes in ethernet and pwm
SoC RT595 power management code change
west.yml update

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2023-04-20 08:11:19 -05:00
Franciszek Zdobylak
71a6c22731 drivers: memc: implement sifive ddr mem controller
Implementation for DDR memory controller for FU740 SoC.

Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
2023-04-12 13:05:55 +02:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Henrik Brix Andersen
c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Gerson Fernando Budke
033c7eddec drivers: memc: sam: Update to use clock control
This update Atmel SAM SMC driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Declan Snyder
109e03eb4e drivers: memc: fix flexspi init priorities
Fix flexspi memc drivers init priorities

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-03-10 13:10:30 -06:00
Declan Snyder
e72d1bf970 drivers: memc: flexspi: Update init priority
Update flexspi driver init priority to be the
memc driver init priority. This fixes a bug where
the flexspi flash drivers on i.MX RT platforms were
being initialized before the flexspi memc driver.
Since those flash drivers depend on the flexspi
spi bus controller being initialized, the flash drivers
would fail to initialize and cause runtime failures.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-03-07 08:32:48 +01:00
Daniel DeGrasse
5455c556f1 drivers: memc_mcux_flexspi: enable configuring AHB RX buffer allocation
Allow configuration of AHB RX buffer allocation. This allows sections
of the AHB RX buffer to be reserved for specific masters, which can
enhance performance.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-04 09:19:26 +01:00
Daniel DeGrasse
47271ce8be treewide: update usage of zephyr_code_relocate
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:

zephyr_code_relocate(file location)

The new API for zephyr_code_relocate uses the following directive:

zephyr_code_relocate(FILES file LOCATION location)

update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-17 18:08:37 +01:00
Mahesh Mahadevan
db7dedaead drivers: memc: Add device PM to MCUX Flexspi driver
Add Device level power manangement support to the
MCUX FlexSPI driver.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-01-04 11:03:42 -06:00
Daniel DeGrasse
64a14a8c1c drivers: memc: introduce driver for APS6408L PSRAM
Introduce driver for APS6408L PSRAM, built on top of the MCUX memc
driver for flexSPI. This driver supports operating the PSRAM in high
speed mode (200MHz or more). Note that in order to support this
PSRAM's alignment requirements, either ahb-read-addr-opt or
ahb-prefetch must be set for the FlexSPI instance.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-04 10:35:25 +01:00
Daniel DeGrasse
41acdc1078 drivers: memc: fix XIP active logic for RT6xx/RT5xx
memc driver was setup to always assume the flexSPI would be in XIP mode,
and skip init. This is only true for the active flexSPI, which is
typically FlexSPI1. Fix this check to only skip init for FlexSPI1

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-04 10:35:25 +01:00
Daniel DeGrasse
0aba1a80b1 drivers: memc: rename flexspi-hyperram driver to flexspi-s27ks0641
Rename flexspi-hyperram driver to flexspi-s27ks0641, and update
function names. This driver is only capable of supporting the
s27ks0641 HyperRAM chip, as the lookup table given in this driver
is specific to the s27ks0641.

Rename the flexspi-hyperram binding to reflect this, to
prevent confusion from users.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-04 10:35:25 +01:00
Daniel DeGrasse
a5994dbd1a drivers: memc: don't relocate MEMC functions unless CONFIG_FLASH=y
Only relocate memc driver when CONFIG_FLASH=y.
CONFIG_FLASH_MCUX_FLEXSPI_XIP previously was dependent on
CONFIG_FLASH, but the scope of this Kconfig has changed.

Due to this, the memc driver now must have two checks, as it should not
relocated when the driver is being used for a memory controller that does
not expose the flash driver interface.

Since the NXP HAL also relocates the underlying FlexSPI driver
using a similar check, it is updated in this commit as well.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-03 12:20:39 -06:00
Gerard Marull-Paretas
b1a0d0ae86 include: add missing zephyr/kernel.h
Some files were using the Kernel APIs/types without including
zephyr/kernel.h.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-20 22:52:09 +09:00
Pieter De Gendt
e328c2bb7d drivers: memc: Introduce Atmel SAM SMC/EBI driver
Add a driver to support external memory connected to the SMC port
for Atmel SAM devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Henrik Brix Andersen
9c626a07d4 drivers: memc: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Pieter De Gendt
bef0010e69 drivers: memc: mcux_flexspi: Always try to apply pinctrl state
This commit fixes an issue introduced in 5ee9392 where FlexSPI
pinctrl states where applied based on the SoC type.
However multiple FlexSPI instances can be active, some of which
are not pre-configured from ROM.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-01 18:03:10 +02:00
Kumar Gala
b2dacedbe8 drivers: memc: Update drivers to use devicetree Kconfig symbol
Update memc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.

We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-25 15:14:08 +02:00
Pieter De Gendt
850cdc9196 drivers: memc: mcux_flexspi_hyperram: Fix multiple log module definition
Enabling the FlexSPI HyperRAM results in a build error, due to a logging
module re-definition. Fixed by changing the log module name.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-07-12 09:54:07 +02:00
Chay Guo
a4c9e13ea8 boards: arm: Enable flash for storage on mimxrt595_evk
- The MX25UM51345G flash is connected to FLEXSPI PortA for
  mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.

Signed-off-by: Chay Guo <changyi.guo@nxp.com>
2022-06-13 12:10:57 +02:00
Daniel DeGrasse
5ee93929b9 drivers: memc: don't check pin control return code
Some SOCs, such as the RT1064 and RT1024, use internal flash and don't
define pinmux settings for the flexspi. Don't check the return code of
pinctrl_apply_state, because the flexspi driver will fail to initialize
when the pin mux settings are simply not required.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-09 08:54:30 -05:00