Commit Graph

160 Commits

Author SHA1 Message Date
Tristan Honscheid
8fd1ce7579 emul: Only add enabled DT nodes to bus emulators
The eSPI, I2C, and SPI emulators use devicetree macros to build an array
of devices on the virtual bus. Currently, they will add device nodes that
are not status-okay. This leads to linker errors because the respective
device drivers would not have instantiated device structs for these
nodes --assuming the driver was even compiled. This can be frustrating
if nodes need to be disabled for debugging or configuration purposes.

Update the bus emulators to only consider status-okay nodes by changing
the macros used to iterate over bus devices.

Signed-off-by: Tristan Honscheid <honscheid@google.com>
2023-07-12 09:25:18 +02:00
Daniel Leung
26ecaba4af drivers: syscalls: use zephyr_syscall_header
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-17 07:57:45 -04:00
Mulin Chao
9da9c90639 intc: miwu: npcx: improve interrupt latency of miwu input events
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-05-17 09:48:54 +02:00
Aaron Massey
3cc74f1140 emul: Make ESPI/I2C_EMUL depend on EMUL
The emulated espi and i2c bus controllers do not depend on CONFIG_EMUL
being enabled. When these fake bus controllers are enabled by their
assoicated compatible in the devicetree without CONFIG_EMUL it results in
linker failures for underlying peripheral emulators which may be difficult
to understand. The SPI config already depends on EMUL.

Make the ESPI and I2C emulated controllers depend on CONFIG_EMUL. Note:
This still allows linker failures if CONFIG_EMUL=n, but the linker failures
will be consistently at device driver instantiation due to a missing bus
controller. Regardless, this will be easier to debug when someone forgets
to enable CONFIG_EMUL.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2023-05-08 16:20:52 +02:00
Jose Alberto Meza
15a1be1c5f drivers: espi: Distinguish mechanism to send regular VW notifications
Add another helper function to send VW notification that is
neither a warning or conveys a system state.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2023-04-28 09:47:13 -05:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Henrik Brix Andersen
c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Jay Vasanth
ff10046382 include: espi.h: Update OCB virtual wires mappings
update espi_vwire_signal enum to refer all platform specific
usage virtual wires to ESPI_VWIRE_SIGNAL_SLV_GPIO_x
Virtual wires used for USB-C port over current (OCB)
have been defined as macros mapped to the corresponding
espi_vwire_signal enum

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-23 11:58:26 -04:00
Jay Vasanth
b0ce525b90 drivers: espi: Microchip MEC172x eSPI VW initialization update
Change device tree VW routing to a form allowing overrides.
Add two new DT optional properties for specifying the reset
source and reset value of each virtual wire. Only virtual
wires that are enabled using the status property are modified.
NOTE: eSPI virtual wires are controlled in groups of 4 by
hardware. The optional reset signal source properties applies
to all four virtual wires in the group. If this field is
changed from the hardware default, it should be changed for
only one virtual wire in the group. If the property exists
in more than one wire in the group it must be set to the
same value.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-23 11:58:26 -04:00
Jay Vasanth
f6619a8688 drivers: espi: Update Microchip MEC172x eSPI virtual wires to use DT
Modify Mircrochip MEC172x eSPI driver to get eSPI virtual wire
hardware routing from device tree.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-23 11:58:26 -04:00
Tristan Honscheid
368f2e729c microchip: espi: Fix bug in dependency on ESPI Kconfig
`Kconfig.xec` for the ESPI drivers requires
DT_HAS_MICROCHIP_XEC_ESPI_SAF_ENABLED and
DT_HAS_MICROCHIP_XEC_ESPI_SAF_V2_ENABLED for ESPI_XEC and ESPI_XEC_V2,
respectively, but SAF is not mandatory for using ESPI. This is a bug and
should be dependent on DT_HAS_MICROCHIP_XEC_ESPI_ENABLED and
DT_HAS_MICROCHIP_XEC_ESPI_ENABLED, respectively. Also make these default
to `y` so they can be automatically enabled by the device tree.

Signed-off-by: Tristan Honscheid <honscheid@google.com>
2023-03-23 08:24:18 +00:00
Aditya Bhutada
7d9da1c687 drivers: espi: espi_mchp_xec: removed redundant state variables
Removed struct variables for storing states: sx, plt_rst, espi_rst.
While Sx & espi_rst state variables were totally redundant, plt_rst
variable had a use-case to prevent sending multiple callbacks to app.
Experimentally proven that use-case was not valid, as plt_rst isr
itself gets called only upon rising/falling edge.
Removing the condition to check plt_rst's current and previous state,
also solves the problem where global reset do not update plt_rst state.

Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
2023-03-09 09:21:43 +01:00
Jun Lin
2e961102c1 driver: Port80: npcx: defer Port80 code sending to workqueue thread
If the host sends Port80 postcodes frequently while EC is busy handling
other tasks, the Port80 FIFO (16-byte depth) might overflow easily,
especially when the host sends the postcode with the 4-byte format.
This change defers the handling and sending (to the upper layer)
postcodes to the system workqueue thread. It can reduce a lot of
(but not all) the overflow case. Also in practice, we usually care
about the latest postcodes. The older codes are not significant to the
developer. This commit also lowers the printing of the overflow warning
to LOG_DEBUG.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2023-02-20 09:43:20 +01:00
Dino Li
a41a4e5e24 espi: it8xxx2: enable espi transaction interrupt
The interrupt is used to wake up EC from low power mode.
So EC does not defer eSPI bus while transaction is accepted.
Fixes EC host commands slow issue.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2023-01-18 09:55:44 +01:00
Dino Li
5bcd47f9b9 espi: it8xxx2: make sure h2ram offset is configured correctly
This change for addressing the below symptoms.
Two FW images have different h2ram offset settings.
Jumping to each other will cause offset setting errors.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2023-01-04 18:41:29 +00:00
Dino Li
02578cb834 it8xxx2/espi: protect clear OBF request
At default, IBF (input buffer full) interrupt status will be cleared
after reading keyboard data input register (KBHIDIR) in ISR.
For request to clear OBF (output buffer full), we need to enable clear
mode. In the mode, IBF status cannot be cleared by reading KBHIDIR
register. It means that if AP output data to 60h/64h port during the
mode enable, IBF interrupt will keep triggering until the watchdog is
reset. This patch addresses this issue.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2023-01-04 18:40:55 +00:00
Fabio Baltieri
551c632ac4 drivers: espi: enable ESPI_EMUL automatically
Enable ESPI_EMUL automatically based on the corresponding devicetree
compatible.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-12-22 11:06:18 +01:00
BJ Chen
108d516397 ITE: drivers/espi: fix the VW valid flag issue in MAFS mode
Add CONFIG_ESPI_SET_VW_VALID_WITH_LEVEL to fix the VW Valid Bits Issue

fixes #52776

Signed-off-by: BJ Chen <bj.chen@ite.com.tw>
2022-12-19 09:44:31 +00:00
Michał Barnaś
94458f88b9 ec_host_cmd: add eSPI peripheral for the host commands
This commit adds the support for host commands being transported
by the eSPI subsystem.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-11-18 10:11:40 +01:00
Tim Lin
0789442132 ITE: soc: chip_chipregs: Access registers using structure method
Access registers using structure method.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-11-09 10:44:29 +01:00
Tim Lin
b3f46ccaec ITE: cleanup: soc: chip_chipregs: Rename the structure name of register
Rename the structure of flash_it8xxx2_regs to smfi_it8xxx2_regs.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-11-09 10:44:29 +01:00
Michał Barnaś
bcd4230d04 espi: auto enable the ESPI SAF XEC based on the device tree
The SAF XEC driver for eSPI was not enabled by default so sample
code for espi was failing. This commit changes the behavior to match
current scheme of enabling the drivers based on the status of required
device tree nodes.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-11-08 20:13:22 +00:00
Dino Li
8665db1dab espi: it8xxx2: reset PLTRST# virtual wire signal during eSPI reset
The PLTRST# virtual wire signal's reset signal is eSPI Reset#.
But it8xxx2 didn't enable the feature by default. This change
will enable the feature at default.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-11-07 09:50:27 +01:00
Jay Vasanth
d0fe965b9f drivers: espi_saf: Add Microchip MEC172x eSPI SAF version 2 driver
Microchip MEC172x has a modified eSPI SAF hardware implementation.
Hardware changes include multiple clock dividers for each SPI
flash device and data transfer using QMSPI local DMA.
espi reset interrupt is made a higer priority in MEC172x devicetree
because espi reset event resets all espi hardware and we don't
to want to service any other espi interrupt blocks when espi reset
occurs.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Jun Lin
82a887c98d driver: eSPI: npcx: support multiple bytes mode for Port80
eSPI PUT_IOWR_SHORT protocol can send 1/2/4 bytes of data in a single
transaction. This allows the host to send max 32-bits Port80 code
at one time. This CL sets bits OFS0_SEL~OFS3_SEL in the DPAR1 register
to let the EC hardware put the full Port80 code to DP80BUF FIFO.
It also groups the N-byte code into a single 32-bits variable when
necessary by analyzing the offset field in the DP80BUF register.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-10-20 15:41:22 +02:00