Commit Graph

15333 Commits

Author SHA1 Message Date
Kevin Wang
3744fe2d49 drivers: mbox: Add Andestech mailbox driver
Support the Andes mailbox driver via software plic.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2023-07-26 10:51:41 +02:00
Johann Fischer
41e9547ead drivers: usb: fix common misspellings in USB drivers
Fix common misspellings in USB drivers.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2023-07-26 10:46:01 +02:00
Jordan Yates
014760234b power_domain: gpio: init with pm_device_driver_init
Startup power domains according to the expected final state given the
power supply and PM device runtime support.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-26 08:16:44 +00:00
Jordan Yates
1ddadaf255 power_domain: gpio: compile without PM_DEVICE_POWER_DOMAIN
Let the driver compile without `PM_DEVICE_POWER_DOMAIN`, in which case
the driver only controls the GPIO, without notifying dependant devices.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-26 08:16:44 +00:00
Jordan Yates
86050556c0 gpio: stellaris: implement gpio_pin_get_config
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-07-26 08:16:44 +00:00
Andrzej Głąbek
927dda06fa drivers: spi_nrfx_spis: Fix obtaining dev pointer in event handler
This is a follow-up to commit 4c20403629.

CONTAINER_OF() cannot be used to obtain the device pointer from its
data pointer as this data is not contained in the device structure.
Instead, use a dedicated member in the device data structure to store
the device pointer.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-26 09:52:24 +02:00
Manuel Argüelles
6d0a876525 drivers: flash: add NXP S32 QSPI flash NOR driver
Add support for flash NOR memory devices on a NXP S32 QSPI bus. The
driver uses a fixed LUT configuration assuming a default standard page
size and erase types, and allows to select between multiple read/program
instructions/modes. It is also possible to read the flash device
characteristics from the device at run-time as long as the memory is
JESD216 compatible, providing more flexibility.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-07-26 09:44:14 +02:00
Manuel Argüelles
5dad944351 drivers: memc: add NXP S32 QSPI controller
The NXP S32 QSPI controller acts as an interface to up to two serial
flash memory devices, each with up to eight bidirectional data lines,
depending on the platform. It is based on a LUT enginee to interface
through commands with different memory types including flash NOR and
Hyperram.

This patch adds support for the QSPI in S32K344 which supports a single
memory device (side A) with up to four bidirectional data lines and SDR
only. Nevertheless, the memory controller is implemented flexible enough
to be extended to support more feature-rich QSPI blocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-07-26 09:44:14 +02:00
Adam Wojasinski
368acbe2d1 drivers: i2c: i2c_nrfx_twim: Utilize memory-region prop from devicetree
This commit aligns TWIM shim to utilize memory-region property.
The memory-region is not required property that enables user
to specify placement of dma buffers in memory region.
It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.

When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-07-26 09:36:31 +02:00
Adam Wojasinski
905a8ae402 drivers: i2c: i2c_nrfx_twim: remove redundant buffer size from config
There are two different i2c node properites `zephyr,flash-buf-max-size`
and `zephyr,concat-buf-size`. In the end max value of that two is used
to define size of the message buffer.
It's redundant to store both values in device config structure.
Changed config structure to contain only bigger value.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-07-26 09:36:31 +02:00
Pavlo Havrylyuk
f4a1d40924 drivers: counter: Add Infineon CAT1 counter driver
Add initial version of Infineon CAT1 counter driver
Add initial version of binding file for Infineon
Add counters to psco6 dtsi
Add external trigger pin that runs counter

Signed-off-by: Pavlo Havrylyuk <pavlo.havrylyuk@infineon.com>
2023-07-26 09:10:31 +02:00
Pieter De Gendt
6758777ddf drivers: crypto: Add NXP MCUX DCP driver
Add a shim driver for NXP's Data Co-Processor (DCP) driver.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-07-26 09:09:48 +02:00
Girisha Dengi
62dbe72cb7 drivers: pm_cpu_ops: Add support for multiple PSCI versions
Each PSCI interface versions have different DT compatible strings
like arm,psci-0.2, arm,psci-1.1 and so on. However, the same driver
can be used for all the versions by adding #define DT_COMPAT for
required version and #undef DT_COMPAT for default version.

Add support for PSCI cold reset, warm reset and cpu-on function IDs.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi
f0ac2347da drivers: serial: Add optional reset line for uart_ns16550
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi
6639756fae drivers: reset: Add reset controller for Intel Agilex5 platform
This is Intel's proprietary IP which controls individual module
reset signals. During each system driver initialization, these
reset signals will be used to bring module out of reset state.

Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Girisha Dengi
2ca6ffcd79 drivers: clock_control: clock driver for Intel Agilex5 platform
This is Intel's proprietary IP which supply the clock for all the
system peripherals. Clock manager is initialized only one time
during boot up by FSBL (ATF BL2) based on external user settings.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Marek Matej
938732c00d drivers: can: fix long lines
Change the line length to comply with the rules.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marek Matej
6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Marc Desvaux
76ba68cd18 drivers: ethernet: stm32 generate_mac
Ethernet MAC addresses are not unique enough
use unique_device_ID full range (96 bits)
call crc32_ieee() to generate last 3 bytes of mac address

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-07-25 16:45:53 +02:00
Markus Fuchs
fbe6ac852f drivers: bluetooth: slz_hci: Fix incoming HCI packet handling
Currently, HCI packet handling does not consider the BT_RECV_CONTEXT
choice selection. It calls bt_recv() and bt_recv_prio() only depending
on the HCI packet type and event flags.
However, for selections other than BT_RECV_BLOCKING, the "HCI driver
shall not call bt_recv_prio()". Fix that by only calling bt_recv_prio()
when CONFIG_BT_RECV_BLOCKING is enabled.

Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
2023-07-25 14:41:13 +02:00
Jordan Yates
d63999af6e Revert "gpio: stellaris: implement gpio_pin_get_config"
This reverts commit c72577d709.
2023-07-25 14:17:11 +02:00
Jordan Yates
f613074283 Revert "power_domain: gpio: compile without PM_DEVICE_POWER_DOMAIN"
This reverts commit 1f1217e832.
2023-07-25 14:17:11 +02:00
Jordan Yates
226f1c5e4b Revert "power_domain: gpio: init with pm_device_driver_init"
This reverts commit 39b2ec57a0.
2023-07-25 14:17:11 +02:00
Andrzej Głąbek
481963489e drivers: wdt_nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00
Andrzej Głąbek
f89ca1164c drivers: sensor: qdec_nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00