Commit Graph

39 Commits

Author SHA1 Message Date
Gerard Marull-Paretas
79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Fabio Baltieri
def230187b test: fix more legacy #include paths
Add a bunch of missing "zephyr/" prefixes to #include statements in
various test and test framework files.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-08-02 16:41:41 +01:00
Yinfang Wang
f6ee9362cd tests: subsys/debug: move coredump_backends to new ztest API
Move test coredump_backends to use new ztest API.

Signed-off-by: Yinfang Wang <yinfang.wang@intel.com>
2022-07-07 22:06:05 -04:00
Lauren Murphy
318e6db239 debug: coredump: add xtensa intel adsp, support toolchains
Adds compatibility with Intel ADSP GDB from Zephyr SDK and
from Cadence toolchain to coredump_gdbserver.py.

Adds CAVS 15-25 (APL) register definitions. Implements
handle_register_single_read_packet to serve ADSP GDB
p packets.

Prevents BSA from changing between stack dump printout
and coredump by taking lock. Observed to be necessary for
accurate results on slower simulated platforms.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-06-23 15:44:45 -04:00
Gerard Marull-Paretas
ade7ccb918 tests: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 20:02:14 +02:00
Carles Cufi
e83a13aabf kconfig: Rename the TEST_EXTRA stack size option to align with the rest
All stack sizes should end with STACK_SIZE.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-02-22 08:23:05 -05:00
Andrzej Puzdrowski
3d0e7553af tests/subsys: CONFIG_TEST_FLASH_DRIVERS=y only for qemu_x86
CONFIG_TEST_FLASH_DRIVERS is dedicated for qemu_x86.
This patch moves it to per board project configuration.

Setting this property for each target will cause build
failures.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2022-02-01 10:46:01 +01:00
Mark Holden
7b2b283677 debug: coredump: allow for coredump backends to be defined outside of tree
Move coredump_backend_api struct to public header so that custom backends
for coredump can be defined out of tree. Create simple backend in test
directory for verification.

Signed-off-by: Mark Holden <mholden@fb.com>
2022-01-11 18:17:24 -05:00
Mark Holden
7803a4e590 arch: riscv: ARCH_EXCEPT macro
Enable ARCH_EXCEPT macro for non-usermode scenario for RISC-V
Macro will now raise an illegal instruction exception so that mepc will
hold expected value in exception handler, and generated coredump can
reconstruct the failing stack

Coredump tests running on renode (for RISC-V) can now utilize fatal error
path through k_panic

Signed-off-by: Mark Holden <mholden@fb.com>
2022-01-01 07:38:20 -05:00
TOKITA Hiroshi
1421c1728b coredump: add support for Longan Nano boards
Longan Nano boards pass the test that with calling coredump().

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
Daniel Leung
c1ac125068 tests: coredump: skip acrn_ehl_crb
The coredump tests output quite a large amount of data into
the console. However, the ACRN console only has very limited
history (comparatively), such that twister is unable to
match the necessary strings to consider the tests passed.
So skip those tests on acrn_ehl_crb.

Fixes #40887

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-12-13 19:27:24 -05:00
Mark Holden
1a697ccf59 coredump: add support for RISC-V
This adds the necessary bits in arch code, and Python scripts
to enable coredump support for RISC-V

Signed-off-by: Mark Holden <mholden@fb.com>
2021-12-08 08:54:32 -05:00
Torsten Rasmussen
1cccc8a8fe cmake: increase minimal required version to 3.20.0
Move to CMake 3.20.0.

At the Toolchain WG it was decided to move to CMake 3.20.0.

The main reason for increasing CMake version is better toolchain
support.

Better toolchain support is added in the following CMake versions:
- armclang, CMake 3.15
- Intel oneAPI, CMake 3.20
- IAR, CMake 3.15 and 3.20

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-20 09:47:34 +02:00
Ioannis Glaropoulos
633a7208df tests: coredump: use undefined instruction to trigger CPU fault
When building the test for Cortex-M, use an undefined
instruction to trigger a CPU fault, instead of null
pointer de-referencing. That's because null-pointer
access may, in TrustZone-enabled platforms, lead to
a system crash (due to security violation).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-24 05:39:58 -04:00
Ioannis Glaropoulos
a31bd1539d tests: add missing CONFIG_TEST=y in test suites
In several test suites CONFIG_TEST was missing.
Define CONFIG_TEST=y, so testing-related Kconfig
options (depending on TEST) get switched-on.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-17 17:48:20 -04:00
Krzysztof Chruscinski
7f08061f0c logging: Revamp menuconfig
Clean up logging menuconfig by grouping configuration into
sections like: mode, processing configuration, backends.

Additionlly, removed LOG_ENABLE_FANCY_OUTPUT_FORMATTING which is no
longer in use.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-01-26 06:15:42 -05:00
Daniel Leung
c3669c045a tests: debug: add new coredump_backends
This adds a new coredump_backends test for coredump backends,
and currently tests both the logging and flash partition
backends.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
e9c28e41e2 tests: debug/coredump: change to dump minimal memory
The default of coredump is to dump all RAM as defined in
the linker script. However, this takes a while on boards
with bigger memory space, and would slow down automated
testing due to the need to grab all the data via serial.
So change it to dump minimal memory, as this would still
test the memory dumping capability.

Fixes #28547

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-15 11:29:50 -05:00
Daniel Leung
86b2cbc5ea tests: add a test for coredump
This adds a simple test for coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-24 20:28:24 -04:00
Anas Nashif
c0ad9f61b1 tests: tracing: move tracing under tests/subsys
Move under sybsys/ directly to align with subsystem reorg.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 15:58:05 -05:00
Anas Nashif
73008b427c tracing: move headers under include/tracing
Move tracing.h to include/tracing/ to align with subsystem reorg.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-02-07 15:58:05 -05:00
Wentong Wu
9d1614477e tests: tracing: add test cases for tracing infrastructure
Add test cases for currently supported backends (UART, USB
and POSIX) of tracing infrastructure.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-02-05 23:54:26 -05:00
Anas Nashif
70758c4374 tests: fix test identifiers
The seasonal overhaul of test identifiers aligning the terms being used
and creating a structure. This is hopefully the last time we do this,
plan is to document the identifiers and enforce syntax.

The end-goal is to be able to generate a testsuite description from the
existing tests and sync it frequently with the testsuite in Testrail.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-12-09 15:53:44 -05:00
Daniel Leung
b7eb04b300 x86: consolidate x86_64 architecture, SoC and boards
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.

() Removes the x86_64:x32 architecture and SoC, and replaces
   them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
   qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-10-25 17:57:55 -04:00
Anas Nashif
32a9435ea4 tests: tracing: add tests for tracing features
Mostly build tests now, will be extended to verify CTF output once we
have this feature in sanitycheck.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-27 14:42:22 -04:00