kconfig: Rename CONFIG_FP_SHARING to CONFIG_FPU_SHARING

This commit renames the Kconfig `FP_SHARING` symbol to `FPU_SHARING`, since this symbol specifically refers to the hardware FPU sharing support by means of FPU context preservation, and the "FP" prefix is not fully descriptive of that; leaving room for ambiguity. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2026-03-06 14:57:20 -08:00 · 2020-05-03 18:03:19 +09:00
parent 4aeea753b2
commit aaf93205bb
44 changed files with 95 additions and 95 deletions
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -543,7 +543,7 @@ config FPU
 	  those platforms is dependent on the availability of the toolchain-
 	  provided software floating point library.

-config FP_SHARING
+config FPU_SHARING
 	bool "FPU register sharing"
 	depends on FPU
 	help
--- a/arch/arc/core/offsets/offsets.c
+++ b/arch/arc/core/offsets/offsets.c
@@ -104,7 +104,7 @@ GEN_OFFSET_SYM(_callee_saved_stack_t, r30);
 GEN_OFFSET_SYM(_callee_saved_stack_t, r58);
 GEN_OFFSET_SYM(_callee_saved_stack_t, r59);
 #endif
-#ifdef CONFIG_FP_SHARING
+#ifdef CONFIG_FPU_SHARING
 GEN_OFFSET_SYM(_callee_saved_stack_t, fpu_status);
 GEN_OFFSET_SYM(_callee_saved_stack_t, fpu_ctrl);
 #ifdef CONFIG_FP_FPU_DA
--- a/arch/arc/core/thread.c
+++ b/arch/arc/core/thread.c
@@ -262,7 +262,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,

 #endif

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 int arch_float_disable(struct k_thread *thread)
 {
 	unsigned int key;
@@ -295,4 +295,4 @@ int arch_float_enable(struct k_thread *thread)

 	return 0;
 }
-#endif /* CONFIG_FPU && CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
--- a/arch/arc/include/kernel_arch_data.h
+++ b/arch/arc/include/kernel_arch_data.h
@@ -143,7 +143,7 @@ struct _callee_saved_stack {
 	u32_t r59;
 #endif

-#ifdef CONFIG_FP_SHARING
+#ifdef CONFIG_FPU_SHARING
 	u32_t fpu_status;
 	u32_t fpu_ctrl;
 #ifdef CONFIG_FP_FPU_DA
--- a/arch/arc/include/swap_macros.h
+++ b/arch/arc/include/swap_macros.h
@@ -63,7 +63,7 @@
 	st r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
 #endif

-#ifdef CONFIG_FP_SHARING
+#ifdef CONFIG_FPU_SHARING
 	ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
 	/* K_FP_REGS is bit 1 */
 	bbit0 r13, 1, 1f
@@ -99,7 +99,7 @@
 	ld r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
 #endif

-#ifdef CONFIG_FP_SHARING
+#ifdef CONFIG_FPU_SHARING
 	ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
 	/* K_FP_REGS is bit 1 */
 	bbit0 r13, 1, 2f
--- a/arch/arm/core/aarch32/cortex_m/mpu/Kconfig
+++ b/arch/arm/core/aarch32/cortex_m/mpu/Kconfig
@@ -63,7 +63,7 @@ config MPU_STACK_GUARD
 config MPU_STACK_GUARD_MIN_SIZE_FLOAT
 	int
 	depends on MPU_STACK_GUARD
-	depends on FP_SHARING
+	depends on FPU_SHARING
 	default 128
 	help
 	  Minimum size (and alignment when applicable) of an ARM MPU
@@ -72,7 +72,7 @@ config MPU_STACK_GUARD_MIN_SIZE_FLOAT
 	  128, to accommodate the length of a Cortex-M exception stack
 	  frame when the floating point context is active. The FP context
 	  is only stacked in sharing FP registers mode, therefore, the
-	  option is applicable only when FP_SHARING is selected.
+	  option is applicable only when FPU_SHARING is selected.

 config MPU_ALLOW_FLASH_WRITE
 	bool "Add MPU access to write to flash"
--- a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c
+++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c
@@ -215,7 +215,7 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread)
 	u32_t guard_start;
 	u32_t guard_size = MPU_GUARD_ALIGN_AND_SIZE;

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	if ((thread->base.user_options & K_FP_REGS) != 0) {
 		guard_size = MPU_GUARD_ALIGN_AND_SIZE_FLOAT;
 	}
--- a/arch/arm/core/aarch32/fatal.c
+++ b/arch/arm/core/aarch32/fatal.c
@@ -23,7 +23,7 @@ static void esf_dump(const z_arch_esf_t *esf)
 	LOG_ERR("r3/a4:  0x%08x r12/ip:  0x%08x r14/lr:  0x%08x",
 		esf->basic.a4, esf->basic.ip, esf->basic.lr);
 	LOG_ERR(" xpsr:  0x%08x", esf->basic.xpsr);
-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	for (int i = 0; i < 16; i += 4) {
 		LOG_ERR("s[%2d]:  0x%08x  s[%2d]:  0x%08x"
 			"  s[%2d]:  0x%08x  s[%2d]:  0x%08x",
--- a/arch/arm/core/aarch32/prep_c.c
+++ b/arch/arm/core/aarch32/prep_c.c
@@ -102,7 +102,7 @@ static inline void z_arm_floating_point_init(void)
 	 * Upon reset, the FPU Context Control Register is 0xC0000000
 	 * (both Automatic and Lazy state preservation is enabled).
 	 */
-#if !defined(CONFIG_FP_SHARING)
+#if !defined(CONFIG_FPU_SHARING)
 	/* Default mode is Unshared FP registers mode. We disable the
 	 * automatic stacking of FP registers (automatic setting of
 	 * FPCA bit in the CONTROL register), upon exception entries,
@@ -125,7 +125,7 @@ static inline void z_arm_floating_point_init(void)
 	 * out during context-switch.
 	 */
 	FPU->FPCCR = FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;
-#endif /* CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU_SHARING */

 	/* Make the side-effects of modifying the FPCCR be realized
 	 * immediately.
@@ -154,7 +154,7 @@ static inline void z_arm_floating_point_init(void)
 	 * In Sharing FP Registers mode CONTROL.FPCA is cleared before switching
 	 * to main, so it may be skipped here (saving few boot cycles).
 	 */
-#if !defined(CONFIG_FPU) || !defined(CONFIG_FP_SHARING)
+#if !defined(CONFIG_FPU) || !defined(CONFIG_FPU_SHARING)
 	__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
 #endif
 }
--- a/arch/arm/core/aarch32/swap_helper.S
+++ b/arch/arm/core/aarch32/swap_helper.S
@@ -89,7 +89,7 @@ SECTION_FUNC(TEXT, z_arm_pendsv)
    stmea r0!, {r3-r7}
 #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    stmia r0, {v1-v8, ip}
-#ifdef CONFIG_FP_SHARING
+#ifdef CONFIG_FPU_SHARING
    /* Assess whether switched-out thread had been using the FP registers. */
    ldr r0, =0x10 /* EXC_RETURN.F_Type Mask */
    tst lr, r0    /* EXC_RETURN & EXC_RETURN.F_Type_Msk */
@@ -108,7 +108,7 @@ out_fp_active:

 out_fp_endif:
    str r0, [r2, #_thread_offset_to_mode]
-#endif /* CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU_SHARING */
 #elif defined(CONFIG_ARMV7_R)
    /* Store rest of process context */
    cps #MODE_SYS
@@ -248,7 +248,7 @@ _thread_irq_disabled:
    /* restore BASEPRI for the incoming thread */
    msr BASEPRI, r0

-#ifdef CONFIG_FP_SHARING
+#ifdef CONFIG_FPU_SHARING
    /* Assess whether switched-in thread had been using the FP registers. */
    ldr r0, [r2, #_thread_offset_to_mode]
    tst r0, #0x04 /* thread.arch.mode & CONTROL.FPCA Msk */
--- a/arch/arm/core/aarch32/thread.c
+++ b/arch/arm/core/aarch32/thread.c
@@ -71,7 +71,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 	stackSize -= MPU_GUARD_ALIGN_AND_SIZE;
 #endif

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) \
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) \
 	&& defined(CONFIG_MPU_STACK_GUARD)
 	/* For a thread which intends to use the FP services, it is required to
 	 * allocate a wider MPU guard region, to always successfully detect an
@@ -137,7 +137,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,

 	thread->arch.basepri = 0;

-#if defined(CONFIG_USERSPACE) || defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_USERSPACE) || defined(CONFIG_FPU_SHARING)
 	thread->arch.mode = 0;
 #if defined(CONFIG_USERSPACE)
 	thread->arch.priv_stack_start = 0;
@@ -166,13 +166,13 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
 	 * privileged stack. Adjust the available (writable) stack
 	 * buffer area accordingly.
 	 */
-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	_current->arch.priv_stack_start +=
 		(_current->base.user_options & K_FP_REGS) ?
 		MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
 #else
 	_current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
-#endif /* CONFIG_FPU && CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
 #endif /* CONFIG_MPU_STACK_GUARD */

 	z_arm_userspace_enter(user_entry, p1, p2, p3,
@@ -285,12 +285,12 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp)
 		return 0;
 	}

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	u32_t guard_len = (thread->base.user_options & K_FP_REGS) ?
 		MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
 #else
 	u32_t guard_len = MPU_GUARD_ALIGN_AND_SIZE;
-#endif /* CONFIG_FPU && CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */

 #if defined(CONFIG_USERSPACE)
 	if (thread->arch.priv_stack_start) {
@@ -333,7 +333,7 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp)
 }
 #endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 int arch_float_disable(struct k_thread *thread)
 {
 	if (thread != _current) {
@@ -365,7 +365,7 @@ int arch_float_disable(struct k_thread *thread)

 	return 0;
 }
-#endif /* CONFIG_FPU && CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */

 void arch_switch_to_main_thread(struct k_thread *main_thread,
 				k_thread_stack_t *main_stack,
@@ -378,11 +378,11 @@ void arch_switch_to_main_thread(struct k_thread *main_thread,
 	 * initialized at thread creation for threads that make use of the FP).
 	 */
 	__set_FPSCR(0);
-#if defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU_SHARING)
 	/* In Sharing mode clearing FPSCR may set the CONTROL.FPCA flag. */
 	__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
 	__ISB();
-#endif /* CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU_SHARING */
 #endif /* CONFIG_FPU */

 #ifdef CONFIG_ARM_MPU
--- a/arch/arm/core/offsets/offsets_aarch32.c
+++ b/arch/arm/core/offsets/offsets_aarch32.c
@@ -29,14 +29,14 @@
 GEN_OFFSET_SYM(_thread_arch_t, basepri);
 GEN_OFFSET_SYM(_thread_arch_t, swap_return_value);

-#if defined(CONFIG_USERSPACE) || defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_USERSPACE) || defined(CONFIG_FPU_SHARING)
 GEN_OFFSET_SYM(_thread_arch_t, mode);
 #if defined(CONFIG_USERSPACE)
 GEN_OFFSET_SYM(_thread_arch_t, priv_stack_start);
 #endif
 #endif

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 GEN_OFFSET_SYM(_thread_arch_t, preempt_float);
 #endif

@@ -49,7 +49,7 @@ GEN_OFFSET_SYM(_basic_sf_t, lr);
 GEN_OFFSET_SYM(_basic_sf_t, pc);
 GEN_OFFSET_SYM(_basic_sf_t, xpsr);

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 GEN_OFFSET_SYM(_esf_t, s);
 GEN_OFFSET_SYM(_esf_t, fpscr);
 #endif
@@ -82,7 +82,7 @@ GEN_ABSOLUTE_SYM(___thread_stack_info_t_SIZEOF,
 * point registers.
 */

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 GEN_ABSOLUTE_SYM(_K_THREAD_NO_FLOAT_SIZEOF, sizeof(struct k_thread) -
 					    sizeof(struct _preempt_float));
 #else
--- a/arch/arm/include/aarch32/offsets_short_arch.h
+++ b/arch/arm/include/aarch32/offsets_short_arch.h
@@ -26,7 +26,7 @@
 #define _thread_offset_to_preempt_float \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_preempt_float_OFFSET)

-#if defined(CONFIG_USERSPACE) || defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_USERSPACE) || defined(CONFIG_FPU_SHARING)
 #define _thread_offset_to_mode \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_mode_OFFSET)

--- a/arch/posix/core/offsets/offsets.c
+++ b/arch/posix/core/offsets/offsets.c
@@ -28,7 +28,7 @@
 #include <gen_offset.h>
 #include <kernel_offsets.h>

-#if defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU_SHARING)
 GEN_OFFSET_SYM(_thread_arch_t, excNestCount);
 #endif

--- a/arch/riscv/core/isr.S
+++ b/arch/riscv/core/isr.S
@@ -144,7 +144,7 @@ SECTION_FUNC(exception.entry, __irq_wrapper)
 	RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp)
 	RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp)

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	/* Assess whether floating-point registers need to be saved. */
 	la t0, _kernel
 	RV_OP_LOADREG t0, _kernel_offset_to_current(t0)
@@ -396,7 +396,7 @@ reschedule:
 	RV_OP_STOREREG s10, _thread_offset_to_s10(t1)
 	RV_OP_STOREREG s11, _thread_offset_to_s11(t1)

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	/* Assess whether floating-point registers need to be saved. */
 	RV_OP_LOADREG t2, _thread_offset_to_user_options(t1)
 	andi t2, t2, K_FP_REGS
@@ -440,7 +440,7 @@ skip_store_fp_callee_saved:
 	RV_OP_LOADREG s10, _thread_offset_to_s10(t1)
 	RV_OP_LOADREG s11, _thread_offset_to_s11(t1)

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	/* Determine if we need to restore floating-point registers. */
 	RV_OP_LOADREG t2, _thread_offset_to_user_options(t1)
 	andi t2, t2, K_FP_REGS
@@ -482,7 +482,7 @@ skip_load_fp_callee_saved:
 	RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp)
 	RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp)

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	/* Assess whether floating-point registers need to be saved. */
 	RV_OP_LOADREG t2, _thread_offset_to_user_options(sp)
 	andi t2, t2, K_FP_REGS
@@ -495,7 +495,7 @@ skip_store_fp_caller_saved_benchmark:

 	call read_timer_end_of_swap

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	/* Determine if we need to restore floating-point registers. */
 	RV_OP_LOADREG t2, __z_arch_esf_t_fp_state_OFFSET(sp)
 	beqz t2, skip_load_fp_caller_saved_benchmark
@@ -542,7 +542,7 @@ no_reschedule:
 	RV_OP_LOADREG t0, __z_arch_esf_t_mstatus_OFFSET(sp)
 	csrw mstatus, t0

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	/*
 	 * Determine if we need to restore floating-point registers. This needs
 	 * to happen before restoring integer registers to avoid stomping on
--- a/arch/riscv/core/offsets/offsets.c
+++ b/arch/riscv/core/offsets/offsets.c
@@ -43,7 +43,7 @@ GEN_OFFSET_SYM(_callee_saved_t, s9);
 GEN_OFFSET_SYM(_callee_saved_t, s10);
 GEN_OFFSET_SYM(_callee_saved_t, s11);

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 GEN_OFFSET_SYM(_callee_saved_t, fcsr);
 GEN_OFFSET_SYM(_callee_saved_t, fs0);
 GEN_OFFSET_SYM(_callee_saved_t, fs1);
@@ -82,7 +82,7 @@ GEN_OFFSET_SYM(z_arch_esf_t, a7);
 GEN_OFFSET_SYM(z_arch_esf_t, mepc);
 GEN_OFFSET_SYM(z_arch_esf_t, mstatus);

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 GEN_OFFSET_SYM(z_arch_esf_t, fp_state);
 GEN_OFFSET_SYM(z_arch_esf_t, ft0);
 GEN_OFFSET_SYM(z_arch_esf_t, ft1);
--- a/arch/riscv/core/thread.c
+++ b/arch/riscv/core/thread.c
@@ -57,7 +57,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 	 *    thread stack.
 	 */
 	stack_init->mstatus = MSTATUS_DEF_RESTORE;
-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 	if ((thread->base.user_options & K_FP_REGS) != 0) {
 		stack_init->mstatus |= MSTATUS_FS_INIT;
 	}
@@ -68,7 +68,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 	thread->callee_saved.sp = (ulong_t)stack_init;
 }

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
 int arch_float_disable(struct k_thread *thread)
 {
 	unsigned int key;
@@ -131,4 +131,4 @@ int arch_float_enable(struct k_thread *thread)

 	return 0;
 }
-#endif /* CONFIG_FPU && CONFIG_FP_SHARING */
+#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
--- a/arch/riscv/include/offsets_short_arch.h
+++ b/arch/riscv/include/offsets_short_arch.h
@@ -59,7 +59,7 @@
 #define _thread_offset_to_swap_return_value \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_swap_return_value_OFFSET)

-#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING)
+#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)

 #define _thread_offset_to_fcsr \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_fcsr_OFFSET)
@@ -100,7 +100,7 @@
 #define _thread_offset_to_fs11 \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_fs11_OFFSET)

-#endif /* defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) */
+#endif /* defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) */

 /* end - threads */

--- a/arch/x86/core/Kconfig.ia32
+++ b/arch/x86/core/Kconfig.ia32
@@ -117,7 +117,7 @@ config LAZY_FP_SHARING
 	bool
 	depends on FPU
 	depends on !EAGER_FP_SHARING
-	depends on FP_SHARING
+	depends on FPU_SHARING
 	default y if X86_NO_LAZY_FP || !USERSPACE
 	help
 	  This hidden option allows multiple threads to use the floating point
--- a/arch/x86/core/ia32/float.c
+++ b/arch/x86/core/ia32/float.c
@@ -13,7 +13,7 @@
 * in a thread's stack region when a preemptive context switch occurs.
 *
 * Note: If the kernel has been built without floating point register sharing
- * support (CONFIG_FP_SHARING), the floating point registers can still be used
+ * support (CONFIG_FPU_SHARING), the floating point registers can still be used
 * safely by one or more cooperative threads OR by a single preemptive thread,
 * but not by both.
 *
--- a/Show More
+++ b/Show More