drivers: adc: add driver support for ADC1 of stm32

This commit adds driver support for ADC1 on all 8 supported series of
stm32 with resolution and conversion time selection and calibration.

Currently DMA is not supported for all series, and without it, zephyr
won't be able to catch up ADC's end of conversion interrupt, so this
version of the driver supports one channel conversion only. Users want
multi-channel conversion should use multiple sequences in their app
code.

This driver uses LL lib rather than HAL because the current HAL lib for
ADC will call HAL_DMA_* functions rather than using zephyr's common DMA
interface, so that way the driver will break the consistency of the
code.

This driver has been tested on multiple nucleo boards including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG and all
passed the test cases in tests/drivers/adc/adc_api. If the external ADC
line is floating, it may fail the tests since ADC may get 0V and the
test cases think 0 is failing. Connect it to any voltage source between
0-3.3V will help passing the test cases.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>

CODEOWNERS

@@ -100,6 +100,7 @@
 /drivers/*/*stm32*                        @erwango
 /drivers/*/*native_posix*                 @aescolar
 /drivers/adc/                             @anangl
+/drivers/adc/adc_stm32.c                  @cybertale
 /drivers/bluetooth/                       @joerchan @jhedberg @Vudentz
 /drivers/can/                             @alexanderwachter
 /drivers/can/*mcp2515*                    @karstenkoenig
@@ -155,6 +156,7 @@
 /dts/riscv32/rv32m1*                      @MaureenHelm
 /dts/bindings/                            @galak
 /dts/bindings/can/                        @alexanderwachter
+/dts/bindings/iio/adc/st,stm32-adc.yaml   @cybertale
 /dts/bindings/serial/ns16550.yaml         @gnuless
 /dts/bindings/*/nordic*                   @anangl
 /dts/bindings/*/nxp*                      @MaureenHelm

drivers/adc/CMakeLists.txt

@@ -9,4 +9,5 @@ zephyr_library_sources_ifdef(CONFIG_ADC_NRFX_SAADC	adc_nrfx_saadc.c)
 zephyr_library_sources_ifdef(CONFIG_ADC_INTEL_QUARK_SE_C1000_SS	adc_intel_quark_se_c1000_ss.c)
 zephyr_library_sources_ifdef(CONFIG_ADC_INTEL_QUARK_D2000	adc_intel_quark_d2000.c)
 zephyr_library_sources_ifdef(CONFIG_ADC_SAM0		adc_sam0.c)
+zephyr_library_sources_ifdef(CONFIG_ADC_STM32		adc_stm32.c)
 zephyr_library_sources_ifdef(CONFIG_USERSPACE		adc_handlers.c)

drivers/adc/Kconfig

@@ -57,4 +57,6 @@ source "drivers/adc/Kconfig.intel_quark"
 
 source "drivers/adc/Kconfig.sam0"
 
+source "drivers/adc/Kconfig.stm32"
+
 endif # ADC

drivers/adc/Kconfig.stm32

@@ -0,0 +1,25 @@
+# Kconfig - ADC configuration options
+
+#
+# Copyright (c) 2019 Intel Corporation
+# Copyright (c) 2019 Endre Karlson
+# Copyright (c) 2019 Song Qiang <songqiang1304521@gmail.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+menuconfig ADC_STM32
+	bool "STM32 ADC driver"
+	depends on SOC_FAMILY_STM32
+	help
+	  Enable the driver implementation for the stm32xx ADC
+
+if ADC_STM32
+
+config ADC_1
+	bool "ADC1"
+	default y
+	help
+	  Enable ADC1
+
+endif # ADC_STM32

soc/arm/st_stm32/common/Kconfig.defconfig.series

@@ -95,4 +95,11 @@ config CAN_STM32
 
 endif
 
+if ADC
+
+config ADC_STM32
+	default y
+
+endif # ADC
+
 endif # SOC_FAMILY_STM32

soc/arm/st_stm32/stm32f0/soc.h

@@ -59,6 +59,10 @@
 #include <stm32f0xx_ll_gpio.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32f0xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F0_SOC_H_ */

soc/arm/st_stm32/stm32f1/soc.h

@@ -59,6 +59,10 @@
 #include <stm32f1xx_ll_gpio.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32f1xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F1_SOC_H_ */

soc/arm/st_stm32/stm32f2/soc.h

@@ -50,6 +50,10 @@
 #include <stm32f2xx_ll_iwdg.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32f2xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F2_SOC_H_ */

soc/arm/st_stm32/stm32f3/soc.h

@@ -66,6 +66,10 @@
 #include <stm32f3xx_ll_gpio.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32f3xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F3_SOC_H_ */

soc/arm/st_stm32/stm32f4/soc.h

@@ -69,6 +69,10 @@
 #include <stm32f4xx_ll_gpio.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32f4xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F4_SOC_H_ */

soc/arm/st_stm32/stm32f7/soc.h

@@ -68,6 +68,10 @@
 #include <stm32f7xx_ll_iwdg.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32f7xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F7_SOC_H_ */

soc/arm/st_stm32/stm32l0/soc.h

@@ -60,6 +60,10 @@
 #include <stm32l0xx_ll_iwdg.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32l0xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32L0_SOC_H_ */

soc/arm/st_stm32/stm32l4/soc.h

@@ -83,6 +83,10 @@
 #include <stm32l4xx_ll_gpio.h>
 #endif
 
+#ifdef CONFIG_ADC_STM32
+#include <stm32l4xx_ll_adc.h>
+#endif
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32L4X_SOC_H_ */