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i2c: unify kconfig options and share them across drivers

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Reduces Kconfig variables by ~20

Change-Id: If39f7d49482d62417c621f98bc8c0c78df0d4139
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif
2016-05-07 07:53:48 -04:00
committed by Anas Nashif
parent 4108321181
commit 0140da310b
22 changed files with 218 additions and 475 deletions
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24
arch/arc/soc/quark_se_ss/Kconfig.defconfig
View File

@@ -105,32 +105,30 @@ if I2C
config I2C_QUARK_SE_SS
def_bool y
if I2C_QUARK_SE_SS
config I2C_QUARK_SE_SS_0
config I2C_0
def_bool y
if I2C_QUARK_SE_SS_0
config I2C_QUARK_SE_SS_0_NAME
config I2C_0_NAME
default "I2C_0"
config I2C_QUARK_SE_SS_0_DEFAULT_CFG
config I2C_0_DEFAULT_CFG
default 0x12
endif # I2C_QUARK_SE_SS_0
config I2C_0_IRQ_PRI
default 2
if I2C_QUARK_SE_SS_1
if I2C_1
config I2C_QUARK_SE_SS_1_NAME
config I2C_1_NAME
default "I2C_1"
config I2C_QUARK_SE_SS_1_DEFAULT_CFG
config I2C_1_DEFAULT_CFG
default 0x12
endif # I2C_QUARK_SE_SS_1
config I2C_1_IRQ_PRI
default 2
endif # I2C_QUARK_SE_SS
endif # I2C_1
endif # I2C

11
arch/arm/soc/atmel_sam3/Kconfig.defconfig
View File

@@ -99,11 +99,16 @@ if I2C
config I2C_ATMEL_SAM3
def_bool y
config I2C_ATMEL_SAM3_0
config I2C_0
default y
config I2C_0_IRQ_PRI
default 0
config I2C_1
default y
config I2C_ATMEL_SAM3_1
default y
config I2C_1_IRQ_PRI
default 0
endif # I2C

6
arch/x86/soc/quark_d2000/Kconfig.defconfig
View File

@@ -124,11 +124,11 @@ config I2C_QMSI
def_bool y
if I2C_QMSI
config I2C_QMSI_0
config I2C_0
def_bool y
config I2C_QMSI_0_IRQ_PRI
config I2C_0_IRQ_PRI
default 0
config I2C_QMSI_0_DEFAULT_CFG
config I2C_0_DEFAULT_CFG
default 0x12
endif # I2C_QMSI
endif # I2C

20
arch/x86/soc/quark_se/Kconfig.defconfig
View File

@@ -76,28 +76,28 @@ if I2C
config I2C_QMSI
def_bool y
config I2C_QMSI_0
config I2C_0
def_bool y
if I2C_QMSI_0
if I2C_0
config I2C_QMSI_0_IRQ_PRI
config I2C_0_IRQ_PRI
default 2
config I2C_QMSI_0_DEFAULT_CFG
config I2C_0_DEFAULT_CFG
default 0x12
endif # I2C_QMSI_0
endif # I2C_0
config I2C_QMSI_1
config I2C_1
def_bool y
if I2C_QMSI_1
config I2C_QMSI_1_IRQ_PRI
if I2C_1
config I2C_1_IRQ_PRI
default 2
config I2C_QMSI_1_DEFAULT_CFG
config I2C_1_DEFAULT_CFG
default 0x12
endif # I2C_QMSI_1
endif # I2C_1
endif # I2C

14
arch/x86/soc/quark_x1000/Kconfig.defconfig
View File

@@ -81,21 +81,21 @@ config I2C_DW
if I2C_DW
config I2C_DW_0
config I2C_0
def_bool y
if I2C_DW_0
if I2C_0
config I2C_DW_0_NAME
config I2C_0_NAME
default "I2C_0"
config I2C_DW_0_DEFAULT_CFG
config I2C_0_DEFAULT_CFG
default 0x12
config I2C_DW_0_IRQ_PRI
config I2C_0_IRQ_PRI
default 2
config I2C_DW_0_IRQ_SHARED_NAME
config I2C_0_IRQ_SHARED_NAME
default SHARED_IRQ_0_NAME if SHARED_IRQ
endif # I2C_DW_0
endif # I2C_0
endif # I2C_DW

8
boards/galileo/Kconfig.defconfig
View File

@@ -82,7 +82,7 @@ config GPIO_PCAL9535A_0_DEV_NAME
config GPIO_PCAL9535A_0_I2C_ADDR
default 0x25
config GPIO_PCAL9535A_0_I2C_MASTER_DEV_NAME
default I2C_DW_0_NAME
default I2C_0_NAME
endif # GPIO_PCAL9535A_0
@@ -96,7 +96,7 @@ config GPIO_PCAL9535A_1_DEV_NAME
config GPIO_PCAL9535A_1_I2C_ADDR
default 0x26
config GPIO_PCAL9535A_1_I2C_MASTER_DEV_NAME
default I2C_DW_0_NAME
default I2C_0_NAME
endif # GPIO_PCAL9535A_1
@@ -110,7 +110,7 @@ config GPIO_PCAL9535A_2_DEV_NAME
config GPIO_PCAL9535A_2_I2C_ADDR
default 0x27
config GPIO_PCAL9535A_2_I2C_MASTER_DEV_NAME
default I2C_DW_0_NAME
default I2C_0_NAME
endif # GPIO_PCAL9535A_2
@@ -135,7 +135,7 @@ config PWM_PCA9685_0_DEV_NAME
config PWM_PCA9685_0_I2C_ADDR
default 0x47
config PWM_PCA9685_0_I2C_MASTER_DEV_NAME
default I2C_DW_0_NAME
default I2C_0_NAME
endif # PWM_PCA9685_0
endif # PWM_PCA9685

4
boards/galileo/galileo_defconfig
View File

@@ -15,8 +15,8 @@ CONFIG_GPIO=y
CONFIG_GPIO_DW_0_IRQ_SHARED=y
CONFIG_I2C=y
CONFIG_I2C_DW=y
CONFIG_I2C_DW_0=y
CONFIG_I2C_DW_0_IRQ_SHARED=y
CONFIG_I2C_0=y
CONFIG_I2C_0_IRQ_SHARED=y
CONFIG_GPIO_PCAL9535A=y
CONFIG_GPIO_SCH=y
CONFIG_GPIO_SCH_0=y

128
drivers/i2c/Kconfig
View File

@@ -26,6 +26,44 @@ menuconfig I2C
help
Enable I2C Driver Configuration
if I2C
config I2C_DW
bool "Design Ware I2C support"
depends on I2C
default n
help
Enable Design Ware I2C support on the selected platform
config I2C_QUARK_SE_SS
bool "I2C Driver for Quark SE Sensor Subsystem (SS)"
default n
depends on I2C
help
This option enables the driver to support the I2C on Quark SE Sensor
Subsystem.
config I2C_QMSI
bool "QMSI I2C driver"
depends on I2C && QMSI
default n
help
This option enable the QMSI I2C driver.
This driver is simply a shim driver based on the I2C driver
provided by the QMSI BSP.
config I2C_ATMEL_SAM3
bool "Atmel SAM3 I2C Driver"
depends on I2C && SOC_ATMEL_SAM3
default n
help
Enable I2C support on the Atmel SAM3 family processor.
Says y to enable additional options to enable support
for individual controllers.
config I2C_INIT_PRIORITY
int
depends on I2C
@@ -46,10 +84,92 @@ config I2C_DEBUG
help
This option enables the debug features for I2C connections
source "drivers/i2c/Kconfig.dw"
source "drivers/i2c/Kconfig.quark_se_ss"
config I2C_SHARED_IRQ
bool
default n
depends on I2C
source "drivers/i2c/Kconfig.qmsi"
choice
prompt "I2C_0 Interrupts via"
default I2C_0_IRQ_DIRECT
depends on I2C_0
source "drivers/i2c/Kconfig.atmel_sam3"
config I2C_0_IRQ_DIRECT
bool "Direct Hardware Interrupt"
help
When interrupts fire, the driver's ISR function is being called directly.
config I2C_0_IRQ_SHARED
bool "Shared IRQ"
depends on SHARED_IRQ
select I2C_SHARED_IRQ
help
When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
driver dispatches the interrupt to other drivers.
endchoice
config I2C_0_IRQ_SHARED_NAME
string "Device name for Shared IRQ"
depends on I2C_0 && I2C_0_IRQ_SHARED
help
Specify the device name for the shared IRQ driver. It is used to register
this driver with the shared IRQ driver, so interrupts can be dispatched
correctly.
config I2C_0
bool "Enable I2C_0"
depends on I2C
default n
config I2C_0_NAME
string "Select a name for finding the device"
depends on I2C_0
default "I2C_0"
config I2C_0_DEFAULT_CFG
hex "I2C default configuration"
depends on I2C_0
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_0_IRQ_PRI
int "Controller interrupt priority"
depends on I2C_0 && I2C_0_IRQ_DIRECT
help
IRQ priority.
config I2C_1
bool "Enable I2C Port 1"
depends on I2C
default n
config I2C_1_NAME
string "Select a name for finding the device"
default "I2C_1"
depends on I2C_1
config I2C_1_DEFAULT_CFG
hex "I2C default configuration"
depends on I2C_1
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_1_IRQ_PRI
int "Controller interrupt priority"
depends on I2C_1 && I2C_0_IRQ_DIRECT
help
IRQ priority.
endif

111
drivers/i2c/Kconfig.atmel_sam3
View File

@@ -1,111 +0,0 @@
# Kconfig.atmel_sam3 - Atmel SAM3 I2C configuration options
#
#
# Copyright (c) 2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
menuconfig I2C_ATMEL_SAM3
bool "Atmel SAM3 I2C Driver"
depends on I2C && SOC_ATMEL_SAM3
default n
help
Enable I2C support on the Atmel SAM3 family processor.
Says y to enable additional options to enable support
for individual controllers.
if I2C_ATMEL_SAM3
config I2C_ATMEL_SAM3_0
bool "Atmel SAM3 I2C Controller 0 (TWI0)"
depends on I2C_ATMEL_SAM3
default n
help
Build driver for thw I2C Controller #0 (TWI0).
Says y if you intend to use the TWI0.
config I2C_ATMEL_SAM3_0_NAME
string "Device name for Atmel SAM3 I2C Controller 0"
depends on I2C_ATMEL_SAM3_0
default "I2C_0"
help
The device name for Atmel SAM3 I2C Controller 0.
Default is "I2C_0".
config I2C_ATMEL_SAM3_0_IRQ_PRI
int "IRQ Priority for Atmel SAM3 I2C Controller 0"
depends on I2C_ATMEL_SAM3_0
default 2
help
IRQ priority for Atmel SAM3 I2C Controller 0.
Default is 2.
config I2C_ATMEL_SAM3_0_DEFAULT_CFG
hex "Default configuration for Atmel SAM3 I2C Controller 0"
depends on I2C_ATMEL_SAM3_0
default 0x12
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C driver for proper values.
Default is 0x12 (master mode, standard speed).
config I2C_ATMEL_SAM3_1
bool "Atmel SAM3 I2C Controller 1 (TWI1)"
depends on I2C_ATMEL_SAM3
default n
help
Build driver for thw I2C Controller #1 (TWI1).
Says y if you intend to use the TWI1.
config I2C_ATMEL_SAM3_1_NAME
string "Device name for Atmel SAM3 I2C Controller 1"
depends on I2C_ATMEL_SAM3_1
default "I2C_1"
help
The device name for Atmel SAM3 I2C Controller 1.
Default is "I2C_1".
config I2C_ATMEL_SAM3_1_IRQ_PRI
int "IRQ Priority for Atmel SAM3 I2C Controller 1"
depends on I2C_ATMEL_SAM3_1
default 2
help
IRQ priority for Atmel SAM3 I2C Controller 1.
Default is 2.
config I2C_ATMEL_SAM3_1_DEFAULT_CFG
hex "Default configuration for Atmel SAM3 I2C Controller 1"
depends on I2C_ATMEL_SAM3_1
default 0x12
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C driver for proper values.
Default is 0x12 (master mode, standard speed).
endif # I2C_ATMEL_SAM3

115
drivers/i2c/Kconfig.dw
View File

@@ -1,115 +0,0 @@
# Kconfig.dw - DesignWare I2C configuration options
#
#
# Copyright (c) 2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
menuconfig I2C_DW
bool "Design Ware I2C support"
depends on I2C
default n
help
Enable Design Ware I2C support on the selected platform
if I2C_DW
config I2C_DW_SHARED_IRQ
bool
default n
depends on I2C_DW
config I2C_DW_0
bool "Enable I2C_0"
default n
depends on I2C_DW
config I2C_DW_0_NAME
string "Select a name for finding the device"
depends on I2C_DW_0
default "I2C_0"
choice
prompt "I2C_0 Interrupts via"
default I2C_DW_0_IRQ_DIRECT
depends on I2C_DW_0
config I2C_DW_0_IRQ_DIRECT
bool "Direct Hardware Interrupt"
help
When interrupts fire, the driver's ISR function is being called directly.
config I2C_DW_0_IRQ_SHARED
bool "Shared IRQ"
depends on SHARED_IRQ
select I2C_DW_SHARED_IRQ
help
When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
driver dispatches the interrupt to other drivers.
endchoice
config I2C_DW_0_IRQ_SHARED_NAME
string "Device name for Shared IRQ"
depends on I2C_DW_0 && I2C_DW_0_IRQ_SHARED
help
Specify the device name for the shared IRQ driver. It is used to register
this driver with the shared IRQ driver, so interrupts can be dispatched
correctly.
config I2C_DW_0_IRQ_PRI
int "Controller interrupt priority"
depends on I2C_DW_0 && I2C_DW_0_IRQ_DIRECT
help
IRQ priority
config I2C_DW_0_DEFAULT_CFG
hex "I2C default configuration"
depends on I2C_DW_0
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_DW_1
bool "Enable I2C_1"
default n
depends on I2C_DW
config I2C_DW_1_NAME
string "Select a name for finding the device"
depends on I2C_DW_1
default "I2C_1"
config I2C_DW_1_IRQ_PRI
int "Controller interrupt priority"
depends on I2C_DW_1
help
IRQ priority
config I2C_DW_1_DEFAULT_CFG
hex "I2C default configuration"
depends on I2C_DW_1
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
endif # I2C_DW

73
drivers/i2c/Kconfig.qmsi
View File

@@ -1,73 +0,0 @@
# Kconfig.qmsi - QMSI I2C configuration options
#
# Copyright (c) 2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
menuconfig I2C_QMSI
bool "QMSI I2C driver"
depends on I2C && QMSI
default n
help
This option enable the QMSI I2C driver.
This driver is simply a shim driver based on the I2C driver
provided by the QMSI BSP.
config I2C_QMSI_0
bool "Enable I2C_0 controller"
default n
depends on I2C_QMSI
config I2C_QMSI_0_NAME
string "I2C_0 device name"
depends on I2C_QMSI_0
default "I2C_0"
config I2C_QMSI_0_IRQ_PRI
int "Interrupt priority from I2C_0 controller"
depends on I2C_QMSI_0
config I2C_QMSI_0_DEFAULT_CFG
hex "I2C_0 default configuration"
depends on I2C_QMSI_0
default 0x0
help
This option specifies a default configuration for I2C_0 device
(e.g. addressing mode and bus speed) which is set during driver
initialization. Refer to I2C API for proper values.
config I2C_QMSI_1
bool "Enable I2C_1 controller"
default n
depends on I2C_QMSI
config I2C_QMSI_1_NAME
string "I2C_1 device name"
depends on I2C_QMSI_1
default "I2C_1"
config I2C_QMSI_1_IRQ_PRI
int "Interrupt priority from I2C_1 controller"
depends on I2C_QMSI_1
config I2C_QMSI_1_DEFAULT_CFG
hex "I2C_1 default configuration"
depends on I2C_QMSI_1
default 0x0
help
This option specifies a default configuration for I2C_1 device
(e.g. addressing mode and bus speed) which is set during driver
initialization. Refer to I2C API for proper values.

72
drivers/i2c/Kconfig.quark_se_ss
View File

@@ -1,72 +0,0 @@
# Kconfig.quark_se_ss - Quark SE Sensor Subsystem I2C configuration options
#
#
# Copyright (c) 2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
menuconfig I2C_QUARK_SE_SS
bool "I2C Driver for Quark SE Sensor Subsystem (SS)"
default n
depends on SOC_QUARK_SE_SS
depends on I2C
help
This option enables the driver to support the I2C on Quark SE Sensor
Subsystem.
if I2C_QUARK_SE_SS
config I2C_QUARK_SE_SS_0
bool "Enable Quark SE SS I2C Port 0"
depends on I2C_QUARK_SE_SS
default n
config I2C_QUARK_SE_SS_0_NAME
string "Select a name for finding the device"
depends on I2C_QUARK_SE_SS_0
default "I2C_SS_0"
config I2C_QUARK_SE_SS_0_DEFAULT_CFG
hex "Default Configuration for Quark SE SS I2C Port 0"
depends on I2C_QUARK_SE_SS_0
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_QUARK_SE_SS_1
bool "Enable Quark SE SS I2C Port 1"
depends on I2C_QUARK_SE_SS
default n
config I2C_QUARK_SE_SS_1_NAME
string "Select a name for finding the device"
depends on I2C_QUARK_SE_SS_1
default "I2C_SS_1"
config I2C_QUARK_SE_SS_1_DEFAULT_CFG
hex "Default Configuration for Quark SE SS I2C Port 1"
depends on I2C_QUARK_SE_SS_1
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
endif # I2C_QUARK_SE_SS

20
drivers/i2c/i2c_atmel_sam3.c
View File

@@ -632,7 +632,7 @@ static int i2c_sam3_init(struct device *dev)
return 0;
}
#ifdef CONFIG_I2C_ATMEL_SAM3_0
#ifdef CONFIG_I2C_0
static void config_func_0(struct device *port);
@@ -642,10 +642,10 @@ static struct i2c_sam3_dev_config dev_config_0 = {
};
static struct i2c_sam3_dev_data dev_data_0 = {
.dev_config.raw = CONFIG_I2C_ATMEL_SAM3_0_DEFAULT_CFG,
.dev_config.raw = CONFIG_I2C_0_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_sam3_0, CONFIG_I2C_ATMEL_SAM3_0_NAME, &i2c_sam3_init,
DEVICE_AND_API_INIT(i2c_sam3_0, CONFIG_I2C_0_NAME, &i2c_sam3_init,
&dev_data_0, &dev_config_0,
SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&api_funcs);
@@ -655,14 +655,14 @@ static void config_func_0(struct device *dev)
/* Enable clock for TWI0 controller */
__PMC->pcer0 = (1 << PID_TWI0);
IRQ_CONNECT(IRQ_TWI0, CONFIG_I2C_ATMEL_SAM3_0_IRQ_PRI,
IRQ_CONNECT(IRQ_TWI0, CONFIG_I2C_0_IRQ_PRI,
i2c_sam3_isr, DEVICE_GET(i2c_sam3_0), 0);
irq_enable(IRQ_TWI0);
}
#endif /* CONFIG_I2C_ATMEL_SAM3_0 */
#endif /* CONFIG_I2C_0 */
#ifdef CONFIG_I2C_ATMEL_SAM3_1
#ifdef CONFIG_I2C_1
static void config_func_1(struct device *port);
@@ -672,10 +672,10 @@ static struct i2c_sam3_dev_config dev_config_1 = {
};
static struct i2c_sam3_dev_data dev_data_1 = {
.dev_config.raw = CONFIG_I2C_ATMEL_SAM3_1_DEFAULT_CFG,
.dev_config.raw = CONFIG_I2C_1_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_sam3_1, CONFIG_I2C_ATMEL_SAM3_1_NAME, &i2c_sam3_init,
DEVICE_AND_API_INIT(i2c_sam3_1, CONFIG_I2C_1_NAME, &i2c_sam3_init,
&dev_data_1, &dev_config_1,
SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&api_funcs);
@@ -685,9 +685,9 @@ static void config_func_1(struct device *dev)
/* Enable clock for TWI0 controller */
__PMC->pcer0 = (1 << PID_TWI1);
IRQ_CONNECT(IRQ_TWI1, CONFIG_I2C_ATMEL_SAM3_1_IRQ_PRI,
IRQ_CONNECT(IRQ_TWI1, CONFIG_I2C_1_IRQ_PRI,
i2c_sam3_isr, DEVICE_GET(i2c_sam3_1), 0);
irq_enable(IRQ_TWI1);
}
#endif /* CONFIG_I2C_ATMEL_SAM3_1 */
#endif /* CONFIG_I2C_1 */

28
drivers/i2c/i2c_dw.c
View File

@@ -746,18 +746,18 @@ int i2c_dw_initialize(struct device *port)
}
/* system bindings */
#if CONFIG_I2C_DW_0
#if CONFIG_I2C_0
void i2c_config_0(struct device *port);
struct i2c_dw_rom_config i2c_config_dw_0 = {
.base_address = I2C_DW_0_BASE_ADDR,
#ifdef CONFIG_I2C_DW_0_IRQ_DIRECT
#ifdef CONFIG_I2C_0_IRQ_DIRECT
.irq_num = I2C_DW_0_IRQ,
#endif
.config_func = i2c_config_0,
#ifdef CONFIG_GPIO_DW_0_IRQ_SHARED
.shared_irq_dev_name = CONFIG_I2C_DW_0_IRQ_SHARED_NAME,
.shared_irq_dev_name = CONFIG_I2C_0_IRQ_SHARED_NAME,
#endif
#if CONFIG_PCI
@@ -772,10 +772,10 @@ struct i2c_dw_rom_config i2c_config_dw_0 = {
};
struct i2c_dw_dev_config i2c_0_runtime = {
.app_config.raw = CONFIG_I2C_DW_0_DEFAULT_CFG,
.app_config.raw = CONFIG_I2C_0_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_0, CONFIG_I2C_DW_0_NAME, &i2c_dw_initialize,
DEVICE_AND_API_INIT(i2c_0, CONFIG_I2C_0_NAME, &i2c_dw_initialize,
&i2c_0_runtime, &i2c_config_dw_0,
SECONDARY, CONFIG_I2C_INIT_PRIORITY,
&funcs);
@@ -785,25 +785,25 @@ void i2c_config_0(struct device *port)
struct i2c_dw_rom_config * const config = port->config->config_info;
struct device *shared_irq_dev;
#if defined(CONFIG_I2C_DW_0_IRQ_DIRECT)
#if defined(CONFIG_I2C_0_IRQ_DIRECT)
ARG_UNUSED(shared_irq_dev);
IRQ_CONNECT(I2C_DW_0_IRQ, CONFIG_I2C_DW_0_IRQ_PRI,
IRQ_CONNECT(I2C_DW_0_IRQ, CONFIG_I2C_0_IRQ_PRI,
i2c_dw_isr, DEVICE_GET(i2c_0), I2C_DW_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_I2C_DW_0_IRQ_SHARED)
#elif defined(CONFIG_I2C_0_IRQ_SHARED)
ARG_UNUSED(config);
shared_irq_dev = device_get_binding(config->shared_irq_dev_name);
shared_irq_isr_register(shared_irq_dev, (isr_t)i2c_dw_isr, port);
shared_irq_enable(shared_irq_dev, port);
#endif
}
#endif /* CONFIG_I2C_DW_0 */
#endif /* CONFIG_I2C_0 */
/*
* Adding in I2C1
*/
#if CONFIG_I2C_DW_1
#if CONFIG_I2C_1
void i2c_config_1(struct device *port);
struct i2c_dw_rom_config i2c_config_dw_1 = {
@@ -823,10 +823,10 @@ struct i2c_dw_rom_config i2c_config_dw_1 = {
};
struct i2c_dw_dev_config i2c_1_runtime = {
.app_config.raw = CONFIG_I2C_DW_1_DEFAULT_CFG,
.app_config.raw = CONFIG_I2C_1_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_1, CONFIG_I2C_DW_1_NAME, &i2c_dw_initialize,
DEVICE_AND_API_INIT(i2c_1, CONFIG_I2C_1_NAME, &i2c_dw_initialize,
&i2c_1_runtime, &i2c_config_dw_1,
SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
&funcs);
@@ -835,9 +835,9 @@ void i2c_config_1(struct device *port)
{
struct i2c_dw_rom_config * const config = port->config->config_info;
IRQ_CONNECT(I2C_DW_1_IRQ, CONFIG_I2C_DW_1_IRQ_PRI,
IRQ_CONNECT(I2C_DW_1_IRQ, CONFIG_I2C_1_IRQ_PRI,
i2c_dw_isr, DEVICE_GET(i2c_1), I2C_DW_IRQ_FLAGS);
irq_enable(config->irq_num);
}
#endif /* CONFIG_I2C_DW_1 */
#endif /* CONFIG_I2C_1 */

4
drivers/i2c/i2c_dw.h
View File

@@ -103,9 +103,9 @@ struct i2c_dw_rom_config {
#endif /* CONFIG_PCI */
i2c_isr_cb_t config_func;
#ifdef CONFIG_I2C_DW_SHARED_IRQ
#ifdef CONFIG_I2C_SHARED_IRQ
char *shared_irq_dev_name;
#endif /* CONFIG_I2C_DW_SHARED_IRQ */
#endif /* CONFIG_I2C_SHARED_IRQ */
};

28
drivers/i2c/i2c_qmsi.c
View File

@@ -41,33 +41,33 @@ struct i2c_qmsi_driver_data {
static int i2c_qmsi_init(struct device *dev);
#ifdef CONFIG_I2C_QMSI_0
#ifdef CONFIG_I2C_0
static struct i2c_qmsi_driver_data driver_data_0;
static struct i2c_qmsi_config_info config_info_0 = {
.instance = QM_I2C_0,
.default_cfg.raw = CONFIG_I2C_QMSI_0_DEFAULT_CFG,
.default_cfg.raw = CONFIG_I2C_0_DEFAULT_CFG,
};
DEVICE_INIT(i2c_0, CONFIG_I2C_QMSI_0_NAME, i2c_qmsi_init, &driver_data_0,
DEVICE_INIT(i2c_0, CONFIG_I2C_0_NAME, i2c_qmsi_init, &driver_data_0,
&config_info_0, SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_I2C_QMSI_0 */
#endif /* CONFIG_I2C_0 */
#ifdef CONFIG_I2C_QMSI_1
#ifdef CONFIG_I2C_1
static struct i2c_qmsi_driver_data driver_data_1;
static struct i2c_qmsi_config_info config_info_1 = {
.instance = QM_I2C_1,
.default_cfg.raw = CONFIG_I2C_QMSI_1_DEFAULT_CFG,
.default_cfg.raw = CONFIG_I2C_1_DEFAULT_CFG,
};
DEVICE_INIT(i2c_1, CONFIG_I2C_QMSI_1_NAME, i2c_qmsi_init, &driver_data_1,
DEVICE_INIT(i2c_1, CONFIG_I2C_1_NAME, i2c_qmsi_init, &driver_data_1,
&config_info_1, SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
#endif /* CONFIG_I2C_QMSI_1 */
#endif /* CONFIG_I2C_1 */
static int i2c_qmsi_configure(struct device *dev, uint32_t config)
{
@@ -111,12 +111,12 @@ static void transfer_complete(uint32_t id, qm_rc_t status)
struct i2c_qmsi_driver_data *driver_data;
switch (id) {
#ifdef CONFIG_I2C_QMSI_0
#ifdef CONFIG_I2C_0
case QM_I2C_0:
dev = DEVICE_GET(i2c_0);
break;
#endif
#ifdef CONFIG_I2C_QMSI_1
#ifdef CONFIG_I2C_1
case QM_I2C_1:
dev = DEVICE_GET(i2c_1);
break;
@@ -218,7 +218,7 @@ static int i2c_qmsi_init(struct device *dev)
* to Lakemont core.
*/
IRQ_CONNECT(QM_IRQ_I2C_0,
CONFIG_I2C_QMSI_0_IRQ_PRI, qm_i2c_0_isr, NULL,
CONFIG_I2C_0_IRQ_PRI, qm_i2c_0_isr, NULL,
(IOAPIC_LEVEL | IOAPIC_HIGH));
irq_enable(QM_IRQ_I2C_0);
QM_SCSS_INT->int_i2c_mst_0_mask &= ~BIT(0);
@@ -226,17 +226,17 @@ static int i2c_qmsi_init(struct device *dev)
clk_periph_enable(CLK_PERIPH_I2C_M0_REGISTER | CLK_PERIPH_CLK);
break;
#ifdef CONFIG_I2C_QMSI_1
#ifdef CONFIG_I2C_1
case QM_I2C_1:
IRQ_CONNECT(QM_IRQ_I2C_1,
CONFIG_I2C_QMSI_1_IRQ_PRI, qm_i2c_1_isr, NULL,
CONFIG_I2C_1_IRQ_PRI, qm_i2c_1_isr, NULL,
(IOAPIC_LEVEL | IOAPIC_HIGH));
irq_enable(QM_IRQ_I2C_1);
QM_SCSS_INT->int_i2c_mst_1_mask &= ~BIT(0);
clk_periph_enable(CLK_PERIPH_I2C_M1_REGISTER | CLK_PERIPH_CLK);
break;
#endif /* CONFIG_I2C_QMSI_1 */
#endif /* CONFIG_I2C_1 */
default:
return -EIO;

16
drivers/i2c/i2c_quark_se_ss.c
View File

@@ -641,7 +641,7 @@ int i2c_qse_ss_initialize(struct device *dev)
return 0;
}
#if CONFIG_I2C_QUARK_SE_SS_0
#if CONFIG_I2C_0
#include <init.h>
static void _i2c_qse_ss_config_irq_0(struct device *port);
@@ -653,10 +653,10 @@ static const struct i2c_qse_ss_rom_config i2c_config_ss_0 = {
};
static struct i2c_qse_ss_dev_config i2c_ss_0_runtime = {
.app_config.raw = CONFIG_I2C_QUARK_SE_SS_0_DEFAULT_CFG,
.app_config.raw = CONFIG_I2C_0_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_ss_0, CONFIG_I2C_QUARK_SE_SS_0_NAME,
DEVICE_AND_API_INIT(i2c_ss_0, CONFIG_I2C_0_NAME,
&i2c_qse_ss_initialize,
&i2c_ss_0_runtime, (void *)&i2c_config_ss_0,
SECONDARY, CONFIG_I2C_INIT_PRIORITY,
@@ -702,9 +702,9 @@ static void _i2c_qse_ss_config_irq_0(struct device *port)
irq_enable(I2C_SS_0_STOP_VECTOR);
}
#endif /* CONFIG_I2C_QUARK_SE_SS_0 */
#endif /* CONFIG_I2C_0 */
#if CONFIG_I2C_QUARK_SE_SS_1
#if CONFIG_I2C_1
#include <init.h>
static void _i2c_qse_ss_config_irq_1(struct device *port);
@@ -716,10 +716,10 @@ static const struct i2c_qse_ss_rom_config i2c_config_ss_1 = {
};
static struct i2c_qse_ss_dev_config i2c_qse_ss_1_runtime = {
.app_config.raw = CONFIG_I2C_QUARK_SE_SS_1_DEFAULT_CFG,
.app_config.raw = CONFIG_I2C_1_DEFAULT_CFG,
};
DEVICE_AND_API_INIT(i2c_ss_1, CONFIG_I2C_QUARK_SE_SS_1_NAME,
DEVICE_AND_API_INIT(i2c_ss_1, CONFIG_I2C_1_NAME,
&i2c_qse_ss_initialize,
&i2c_qse_ss_1_runtime, (void *)&i2c_config_ss_1,
SECONDARY, CONFIG_I2C_INIT_PRIORITY);
@@ -766,4 +766,4 @@ static void _i2c_qse_ss_config_irq_1(struct device *port)
irq_enable(I2C_SS_1_STOP_VECTOR);
}
#endif /* CONFIG_I2C_QUARK_SE_SS_1 */
#endif /* CONFIG_I2C_1 */

1
samples/drivers/current_sensing/prj.conf
View File

@@ -1,4 +1,3 @@
CONFIG_STDOUT_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_I2C=y

2
samples/drivers/sensor_apds9960/prj_arc.conf
View File

@@ -2,4 +2,4 @@ CONFIG_STDOUT_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_GPIO=y
CONFIG_I2C=y
CONFIG_I2C_QUARK_SE_SS_0_DEFAULT_CFG=0x14
CONFIG_I2C_0_DEFAULT_CFG=0x14

2
samples/sensor/bmg160/prj.conf
View File

@@ -4,8 +4,6 @@ CONFIG_PRINTK=y
CONFIG_GPIO=y
CONFIG_I2C=y
CONFIG_I2C_QUARK_SE_SS=y
CONFIG_I2C_QUARK_SE_SS_0=y
CONFIG_SYS_LOG=y

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