This will detect CPUs up-to 255 and update MADT ProcessorLocalApic entries
with the detected CPU information.
- Set PcdCpuMaxLogicalProcessorNumber to 255 in QEMU BoardConfig.py
Test>
qemu-system-x86_64 -machine q35 -nographic -serial mon:stdio
-pflash Outputs/qemu/SlimBootloader.bin
-smp 8
Signed-off-by: Aiden Park <aiden.park@intel.com>
Make PcdCpuMaxLogicalProcessorNumber configurable on a Board
- PcdCpuMaxLogicalProcessorNumber = 16 by default
- Configurable by CPU_MAX_LOGICAL_PROCESSOR_NUMBER in BoardConfig.py
Signed-off-by: Aiden Park <aiden.park@intel.com>
Currently, the common hook UpdateMadt() was updating fixed size of
ProcessorLocalApic entries.
This allows the hook to append ProcessorLocalApic entries with the number
of detected CPUs in runtime.
Signed-off-by: Aiden Park <aiden.park@intel.com>
To make PlatformUpdateAcpiTable() hook its contents and length easily,
allocate a memory from low to high and appends each tables to higher direction
Signed-off-by: Aiden Park <aiden.park@intel.com>
- Add BistVal in STAGE1A_ASM_HOB structure
- Use MM0 register to preserve the BIST value
- Push BistVal while setup HOB in stack
- Add check for CPU BIST failure and halt the system when failed
Signed-off-by: Himanshu Sahdev aka CunningLearner sahdev.himan@gmail.com
This patch added support for CFLS and CFLH stitching by patching
proper xml file for the platforms.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
Currently in Stage1B it defined gpio table for pre-memory, but no one
program that gpio table. This patch adds it.
Move full GPIO table program from Stage1B to Stage2
Remove unused global variable mRsvdSmbusAddressTable in Stage1B.
TEST= Build success.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This patch will patch parameters for BpmGen2
based on the example file provided in the BpmGen2
package.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This patch will use a list of xml changes required and
patch them in a loop rather than patching each change
seperately.
This patch also add parameter to indicate platform for which
ifwi is getting build.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This patch will remove FitHelp.py dependency from StitchIfwi
and reuses code from IfwiUtility to patch ACM binary.
This patch also fixed some case dependency required for python
in xml file patching. without this fix, fit does not work as
expected.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
Klocwork scanning reported several issues in the
PayloadPkg and Platform code folders, this commit
aims to resolve all of the issues currently being
reported in these folders.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
CfgDataTool was originally developed for APL. On APL, the CFGDATA
region name is 'CFGD'. However, on all other platform, the name
is 'CNFG'. This patch modified the script to handle both. And it
fixed#293.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
TpmSsdt.asl is common for supported platforms
SMIE for SMI control access is defined in Platform DSDT
for CFL and APL.
Signed-off-by: Subash Lakkimsetti <subashx.lakkimsetti@intel.com>
This patch will seperate SPD config data from memory configuration data,
as a small change in the SPD config data is resulting in duplication
of the memory config data. After sperating SPD config data, duplication
of whole memory cfg data is not required and would result in saving space.
Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
Aiden Park
Himanshu Sahdev
Himanshu Sahdev
Raghava Gudla
Guo Dong
James Gutbub
Grandhi
Sai Talamudupula
Maurice Ma
Subash Lakkimsetti