Commit Graph

23 Commits

Author SHA1 Message Date
Kevin Tsai 30e04de2db fix: [Common] Update PcdFspResetStatus size
Update PcdFspResetStatus size to support 64Bit FSP return status.

Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
2025-03-31 09:37:56 -07:00
Biswas Arghya 246e497c0c fix:[common] Fix Coverity issue in FspNotifyPhase
fix Coverity issue in FspApiLib/FspNotifyPhase.c.

Signed-off-by: Biswas Arghya <arghya.biswas@intel.com>
2025-02-12 13:46:45 -07:00
Bejean Mosher 0bcefec921 feat: Support calling into x64 FSP
FSP 2.4 introduces the possibility of FSP built for x64 architecture.
This adds support for x64 FSP calling conventions based on the header x64
support attribute. Support for x64 FSP-T requires entering long mode
prior to FSP-T execution.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-02-06 10:08:15 -07:00
Bejean Mosher 4d4d5a6fa3 fix: Allocate FSPM UPD from heap instead of stack
FSP 2.4 with MultiPhase support expects FSP UPD buffer to stay accessible
after CallFspMemoryInit() returns, so FSP must be allocated from the heap
instead of stack.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-02-06 10:08:15 -07:00
bejeanmo 6a1da85c9f fix: FSP 2.4 issues (#2171)
1) Some FSP 2.4 implementations are non-conforming and use FSPM_ARCH_UPD
instead of FSPM_ARCH2_UPD as indicated by the specification. Logic is
changed to check FSPM UPD header revision for structure version instead
of FSP spec revision.

2) MultiPhase FSP PhaseIndex is one-based so loop comparisons need to take
this into account. Side effect is that the last phase may be missed. No
current platform FSP is utilizing this.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2024-05-03 08:26:03 -04:00
bejeanmo a34e54e175 feat: [FSP2.4] Added FSP variable serivices, Multi Phase Mem and SI. (#1901)
FSP 2.4 adds a requirement for Bootloader to respond to FSP Variable
requests in a way that is similar to UEFI variable services. This
implementation adds support for using the updated SBL VariableLib so that
the FspVariableServicesLib wrapper is no longer needed.

Additionally, support for Multi-Phase mem and SI init is added. FSP 2.4
introduces the mandatory MultiPhaseMemInit call, and makes the
MultiPhaseSiInit call mandatory where it was previously optional.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2023-05-24 14:36:35 -04:00
bejeanmo b9057d0bd1 feat: Add support for FSP Reset request value in ResetSystemLib. (#1825)
Silicon Reset Lib needs to know the FSP reset request status since some
FSPs will utilize Reset values besides warm/cold.

Added support for ADl/RPL global reset request from FSP.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2023-02-03 16:49:18 -05:00
Mike Crowe 990e3e81e6 Use LF line endings in the repository
Convert the line endings stored for all text files in the repository to
LF. The majority previously used DOS-style CRLF line endings. Add a
.gitattributes file to enforce this and treat certain extensions as
never being text files.

Update PatchCheck.py to insist on LF line endings rather than CRLF.
However, its other checks fail on this commit due to lots of
pre-existing complaints that it only notices because the line endings
have changed.

Silicon/QemuSocPkg/FspBin/Patches/0001-Build-QEMU-FSP-2.0-binaries.patch
needs to be treated as binary since it contains a mixture of line
endings.

This change has implications depending on the client platform you are
using the repository from:

* Windows

The usual configuration for Git on Windows means that text files will
be checked out to the work tree with DOS-style CRLF line endings. If
that's not the case then you can configure Git to do so for the entire
machine with:

 git config --global core.autocrlf true

or for just the repository with:

 git config core.autocrlf true

Line endings will be normalised to LF when they are committed to the
repository. If you commit a text file with only LF line endings then it
will be converted to CRLF line endings in your work tree.

* Linux, MacOS and other Unices

The usual configuration for Git on such platforms is to check files out
of the repository with LF line endings. This is probably the right thing
for you. In the unlikely even that you are using Git on Unix but editing
or compiling on Windows for some reason then you may need to tweak your
configuration to force the use of CRLF line endings as described above.

* General

For more information see
https://docs.github.com/en/get-started/getting-started-with-git/configuring-git-to-handle-line-endings .

Fixes: https://github.com/slimbootloader/slimbootloader/issues/1400
Signed-off-by: Mike Crowe <mac@mcrowe.com>
2021-11-10 12:46:42 -08:00
Maurice Ma dd8fe22046 Add MultiBoot support for X64 build
During X64 enabling, there was a pending task to enable 32bit
MultiBoot support. It is not implemented.  This patch added the
support to allow X64 SBL to boot a 32bit MB image through thunking.
As part of this patch, the ThunkLib is separated from the FspApiLib
so that it can be shared by other component.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-07 14:20:50 -07:00
Perni 7ecb423fab FspsUpd Updated to Global Variable
FspsUpd variable made global so that it could be accessed out of
    FspSilicon function.

    Patchable PCD has been created for FspsUpd and Memory pool allocated.

Signed-off-by: Perni <ramesh.chandra.perni@intel.com>
2020-06-02 08:32:38 -07:00
Maurice Ma 0788c6da42 Allow using bootloader stack to call FspMemoryInit
FSP 2.1 introduced new requirement to use bootloader stack for FSP-M. It
will cause issue for SBL since SBL only uses a small stack in Stage1. To
address this issue, a new PCD PcdFSPMStackTop is added to control the
stack settings for FSP-M.
  - If it is 0, it will not switch stack before calling FspMemoryInit API.
  - If it is 0xffffffff, it will switch to the new default FSP stack
    before calling FspMemoryInit API.
  - For other values, it will switch to the new stack at specified value
    before calling FspMemoryInit API.
This PCD will be set automatically by FSP_M_STACK_TOP variable in
BoardConfig.py file.

This code has been tested on UP Extreme board with latest FSP version.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-05-21 09:27:59 -07:00
Aiden Park 9f96b72a0c Fix type cast error on X64 build (#648)
This will fix a function pointer type cast error.
- a function pointer to data pointer 'void *'

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-04-08 18:02:19 -07:00
Maurice Ma eb9c0e6c1f Improved thunk call for 32 bit FSP API (#636)
In certain condition, the FspTempRamExit() API will be executed from
CAR. If so, the thunk call itself cannot be in CAR otherwise the
call will hang immediately after the CAR teardown. To resolve it,
the thunk call needs to be copied over to memory before calling the
FspTempRamExit() API. This patch implemented this.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-04-03 15:49:22 -07:00
Maurice Ma 72cb08ee7d Enable QEMU Stage1A boot in X64 mode (#621)
* [QEMU] Enable Stage1A boot in X64 mode

This patch added necessary changes to enable QEMU boot through
Stage1A in SBL X64 build.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>

* [QEMU] Enable QEMU Linux boot in X64 mode

This patch enabled SBL X64 boot for Linux. At this moment, since
FSP is still in 32 bit mode, it is required to thunk back into
32 bit mode to call FSP APIs.
It fixed #622.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-04-02 07:30:43 -07:00
Aiden Park 6bec45136f Make x64 buildable (#619)
* Add missing X64 MdePkg Library

This adds some missing Library from EDKII Stable201911.
- MdePkg/Library/BaseMemoryLibRepStr/X64
- MdePkg/Library/BaseSynchronizationLib/X64

Signed-off-by: Aiden Park <aiden.park@intel.com>

* Make X64 target buildable

This is just to build X64 target - Not functional.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-04-02 07:28:14 -07:00
Aiden Park 29446a1c2a Pointer type cast for both 32/64-bit operation (#615)
This patch allows both 32/64-bit addressing properly.
- Pointer type cast with UINTN
- Add missing EFIAPI for APIs

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-03-26 17:30:55 -07:00
Guo Dong 833ecbc46b Format update by coding style
1)  Replace TAB with spaces
2)  Convert CR, LF or LFCR to CRLF
3)  Remove trailing spaces
4)  Updated below strings:
       "EFI_D_INFO"  -> "DEBUG_INFO",
       "EFI_D_WARN"  -> "DEBUG_WARN",
       "EFI_D_ERROR" -> "DEBUG_ERROR",

Signed-off-by: Guo Dong <guo.dong@intel.com>
2020-02-07 22:43:45 -07:00
Maurice Ma faa172e67e Add missing header files in INF
In order to sync up with EDK201911 stable release, it is required
to add missing header files in the INF file. Otherwise, the build
will throw warnings. This patch added the missing headers in INF
files.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-02-03 15:49:48 -08:00
Maurice Ma 5bbf0122eb Add Visual Studio Community build support
This patch enabled Visual Studio 2017 Community 2017 build support.
The following were done:
- Added new method to detect VS2017 installation path and version
- Droped VS2005, VS2008, VS2010 and VS2012 build support. Only
  VS2013 and VS2015 are supported.
- Fixed build issue in FspApiLib due to new compiler optimizations
- Synced the build support for QEMU FSP patch

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-01-08 08:23:35 -08:00
Aiden Park b24fd2759c Cosmetic: Convert LF to CRLF
This will fully support PatchCheck.py.
- Remove all trailing whitespace
- Convert LF to CRLF by default
- Update EFI_D_* to DEBUG_*
- Re-enable CRLF check in PatchCheck.py

Signed-off-by: Aiden Park <aiden.park@intel.com>
2019-12-02 16:21:19 -08:00
Maurice Ma 9c50d23a12 Add FSP API reset request handling
Current SBL does not check the FSP Notify API return status. As a
result, if reset is requested, it is ignored by SBL. This patch
added FSP reset request check for FspMemoryInit, FspSiliconInit and
FspNotifyPhase.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2019-11-25 09:22:52 -08:00
Guo Dong 5e10bd1e07 Update BSD license to BSD+Patent license
To align with EDK2, update file license
to use BSD+Patent license

Signed-off-by: Guo Dong <guo.dong@intel.com>
2019-06-13 10:46:49 -07:00
Maurice Ma c6999f497a Initial check-in for Slim Bootloader source 2018-09-13 16:11:07 -07:00