Commit Graph

2194 Commits

Author SHA1 Message Date
Bejean Mosher 39d0ea8c19 fix: [BTL-S] Remove TCC ACPI Platform code for BTL-S to match RPL-S
BTL-S TCC design matches RPL-S so there is no RTCT and no TCC tuning table.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-05-01 14:15:07 -04:00
Randy 46291fe15b fix: [ARL][MTL] Change SmmRebase mode to Auto NoSmrr for edk2 202411
edk2-stable202411 based UEFI payload requires Smm Rebase without setting
SMRR. Set this new auto mode for compatibility with this and newer uefi
payload.

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-30 13:13:09 -07:00
Bejean Mosher 51269276f4 fix: [BTL-S] Change SmmRebase mode to "Auto NoSmrr" for edk2 202411
edk2-stable202411 based UEFI payload requires Smm Rebase without setting
SMRR. Set this new auto mode for compatibility with this and newer uefi
payload.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-04-29 06:56:23 -04:00
Bejean Mosher 903c9ba566 fix: [RPL-S/BTL-S] Fix x64 build failure in Ubuntu 20.04
OS Loader hitting FD space limitation on linux x64 Ubuntu 20.04
build on these two platforms.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-04-28 10:19:59 -04:00
Bejean Mosher a85faaabf3 feat: [BTL-S] Add BTL-S builds to Azure CI pipelines
Add BTL-S build targets to azure build tests for pre-commit check.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-04-28 10:19:59 -04:00
Kevin Tsai 6affe6bda8 fix: [common] Fix Coverity issues in in ElfLib
- Uninitialized scalar variable (CWE-457) on SegAlignment

Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
2025-04-28 07:11:20 -07:00
Randy 7a34ca9df0 Revert "fix: ci build fail cause by nasm url 404"
This reverts commit 86358b031f.
nasm.us is back, revert it.

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-28 07:10:50 -07:00
Ong Ee Lim b9f9291476 [UPX i14] Enable UPX i14 basic boot
Add SBL support for UP Xtreme i14 MTL-based Board.
The PCIe M.2 slot CN11 on the board is able to detect NVMe SSD.
Debug output is enabled at header CN17 (USB/UART port) on the board
Currently able to boot on Windows with UEFI payload, but there were sudden
intermittent shutdown after Windows boot.

Command used to stitch SlimBootloader.bin with specific -p parameter:
python Platform\MeteorlakeBoardPkg\Script\StitchLoader.py -i <BIOS_Image_
Name> -s Outputs\mtl\SlimBootloader.bin -o <SBL_output_name> -p 0xAA000109

Signed-off-by: Ong Ee Lim <ee.lim.ong@intel.com>
2025-04-25 12:58:29 -07:00
Bruno Achauer febab4448c fix: [ADLN] Remove undefined pins from GPIO configuration
The ADL-N configuration refers to several pins that (according to
RDC document #648094: "GPIO Implementation Summary") do not exist.
Remove the offending pins both from the GPIO template .yaml file
and the board configuration .dlt files referring to it.

Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
2025-04-25 13:54:11 -04:00
Bejean Mosher 6686cc47d8 fix: [BTL-S] Build error from bad VBT path in CopyList
Wrong VBT path in FSP INF copy list was causing a build failure.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-04-24 10:27:28 -04:00
ramesh chandra perni 3772a5857e [TGL]:Header file cleanup
Remove duplicate header files

Signed-off-by: ramesh chandra perni <ramesh.chandra.perni@intel.com>
2025-04-23 12:31:14 +08:00
Bejean Mosher e227c8ca9d [BTL-S] Upstream BTL-S Hybrid platform.
Add support for BTL-S Hybrid platform and collateral.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2025-04-23 12:29:55 +08:00
Stanley Chang ed66a8aa8c [MTL] fix the AE_AML_PACKAGE_LIMIT error
The commit fixes the AE_AML_PACKAGE_LIMIT error after introducing GpioV2.
It also deletes the unused ASL files for MTL.

Before the commit, the calling of \PIN.ON (PWRG) and \PIN.OFF (RSTG) was using
non-GPIOV2 format/values. These functions end up calling _SB.GGOV and _SB.SGOV,
which rely on GADR(), and this is causing an error with GINF().

The error messages by Linux kernel without the commit are:

[   53.662055] Initialized Arguments for Method [GINF]:  (3 arguments defined for method invocation)
[   53.662056]   Arg0:   000000001675faad <Obj>           Integer 0000000000000000
[   53.662060]   Arg1:   0000000064dfbf0d <Obj>           Integer 0000000000000008
[   53.662064]   Arg2:   000000003e76b0ee <Obj>           Integer 0000000000000001

[   53.662071] ACPI Error: Aborting method \_SB.GINF due to previous error (AE_AML_PACKAGE_LIMIT) (20240827/psparse-529)
[   53.662093] ACPI Error: Aborting method \_SB.GADR due to previous error (AE_AML_PACKAGE_LIMIT) (20240827/psparse-529)
[   53.662099] ACPI Error: Aborting method \_SB.SGOV due to previous error (AE_AML_PACKAGE_LIMIT) (20240827/psparse-529)
[   53.662104] ACPI Error: Aborting method \PIN.ON due to previous error (AE_AML_PACKAGE_LIMIT) (20240827/psparse-529)
[   53.662109] ACPI Error: Aborting method \_SB.PEPD._DSM due to previous error (AE_AML_PACKAGE_LIMIT) (20240827/psparse-529)

Signed-off-by: Randy Lin <randy.lin@intel.com>
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
2025-04-22 08:49:41 -07:00
Randy c89ce3746a fix: EPAYLOAD.bin size is too small
Fix build failure for rebase the UEFI payload to 202411.

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-22 09:45:29 -04:00
Ong Ee Lim 38f1f1aa6f fix: [ADL/RPL] Fixing SBL build issue due to payload size
After migrating UEFI build to edk2-stable202411 branch, SBL build for
ADL-N, RPL-P, RPL-PS and RPL-S platforms failed to the insufficient
EPAYLOAD size. This commit addressed the build issue.

Signed-off-by: Ong Ee Lim <ee.lim.ong@intel.com>
2025-04-22 09:43:53 -04:00
Randy 86358b031f fix: ci build fail cause by nasm url 404
Should revert if nasm.us dns look-up get fixed.

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-21 20:51:01 -07:00
Randy 9ac7334ca8 feat: [ARL] Support Arrow Island reference board
- assign BoardID 0x1B
- add VBT binary
- add DLT file
- debug uart should be 0x0
- verified basic boot on win11 and ubuntu.

build command : python BuildLoader.py  build arlh
stich command1: python Platform\ArrowlakeBoardPkg\Script\StitchIfwi.py  -b legacy -s Outputs\arlh\Stitch_Components.zip
                -c Platform\ArrowlakeBoardPkg\Script\StitchIfwiConfig_arlh.py
                -w Stitchifwi_components_arluh -p arlh -o isd -d 0xAA00001B
stich command2: python Platform\ArrowlakeBoardPkg\Script\StitchLoader.py
                -i BIOS_FIWI.bin -o new.bin -p 0xAA00001B -s Outputs\arlh\SlimBootloader.bin

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-17 09:31:10 -07:00
Randy bbca43d8b9 [ARLs/uh] Fix s0ix no display
Remove the workaround (WA) to prevent the GuC module hang issue
during s0ix transitions. intel kernel 6.11 fixed.

verified on arls s02 rvp/arlp rvp with kernel 6.12

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-17 09:30:53 -07:00
samihahkasim 9b85a32ebb [RPLS] Update for MR6
- FSP: Edge Platforms RPL-S IPU 2025.2 (0C.01.F7.20)
- Microcode: m_32_b0671_0000012e

Signed-off-by: samihahkasim <samihah.kasim@intel.com>
2025-04-16 14:33:35 +08:00
Chirag Vijay Kolhe 2535bb28cd [TGL] Cleanup: Remove unused pch pcr library
Tiger lake has unused local platform specific implementation of
pch pcr library.
As it is not getting used, removed files belonging to this library.

Signed-off-by: Chirag Vijay Kolhe <chirag.vijay.kolhe@intel.com>
2025-04-15 14:07:11 -07:00
Vincent Chen e9b3043b04 feat: [RPLP] Enable Rock Island board
- assign BoardID 0x1F
- add VBT binary
- add DLT file
- add stitch option -o rki
- verified features:
  * display: HDMI, DP, DP over Type C*2
  * Loader: OsLoader, UEFI payload
  * OS: Yocto, Ubuntu24.04, Win11
  * peripheral: UART0, power, reset, DDR5*2
                USB Type A*3, Ethernet*2, M.2 Key M
  * others: S3, Boot Guard, fwupdate

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2025-04-15 13:37:44 +08:00
Randy 94c73947f7 [MTL] The CPU package power is unable to meet the specified level
When set the POWER_CFG_DATA.TurboMode/EnableItbm/Eist = 1,
The 155HL CPU package power run on 35w only and can't reach PL1[45W] and PL2[115W].

Sync the ACPI table with this BIOS change:
  Change _CPC() to fix HWP malfunction in E-core

PM Verified on MTL-PS CRB/WIN11/PTAT with TurboMode = 1.

Signed-off-by: Randy <randy.lin@intel.com>
2025-04-14 21:36:42 -07:00
Guo Dong d48ada5da2 Add SMM rebase HOB
New UEFI payload depends on SBL to rebase SMM and reports SMM rebase information.
This patch build SMM rebase related HOB for UEFI payload.

SMM rebase memory is located at the end of SMRAM. and this patch also updated
SMM memory HOB.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2025-04-14 21:36:08 -07:00
Guo Dong 317c43386c Update SMM rebase support
Currently SBL supports SMM REBASE based on configuration.
1) When payload doesn't support SMM, SBL need enable SMM rebase.
   So SBL will rebase SMM to SMRAM and set SMRR to prevent SMRAM
   access out of SMM and prevent payload SMM driver dispatch.
2) When payload support SMM, SBL need disable SMM rebase.
   In this case SBL do nothing for SMM. Payload will do SMM
   rebase.

In new UEFI payload (after stable branch 202311), SMM relocation
was removed CPU SMM driver. To work with new UEFI payload, SMM
relocation is expected in SBL, but SMRR should not be set so that
SMM drivers in UEFI payload could be dispatched into SMRAM.

This patch adds a new SMM rebase configuration that it rebase SMM
but it doesn't set SMRR.
Currently SBL supports rebase AUTO setting based on payload. This
patch also add auto support.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2025-04-14 21:36:08 -07:00
Vincent Chen a72765cd4e [RPLP] Update for MR4
- FSP: Edge Platforms RPL-P IPU 2025.2 (0C.01.F7.20)
- Microcode: m_e0_b06a2_00004124
- VBT: 253
- platform version: SB_RPLP-1.4

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2025-04-14 13:53:41 +08:00