This commit adds support for PCIe resizable BARsupport.
The feature can be enabled by setting PcdResizableBarSupport
for the board build script and its disabled by default.
Signed-off-by: pastorcx <mariano-paulx.pastorcici@intel.com>
When no auth parameter is specified on the command line, gen_layout
chooses auth type based on provided key, but this does not get correctly
applied to the monolithic signing component because of an order of
operations issue.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
If ResetVector GDT is different from that loaded in Stage1A SecStartup()
then segment selectors need to be reloaded after GDT is updated.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Adding new Board Config item REMAP_STAGE1B to control remapping Stage1B
into permanent memory after FSP-M. Decouple this from ENABLE_FAST_BOOT
and STAGE1B_XIP. This makes it simpler to enable this remap when the
slight performance boost may be needed, and leave it disabled by default.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
1) Some FSP 2.4 implementations are non-conforming and use FSPM_ARCH_UPD
instead of FSPM_ARCH2_UPD as indicated by the specification. Logic is
changed to check FSPM UPD header revision for structure version instead
of FSP spec revision.
2) MultiPhase FSP PhaseIndex is one-based so loop comparisons need to take
this into account. Side effect is that the last phase may be missed. No
current platform FSP is utilizing this.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
length of external config data and hash keys extended to the TPM was
incorrect. This commit fixes this issue.
Signed-off-by: Antara Borwankar <antara.borwankar@intel.com>
This will increase time of Board PostMemoryInit hook and TempRamExit,
but improve the performance of PostTempRamExit hook, PreSiliconInit hook
and FSP-S.
In total, the boot time can be reduced by ~20ms.
Signed-off-by: Yi Li <yi1.li@intel.com>
Registering logical root bridges with no devices can cause unexpected
behavior for platforms that use _PCI_ENUM_BUS_SCAN_TYPE = "range", since
all empty buses in the range will be compared against the resource
allocation table entries.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Not all root bridges have a physical device at dev 0 func 0 of the root
bus, and this requirement prevents some platforms from being fully scanned.
From this point, PciEnumerationLib doesn't access the root bridge
configuration space at all, so this is an unnecessary check.
Instead, root bus scanning will continue without dev 0 func 0 present. If
no devices are found on the root bus, scanning will continue to the next
root bridge.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
This reverts commit 2f277eb9f1.
Due to entire binaries being dumped in eventlog, many event
getting skipped for space constraint. Hence reverting.
Signed-off-by: Antara Borwankar <antara.borwankar@intel.com>
The SBL logo is verified as part of Stage2 verification, so untrusted
logos won't be parsed, but it's still good to prevent dereferencing BMP
header pointers that may fall outside of BMP file.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
distutils is deprecated in Python 3.10 and 3.11.
And it is removed in Python 3.12. So remove the
dependency.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Update the FPDT header length to include the length
of boot records. This way we could easily get all the
boot records from dumped ACPI FPDT table.
Signed-off-by: Guo Dong <guo.dong@intel.com>
The MULTIBOOT_MODULE type indicates the container contains only
multiboot modules and their string without a bootable kernel. Similar
to the MULTIBOOT container type, the files in container should be
organized in pairs which contains a zero-teminated text for string
and the a module binary.
This type should only be used in Extra images when Normal image is in
multiboot/multiboot2 format.
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@intel.com>
In current implementation all FSP notification are sent in SBL.
When using universal UEFI payload with SMM enabled, it is expected
to send ReadyToBoot and EndOfFirmware event in payload.
This patch just skip the FSP notification in SBL. Universal UEFI
payload should make sure FSP notification would be sent.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Since # of PROCESSOR_LOCAL_APICs are
Madt Local Apic # is 1.
Madt X2 Local Apic # is 9.
Need to update # of structure type of X2Apic.
Signed-off-by: cshur <cs.hur@intel.com>
Added IgdOpRegionDefine 3.0 header file
Removed unsed IgdPlatformInfo in Stage2BoardInit file
TEST: Booted into Ubuntu and Windows
Signed-off-by: Kobe <kok.tong.ong@intel.com>
Currently the build tool always find the config data yaml file
from the brd_name path.
With this update, it will first search yaml file from
brd_name_override path, if yaml file could not be found, then
it will search yaml file from brd_name path.
And currently it would generate ConfigDataStruct.h and
ConfigDataDynamic.h in brd_name path. With this change, generate
them in board common path.
With this change, full config data could be in brd_name or in
brd_name_override path.
Signed-off-by: Guo Dong <guo.dong@intel.com>
ADL groups GPIO pins into different sets for different PCH series.
The current CfgData uses ADLS's GPIO group sets as the base, and
overwrites the GrpIdx fields via DLT files for other PCH series.
This results in two issues:
1. "CfgDataTool.py export" command failed to extract DLT files
from SBL image, since it cannot identify the proper group
index in CfgDataExt.bin from the base table in CfgDataInt.bin
2. When using ConfigEditor.py to configure the PadGroup field of
GPIO Payload Selection, it will map to a wrong group index.
This patch separates CfgDataDef.yaml for each of PCH series
- add _CFGDATA_DEF_FILE in BoardConfig.py
- add board extension yaml files for Adln, Adlp, Adls
* CfgDataDef*.yaml
* CfgData_Gpio_*.yaml
* CfgData_PayloadSelection_*.yaml
- assign an invalid/unique GrpIdx for the unused GPIO group
* e.g. 1F, 1E, ..
- adjust GrpIdx of CfgDataExt_Upx12.dlt based on Adlp
- revise the payload selection information in DLT files
This patch also fixes the issue:
- When ConfigEditor opens CfgDataDef.yaml more than once, the
config changes will not be caught by "Save Config Changes to
Delta File"
It is because the "info" argument of build_cfg_list() in
GenCfgData.py will retain its value in the lifetime of
ConfigEditor, and the offset will overflow. So need to reset
the offset for a fresh load_yaml().
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
Add support for resiliency on MTL-P
Increase the TCO timeout for all platforms to accomodate MTL-P
Clear 1st TCO timeout status bit along with 2nd TCO timeout status bit
Clear TCO timeout before changing it
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
Pastorcici, Mariano-paulX
bejeanmo
bejeanmo
Antara Borwankar
Guo Dong
Yi Li
Chirag Vijay Kolhe
Jiaqing Zhao
cshur
koktong-ong
Vincent Chen
Sean McGinn