mirror of
https://github.com/Dasharo/slimbootloader.git
synced 2026-06-14 04:16:15 -07:00
[CML] Cleanup: Remove unused pch p2sb library
Comet lake has unused local platform specific implementation of pch p2sb library. As it is not getting used, removed files belonging to this library. Signed-off-by: Chirag Vijay Kolhe <chirag.vijay.kolhe@intel.com>
This commit is contained in:
Chirag Vijay Kolhe
committed by
Guo Dong
Guo Dong
parent
b566eadb94
commit
df7236b08f
@@ -150,7 +150,6 @@ class Board(BaseBoard):
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'PchSpiLib|Silicon/CommonSocPkg/Library/PchSpiLib/PchSpiLib.inf',
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'PchSbiAccessLib|Silicon/CommonSocPkg/Library/PchSbiAccessLib/PchSbiAccessLib.inf',
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'PchInfoLib|Silicon/$(SILICON_PKG_NAME)/Library/PchInfoLib/PchInfoLib.inf',
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'PchP2sbLib|Silicon/$(SILICON_PKG_NAME)/Library/PchP2sbLib/PchP2sbLib.inf',
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'PchSerialIoLib|Silicon/$(SILICON_PKG_NAME)/Library/PchSerialIoLib/PchSerialIoLib.inf',
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'GpioLib|Silicon/$(SILICON_PKG_NAME)/Library/GpioLib/GpioLib.inf',
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'IgdOpRegionLib|Silicon/CommonSocPkg/Library/IgdOpRegionLib/IgdOpRegionLib.inf',
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@@ -150,7 +150,6 @@ class Board(BaseBoard):
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'PchSpiLib|Silicon/CommonSocPkg/Library/PchSpiLib/PchSpiLib.inf',
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'PchSbiAccessLib|Silicon/CommonSocPkg/Library/PchSbiAccessLib/PchSbiAccessLib.inf',
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'PchInfoLib|Silicon/$(SILICON_PKG_NAME)/Library/PchInfoLib/PchInfoLib.inf',
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'PchP2sbLib|Silicon/$(SILICON_PKG_NAME)/Library/PchP2sbLib/PchP2sbLib.inf',
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'PchSerialIoLib|Silicon/$(SILICON_PKG_NAME)/Library/PchSerialIoLib/PchSerialIoLib.inf',
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'GpioLib|Silicon/$(SILICON_PKG_NAME)/Library/GpioLib/GpioLib.inf',
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'IgdOpRegionLib|Silicon/CommonSocPkg/Library/IgdOpRegionLib/IgdOpRegionLib.inf',
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@@ -1,325 +0,0 @@
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/** @file
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PCH P2sb access lib.
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All function in this library is available for PEI, DXE, and SMM,
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But do not support UEFI RUNTIME environment call.
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Copyright (c) 2014-2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Specification Reference:
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**/
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#include <Base.h>
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#include <Uefi/UefiBaseType.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BootloaderCommonLib.h>
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#include <PchAccess.h>
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/**
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Get P2SB pci configuration register. (This is internal function)
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It returns register at Offset of P2SB controller and size in 1byte/2bytes/4bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[in] Size Size for read. Must be 1 or 2 or 4.
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@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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STATIC
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EFI_STATUS
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PchP2sbCfgGet (
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IN UINTN Offset,
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IN UINTN Size,
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OUT UINT32 *OutData
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)
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{
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UINTN P2sbBase;
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BOOLEAN DevicePresent;
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if ((Offset > 255) ||
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((Offset & (Size - 1)) != 0)) {
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DEBUG ((DEBUG_ERROR, "PchP2sbCfgGet error. Invalid Offset: %x Size: %x", Offset, Size));
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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P2sbBase = MM_PCI_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_P2SB, PCI_FUNCTION_NUMBER_PCH_P2SB, 0);
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DevicePresent = (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
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if (!DevicePresent) {
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MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, 0);
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}
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ASSERT (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
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switch (Size) {
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case 4:
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*(UINT32*) OutData = MmioRead32 (P2sbBase + Offset);
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break;
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case 2:
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*(UINT16*) OutData = MmioRead16 (P2sbBase + Offset);
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break;
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case 1:
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*(UINT8*) OutData = MmioRead8 (P2sbBase + Offset);
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break;
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default:
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break;
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}
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if (!DevicePresent) {
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MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, BIT0);
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}
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return EFI_SUCCESS;
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}
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/**
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Get P2SB pci configuration register.
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It returns register at Offset of P2SB controller and size in 4bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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EFI_STATUS
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PchP2sbCfgGet32 (
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IN UINTN Offset,
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OUT UINT32 *OutData
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)
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{
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return PchP2sbCfgGet (Offset, 4, (UINT32*) OutData);
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}
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/**
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Get P2SB pci configuration register.
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It returns register at Offset of P2SB controller and size in 2bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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EFI_STATUS
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PchP2sbCfgGet16 (
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IN UINTN Offset,
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OUT UINT16 *OutData
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)
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{
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return PchP2sbCfgGet (Offset, 2, (UINT32*) OutData);
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}
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/**
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Get P2SB pci configuration register.
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It returns register at Offset of P2SB controller and size in 1byte.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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EFI_STATUS
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PchP2sbCfgGet8 (
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IN UINTN Offset,
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OUT UINT8 *OutData
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)
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{
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return PchP2sbCfgGet (Offset, 1, (UINT32*) OutData);
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}
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/**
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Set P2SB pci configuration register. (This is internal function)
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It programs register at Offset of P2SB controller and size in 1byte/2bytes/4bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[in] Size Size for read. Must be 1 or 2 or 4.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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STATIC
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EFI_STATUS
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PchP2sbCfgSet (
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IN UINTN Offset,
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IN UINTN Size,
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IN UINT32 AndData,
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IN UINT32 OrData
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)
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{
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UINTN P2sbBase;
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BOOLEAN DevicePresent;
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UINT32 Data32;
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if ((Offset > 255) ||
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((Offset & (Size - 1)) != 0)) {
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DEBUG ((DEBUG_ERROR, "PchP2sbCfgSet error. Invalid Offset: %x Size: %x", Offset, Size));
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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Data32 = 0;
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P2sbBase = MM_PCI_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_P2SB, PCI_FUNCTION_NUMBER_PCH_P2SB, 0);
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DevicePresent = (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
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if (!DevicePresent) {
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MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, 0);
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}
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ASSERT (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
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switch (Size) {
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case 4:
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Data32 = MmioRead32 (P2sbBase + Offset);
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Data32 &= AndData;
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Data32 |= OrData;
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MmioWrite32 (P2sbBase + Offset, (UINT32) Data32);
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break;
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case 2:
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Data32 = MmioRead16 (P2sbBase + Offset);
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Data32 &= AndData;
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Data32 |= OrData;
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MmioWrite16 (P2sbBase + Offset, (UINT16) Data32);
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break;
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case 1:
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Data32 = MmioRead8 (P2sbBase + Offset);
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Data32 &= AndData;
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Data32 |= OrData;
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MmioWrite8 (P2sbBase + Offset, (UINT8) Data32);
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break;
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default:
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break;
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}
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if (!DevicePresent) {
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MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, BIT0);
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}
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return EFI_SUCCESS;
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}
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/**
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Set P2SB pci configuration register.
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It programs register at Offset of P2SB controller and size in 4bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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EFI_STATUS
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PchP2sbCfgSet32 (
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IN UINTN Offset,
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IN UINT32 AndData,
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IN UINT32 OrData
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)
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{
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return PchP2sbCfgSet (Offset, 4, AndData, OrData);
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}
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/**
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Set P2SB pci configuration register.
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It programs register at Offset of P2SB controller and size in 2bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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EFI_STATUS
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PchP2sbCfgSet16 (
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IN UINTN Offset,
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
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return PchP2sbCfgSet (Offset, 2, AndData, OrData);
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}
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/**
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Set P2SB pci configuration register.
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It programs register at Offset of P2SB controller and size in 1bytes.
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The Offset should not exceed 255 and must be aligned with size.
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This function will be unavailable after P2SB is hidden by PSF.
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@param[in] Offset Register offset of P2SB controller.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval EFI_SUCCESS Successfully completed.
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@retval EFI_INVALID_PARAMETER Invalid offset passed.
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**/
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EFI_STATUS
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PchP2sbCfgSet8 (
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IN UINTN Offset,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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return PchP2sbCfgSet (Offset, 1, AndData, OrData);
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}
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/**
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Hide P2SB device.
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@param[in] P2sbBase Pci base address of P2SB controller.
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@retval EFI_SUCCESS Always return success.
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**/
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EFI_STATUS
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PchHideP2sb (
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IN UINTN P2sbBase
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)
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{
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MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, BIT0);
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return EFI_SUCCESS;
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}
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/**
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Reveal P2SB device.
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Also return the original P2SB status which is for Hidding P2SB or not after.
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If OrgStatus is not NULL, then TRUE means P2SB is unhidden,
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and FALSE means P2SB is hidden originally.
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@param[in] P2sbBase Pci base address of P2SB controller.
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@param[out] OrgStatus Original P2SB hidding/unhidden status
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@retval EFI_SUCCESS Always return success.
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**/
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EFI_STATUS
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PchRevealP2sb (
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IN UINTN P2sbBase,
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OUT BOOLEAN *OrgStatus
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)
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{
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BOOLEAN DevicePresent;
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DevicePresent = (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
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if (OrgStatus != NULL) {
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*OrgStatus = DevicePresent;
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}
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if (!DevicePresent) {
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MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, 0);
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}
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return EFI_SUCCESS;
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}
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@@ -1,50 +0,0 @@
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## @file
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#
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#@copyright
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# Copyright (c) 2008 - 2015 Intel Corporation. All rights reserved
|
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# This software and associated documentation (if any) is furnished
|
||||
# under a license and may only be used or copied in accordance
|
||||
# with the terms of the license. Except as permitted by the
|
||||
# license, no part of this software or documentation may be
|
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# reproduced, stored in a retrieval system, or transmitted in any
|
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# form or by any means without the express written consent of
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# Intel Corporation.
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# This file contains a 'Sample Driver' and is licensed as such
|
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# under the terms of your license agreement with Intel or your
|
||||
# vendor. This file may be modified by the user, subject to
|
||||
# the additional terms of the license agreement.
|
||||
#
|
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#@par Specification Reference:
|
||||
#
|
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##
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[Defines]
|
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INF_VERSION = 0x00010005
|
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BASE_NAME = PchP2sbLib
|
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FILE_GUID = 11112DBF-6AA7-4A61-8C6F-193E91C0499A
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MODULE_TYPE = BASE
|
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VERSION_STRING = 1.0
|
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LIBRARY_CLASS = PchP2sbLib
|
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|
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#
|
||||
# The following information is for reference only and not required by the build tools.
|
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#
|
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# VALID_ARCHITECTURES = IA32 X64 IPF
|
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#
|
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|
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[Sources]
|
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PchP2sbLib.c
|
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|
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[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
BootloaderCorePkg/BootloaderCorePkg.dec
|
||||
BootloaderCommonPkg/BootloaderCommonPkg.dec
|
||||
Silicon/CometlakePkg/CometlakePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
BaseLib
|
||||
IoLib
|
||||
PcdLib
|
||||
|
||||
[Pcd]
|
||||
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
|
||||
@@ -1,323 +0,0 @@
|
||||
/** @file
|
||||
PCH P2sb access lib.
|
||||
All function in this library is available for PEI, DXE, and SMM,
|
||||
But do not support UEFI RUNTIME environment call.
|
||||
|
||||
Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
**/
|
||||
|
||||
#include <Base.h>
|
||||
#include <Uefi/UefiBaseType.h>
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/BootloaderCommonLib.h>
|
||||
#include <PchAccess.h>
|
||||
|
||||
/**
|
||||
Get P2SB pci configuration register. (This is internal function)
|
||||
It returns register at Offset of P2SB controller and size in 1byte/2bytes/4bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[in] Size Size for read. Must be 1 or 2 or 4.
|
||||
@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
PchP2sbCfgGet (
|
||||
IN UINTN Offset,
|
||||
IN UINTN Size,
|
||||
OUT UINT32 *OutData
|
||||
)
|
||||
{
|
||||
UINTN P2sbBase;
|
||||
BOOLEAN DevicePresent;
|
||||
|
||||
if ((Offset > 255) ||
|
||||
((Offset & (Size - 1)) != 0)) {
|
||||
DEBUG ((DEBUG_ERROR, "PchP2sbCfgGet error. Invalid Offset: %x Size: %x", Offset, Size));
|
||||
ASSERT (FALSE);
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
P2sbBase = MM_PCI_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_P2SB, PCI_FUNCTION_NUMBER_PCH_P2SB, 0);
|
||||
DevicePresent = (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
|
||||
if (!DevicePresent) {
|
||||
MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, 0);
|
||||
}
|
||||
ASSERT (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
|
||||
|
||||
switch (Size) {
|
||||
case 4:
|
||||
*(UINT32*) OutData = MmioRead32 (P2sbBase + Offset);
|
||||
break;
|
||||
case 2:
|
||||
*(UINT16*) OutData = MmioRead16 (P2sbBase + Offset);
|
||||
break;
|
||||
case 1:
|
||||
*(UINT8*) OutData = MmioRead8 (P2sbBase + Offset);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (!DevicePresent) {
|
||||
MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, BIT0);
|
||||
}
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Get P2SB pci configuration register.
|
||||
It returns register at Offset of P2SB controller and size in 4bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchP2sbCfgGet32 (
|
||||
IN UINTN Offset,
|
||||
OUT UINT32 *OutData
|
||||
)
|
||||
{
|
||||
return PchP2sbCfgGet (Offset, 4, (UINT32*) OutData);
|
||||
}
|
||||
|
||||
/**
|
||||
Get P2SB pci configuration register.
|
||||
It returns register at Offset of P2SB controller and size in 2bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchP2sbCfgGet16 (
|
||||
IN UINTN Offset,
|
||||
OUT UINT16 *OutData
|
||||
)
|
||||
{
|
||||
return PchP2sbCfgGet (Offset, 2, (UINT32*) OutData);
|
||||
}
|
||||
|
||||
/**
|
||||
Get P2SB pci configuration register.
|
||||
It returns register at Offset of P2SB controller and size in 1byte.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[out] OutData Buffer of Output Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchP2sbCfgGet8 (
|
||||
IN UINTN Offset,
|
||||
OUT UINT8 *OutData
|
||||
)
|
||||
{
|
||||
return PchP2sbCfgGet (Offset, 1, (UINT32*) OutData);
|
||||
}
|
||||
|
||||
/**
|
||||
Set P2SB pci configuration register. (This is internal function)
|
||||
It programs register at Offset of P2SB controller and size in 1byte/2bytes/4bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[in] Size Size for read. Must be 1 or 2 or 4.
|
||||
@param[in] AndData AND Data. Must be the same size as Size parameter.
|
||||
@param[in] OrData OR Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
PchP2sbCfgSet (
|
||||
IN UINTN Offset,
|
||||
IN UINTN Size,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
UINTN P2sbBase;
|
||||
BOOLEAN DevicePresent;
|
||||
UINT32 Data32;
|
||||
|
||||
if ((Offset > 255) ||
|
||||
((Offset & (Size - 1)) != 0)) {
|
||||
DEBUG ((DEBUG_ERROR, "PchP2sbCfgSet error. Invalid Offset: %x Size: %x", Offset, Size));
|
||||
ASSERT (FALSE);
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
Data32 = 0;
|
||||
|
||||
P2sbBase = MM_PCI_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_P2SB, PCI_FUNCTION_NUMBER_PCH_P2SB, 0);
|
||||
DevicePresent = (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
|
||||
if (!DevicePresent) {
|
||||
MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, 0);
|
||||
}
|
||||
ASSERT (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
|
||||
|
||||
switch (Size) {
|
||||
case 4:
|
||||
Data32 = MmioRead32 (P2sbBase + Offset);
|
||||
Data32 &= AndData;
|
||||
Data32 |= OrData;
|
||||
MmioWrite32 (P2sbBase + Offset, (UINT32) Data32);
|
||||
break;
|
||||
case 2:
|
||||
Data32 = MmioRead16 (P2sbBase + Offset);
|
||||
Data32 &= AndData;
|
||||
Data32 |= OrData;
|
||||
MmioWrite16 (P2sbBase + Offset, (UINT16) Data32);
|
||||
break;
|
||||
case 1:
|
||||
Data32 = MmioRead8 (P2sbBase + Offset);
|
||||
Data32 &= AndData;
|
||||
Data32 |= OrData;
|
||||
MmioWrite8 (P2sbBase + Offset, (UINT8) Data32);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (!DevicePresent) {
|
||||
MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, BIT0);
|
||||
}
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Set P2SB pci configuration register.
|
||||
It programs register at Offset of P2SB controller and size in 4bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[in] AndData AND Data. Must be the same size as Size parameter.
|
||||
@param[in] OrData OR Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchP2sbCfgSet32 (
|
||||
IN UINTN Offset,
|
||||
IN UINT32 AndData,
|
||||
IN UINT32 OrData
|
||||
)
|
||||
{
|
||||
return PchP2sbCfgSet (Offset, 4, AndData, OrData);
|
||||
}
|
||||
|
||||
/**
|
||||
Set P2SB pci configuration register.
|
||||
It programs register at Offset of P2SB controller and size in 2bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[in] AndData AND Data. Must be the same size as Size parameter.
|
||||
@param[in] OrData OR Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchP2sbCfgSet16 (
|
||||
IN UINTN Offset,
|
||||
IN UINT16 AndData,
|
||||
IN UINT16 OrData
|
||||
)
|
||||
{
|
||||
return PchP2sbCfgSet (Offset, 2, AndData, OrData);
|
||||
}
|
||||
|
||||
/**
|
||||
Set P2SB pci configuration register.
|
||||
It programs register at Offset of P2SB controller and size in 1bytes.
|
||||
The Offset should not exceed 255 and must be aligned with size.
|
||||
This function will be unavailable after P2SB is hidden by PSF.
|
||||
|
||||
@param[in] Offset Register offset of P2SB controller.
|
||||
@param[in] AndData AND Data. Must be the same size as Size parameter.
|
||||
@param[in] OrData OR Data. Must be the same size as Size parameter.
|
||||
|
||||
@retval EFI_SUCCESS Successfully completed.
|
||||
@retval EFI_INVALID_PARAMETER Invalid offset passed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchP2sbCfgSet8 (
|
||||
IN UINTN Offset,
|
||||
IN UINT8 AndData,
|
||||
IN UINT8 OrData
|
||||
)
|
||||
{
|
||||
return PchP2sbCfgSet (Offset, 1, AndData, OrData);
|
||||
}
|
||||
|
||||
/**
|
||||
Hide P2SB device.
|
||||
|
||||
@param[in] P2sbBase Pci base address of P2SB controller.
|
||||
|
||||
@retval EFI_SUCCESS Always return success.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchHideP2sb (
|
||||
IN UINTN P2sbBase
|
||||
)
|
||||
{
|
||||
MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, BIT0);
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Reveal P2SB device.
|
||||
Also return the original P2SB status which is for Hidding P2SB or not after.
|
||||
If OrgStatus is not NULL, then TRUE means P2SB is unhidden,
|
||||
and FALSE means P2SB is hidden originally.
|
||||
|
||||
@param[in] P2sbBase Pci base address of P2SB controller.
|
||||
@param[out] OrgStatus Original P2SB hidding/unhidden status
|
||||
|
||||
@retval EFI_SUCCESS Always return success.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PchRevealP2sb (
|
||||
IN UINTN P2sbBase,
|
||||
OUT BOOLEAN *OrgStatus
|
||||
)
|
||||
{
|
||||
BOOLEAN DevicePresent;
|
||||
|
||||
DevicePresent = (MmioRead16 (P2sbBase + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
|
||||
if (OrgStatus != NULL) {
|
||||
*OrgStatus = DevicePresent;
|
||||
}
|
||||
if (!DevicePresent) {
|
||||
MmioWrite8 (P2sbBase + R_P2SB_CFG_E0 + 1, 0);
|
||||
}
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
@@ -1,50 +0,0 @@
|
||||
## @file
|
||||
#
|
||||
#@copyright
|
||||
# Copyright (c) 2008 - 2015 Intel Corporation. All rights reserved
|
||||
# This software and associated documentation (if any) is furnished
|
||||
# under a license and may only be used or copied in accordance
|
||||
# with the terms of the license. Except as permitted by the
|
||||
# license, no part of this software or documentation may be
|
||||
# reproduced, stored in a retrieval system, or transmitted in any
|
||||
# form or by any means without the express written consent of
|
||||
# Intel Corporation.
|
||||
# This file contains a 'Sample Driver' and is licensed as such
|
||||
# under the terms of your license agreement with Intel or your
|
||||
# vendor. This file may be modified by the user, subject to
|
||||
# the additional terms of the license agreement.
|
||||
#
|
||||
#@par Specification Reference:
|
||||
#
|
||||
##
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = PchP2sbLib
|
||||
FILE_GUID = 11112DBF-6AA7-4A61-8C6F-193E91C0499A
|
||||
MODULE_TYPE = BASE
|
||||
VERSION_STRING = 1.0
|
||||
LIBRARY_CLASS = PchP2sbLib
|
||||
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF
|
||||
#
|
||||
|
||||
[Sources]
|
||||
PchP2sbLib.c
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
BootloaderCorePkg/BootloaderCorePkg.dec
|
||||
BootloaderCommonPkg/BootloaderCommonPkg.dec
|
||||
Silicon/CometlakevPkg/CometlakevPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
BaseLib
|
||||
IoLib
|
||||
PcdLib
|
||||
|
||||
[Pcd]
|
||||
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
|
||||
Reference in New Issue
Block a user