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[TGL] Fix boot issue and enable SMM rebase

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With latest core code change, it would boot hang.
So need set SMM related PCD early and update platform
to enable SMM rebase.

Signed-off-by: Guo Dong <guo.dong@intel.com>
This commit is contained in:
Guo Dong
2021-04-13 17:19:48 -07:00
parent 8659c29ac0
commit d14b67caff
3 changed files with 14 additions and 4 deletions
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Platform/TigerlakeBoardPkg/BoardConfig.py
+2
View File
@@ -61,6 +61,8 @@ class Board(BaseBoard):
self.ENABLE_FRAMEBUFFER_INIT = 1
self.ENABLE_FAST_BOOT = 0
self.HAVE_FUSA = 1
# 0: Disable 1: Enable 2: Auto (disable for UEFI payload, enable for others)
self.ENABLE_SMM_REBASE = 2
if self.HAVE_FIT_TABLE:
self.FIT_ENTRY_MAX_NUM = 10
Platform/TigerlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c
+11 -4
View File
@@ -874,6 +874,8 @@ BoardInit (
UINT32 RgnBase;
UINT32 RgnSize;
UINT32 Length;
UINT32 TsegBase;
UINT32 TsegSize;
EFI_PEI_GRAPHICS_INFO_HOB *FspGfxHob;
LOADER_GLOBAL_DATA *LdrGlobal;
SILICON_CFG_DATA *SiCfgData;
@@ -924,7 +926,13 @@ BoardInit (
Status = PcdSet32S (PcdAcpiTableTemplatePtr, (UINT32)(UINTN)mPlatformAcpiTables);
break;
case PostSiliconInit:
Status = PcdSet32S (PcdSmramTsegBase, MmioRead32 (TO_MM_PCI_ADDRESS (0x00000000) + R_SA_TSEGMB) & ~0xF);
// Set TSEG base/size PCD
TsegBase = MmioRead32 (TO_MM_PCI_ADDRESS (0x00000000) + R_SA_TSEGMB) & ~0xF;
TsegSize = MmioRead32 (TO_MM_PCI_ADDRESS (0x00000000) + R_SA_BGSM) & ~0xF;
TsegSize -= TsegBase;
(VOID) PcdSet32S (PcdSmramTsegBase, TsegBase);
(VOID) PcdSet32S (PcdSmramTsegSize, (UINT32)TsegSize);
if (PcdGetBool (PcdFramebufferInitEnabled)) {
LdrGlobal = (LOADER_GLOBAL_DATA *)GetLoaderGlobalDataPointer();
FspGfxHob = (EFI_PEI_GRAPHICS_INFO_HOB *)GetGuidHobData (LdrGlobal->FspHobList, &Length, &gEfiGraphicsInfoHobGuid);
@@ -1849,9 +1857,8 @@ UpdateSmmInfo (
if (LdrSmmInfo == NULL) {
return;
}
LdrSmmInfo->SmmBase = MmioRead32 (TO_MM_PCI_ADDRESS (0x00000000) + R_SA_TSEGMB) & ~0xF;
LdrSmmInfo->SmmSize = MmioRead32 (TO_MM_PCI_ADDRESS (0x00000000) + R_SA_BGSM) & ~0xF;
LdrSmmInfo->SmmSize -= LdrSmmInfo->SmmBase;
LdrSmmInfo->SmmBase = PcdGet32 (PcdSmramTsegBase);
LdrSmmInfo->SmmSize = PcdGet32 (PcdSmramTsegSize);
LdrSmmInfo->Flags = SMM_FLAGS_4KB_COMMUNICATION;
DEBUG ((DEBUG_INFO, "SmmRamBase = 0x%x, SmmRamSize = 0x%x\n", LdrSmmInfo->SmmBase, LdrSmmInfo->SmmSize));
Platform/TigerlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.inf
+1
View File
@@ -96,6 +96,7 @@
gPlatformModuleTokenSpaceGuid.PcdSmbiosTablesBase
gPlatformModuleTokenSpaceGuid.PcdSmbiosEnabled
gPlatformModuleTokenSpaceGuid.PcdSmramTsegBase
gPlatformModuleTokenSpaceGuid.PcdSmramTsegSize
gPlatformModuleTokenSpaceGuid.PcdSmmRebaseMode
gPlatformModuleTokenSpaceGuid.PcdPsdBiosEnabled
gPlatformTigerLakeTokenSpaceGuid.PcdFusaEnabled