[UPX] Fix incorrect GPIO config issue (#604)

This patch fixed incorrect GPIO config for A07 on UP Xtreme board.
SBL configured GPIO A7 as native function 1 (PIRQA). However, the
board used it as an output control pin. The incorrect configuration
caused kernel interrupt issue reported by issue #603. This patch
fixed issue #603.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This commit is contained in:
Maurice Ma
2020-03-25 08:17:57 -07:00
committed by GitHub
parent 655a0758b5
commit 9be4dfc93f
@@ -120,7 +120,7 @@ GPIO_CFG_DATA.GpioPinConfig0_GPP_A05 | 0x0350A383
GPIO_CFG_DATA.GpioPinConfig1_GPP_A05 | 0x00052001
GPIO_CFG_DATA.GpioPinConfig0_GPP_A06 | 0x0350A383
GPIO_CFG_DATA.GpioPinConfig1_GPP_A06 | 0x00062001
GPIO_CFG_DATA.GpioPinConfig0_GPP_A07 | 0x0350A383
GPIO_CFG_DATA.GpioPinConfig0_GPP_A07 | 0x0350A281
GPIO_CFG_DATA.GpioPinConfig1_GPP_A07 | 0x00072001
GPIO_CFG_DATA.GpioPinConfig0_GPP_A08 | 0x0350A583
GPIO_CFG_DATA.GpioPinConfig1_GPP_A08 | 0x00082001