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191
_sources/supported-hardware/arl-rvp.rst.txt
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191
_sources/supported-hardware/arl-rvp.rst.txt
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.. arrow-lake-rvp:
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Arrow Lake Platforms
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-----------------------
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.. note:: 15th Generation Intel\ |reg| Core\ |trade| Processor, formally known as |ARL| family.
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Supported Boards
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^^^^^^^^^^^^^^^^^^^^^
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|SPN| supports various platforms corresponding to |ARL|-H , |ARL|-U and |ARL|-S.
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Each |ARL| board is assigned with a unique platform ID.
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+-------------------------+---------------+----------------------+---------------+---------------+
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| Board | Platform ID | SPI Programmer | UART | PLAT |
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+-------------------------+---------------+----------------------+---------------+---------------+
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| |ARLHU| DDR5 RVP | 0x0018 | J1G2 | J9B2 | arlh / arlu |
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+-------------------------+---------------+----------------------+---------------+---------------+
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| |ARLHU| DDR5 CRB | 0x001A | J3H2 | J7A1 | arlh / arlu |
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+-------------------------+---------------+----------------------+---------------+---------------+
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| |ARLHU| LPDDR5 | 0x0019 | J1G2 | J9B2 | arlh / arlu |
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+-------------------------+---------------+----------------------+---------------+---------------+
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| |ARLS| DDR5 RVP S02 | 0x0017 | J2B4 | J6J3 | arls |
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+-------------------------+---------------+----------------------+---------------+---------------+
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| |ARLS| DDR5 RVP S03 | 0x0016 | J122198 | J6J3 | arls |
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+-------------------------+---------------+----------------------+---------------+---------------+
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| |ARLS| DDR5 RVP S04 | 0x0015 |Flash on SPI Socket | J6J3 | arls |
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+-------------------------+---------------+----------------------+---------------+---------------+
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Debug UART
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^^^^^^^^^^^
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For |ARL| platforms, serial port connector location can be found from the above table for each supported target board.
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.. note:: Configure host PuTTY or minicom to 115200bps, 8N1, no hardware flow control.
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Building
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^^^^^^^^^^
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To build |SPN| for any |ARL| platform::
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python BuildLoader.py build <PLAT>
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<PLAT> = arlh / arlu / arls
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Note: The output images are generated under ``Outputs`` directory.
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Stitching
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^^^^^^^^^^
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1. Gather |ARL| IFWI firmware image
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Users can either download the full IFWI image if the IFWI image release is available or read the existing IFWI image on the board using SPI programmer.
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This image contains additional firmware ingredients that are required boot on |ARL|.
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.. note::
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``StitchLoader.py`` currently does not support stitching with boot guard feature **enabled**.
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To stitch with Boot Guard enabled, please use ``StitchIfwi.py``.
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2. Stitch |SPN| images into downloaded BIOS image::
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python Platform/ArrowlakeBoardPkg/Script/StitchLoader.py -i <BIOS_IMAGE_NAME> -s Outputs/<plat>/SlimBootloader.bin -o <SBL_IFWI_IMAGE_NAME>
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where -i = Input file, -o = Output file, plat = arlh, arlu or arls
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For example, to stitch |SPN| IFWI image ``sbl_arlh_ifwi.bin`` from |ARLH| downloaded firmware images::
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python Platform/ArrowlakeBoardPkg/Script/StitchLoader.py -i xxxx.bin -s Outputs/arlh/SlimBootloader.bin -o sbl_arlh_ifwi.bin
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For more details on stitch tool, see :ref:`stitch-tool` on how to stitch the IFWI image with |SPN|.
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Flashing
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^^^^^^^^^
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Flash the generated ``sbl_arlh_ifwi.bin`` to the target board using a DediProg SF100 or SF600 programmer.
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.. note:: Refer the table above to identify the connector on the target board for SPI flash programmer. When using such device, please ensure:
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#. The alignment/polarity when connecting Dediprog to the board.
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#. The power to the board is turned **off** while the programmer is connected (even when not in use).
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#. The programmer is set to update the flash from offset 0x0.
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Capsule image for |ARL|
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^^^^^^^^^^^^^^^^^^^^^^^^^^
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The Slimbootloader.bin image generated from the build steps above can be used to create a capsule image.
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Please refer to :ref:`build-tool` on generating |SPN| image.
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For all |ARL| platforms, the below command can be used::
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python ./BootloaderCorePkg/Tools/GenCapsuleFirmware.py -p BIOS Outputs/<plat>/SlimBootloader.bin -k <Keys> -o FwuImage.bin
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For more details on generating capsule image, please refer :ref:`generate-capsule`.
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Triggering Firmware Update
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^^^^^^^^^^^^^^^^^^^^^^^^^^^
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|SPN| for |ARL| uses BIT16 of PMC I/O register (Over-Clocking WDT Control (OC_WDT_CTL) - Offset 54h) to trigger firmware update. When BIT16 is set, |SPN| will set the boot mode to FLASH_UPDATE.
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Please refer to :ref:`firmware-update` on how to trigger firmware update flow.
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Below is an example:
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To trigger firmware update in |SPN| shell:
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1. Copy ``FwuImage.bin`` into root directory on FAT partition of a USB key
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2. Boot and press any key to enter |SPN| shell
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3. Type command ``fwupdate`` from shell
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|SPN| will reset the platform and initiate firmware update flow. The platform will reset *multiple* times to complete the update process.
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A sample boot messages from console::
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Shell> fwupdate
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...
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============= Intel Slim Bootloader STAGE1A =============
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...
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============= Intel Slim Bootloader STAGE1B =============
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...
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BOOT: BP0
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MODE: 18
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...
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============= Intel Slim Bootloader STAGE2 =============
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...
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Jump to payload
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...
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Starting Firmware Update
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...
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=================Read Capsule Image==============
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...
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................
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Finished 1%
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...
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Finished 99%
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...
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...
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Reset required to proceed with the firmware update.
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============= Intel Slim Bootloader STAGE1A =============
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...
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============= Intel Slim Bootloader STAGE1B =============
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...
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BOOT: BP1
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MODE: 18
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...
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============= Intel Slim Bootloader STAGE2 =============
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...
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=================Read Capsule Image==============
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...
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................
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Finished 1%
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...
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Finished 99%
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Updating 0x002B1000, Size:0x0A000
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...............
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Finished 100%
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Set next FWU state: 0x7C
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Firmware Update status updated to reserved region
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Set next FWU state: 0x77
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Reset required to proceed with the firmware update.
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...
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==================== OS Loader ====================
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Starting Kernel ...
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Booting Yocto Linux
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^^^^^^^^^^^^^^^^^^^^^
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You may need to change boot options to boot from USB. See :ref:`change-boot-options`.
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1. Download Yocto Linux
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2. Create bootable USB key. For example: In Windows, Rufus can be used. In Linux, etcher app can be used.
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3. Boot the bootable OS image from USB key on the board.
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See :ref:`dynamic-platform-id` for more details.
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To customize board configurations in ``*.dlt`` file, make sure to specify ``PlatformId`` to the corresponding values for the board.
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See :ref:`configuration-tool` for more details.
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@@ -337,7 +337,7 @@ function to retrieve the location.</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -204,7 +204,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -242,7 +242,7 @@ to by the Firmware Performance Data Table (FPDT). Refer to ACPI Specification fo
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -142,7 +142,7 @@ and can also load the boot image from a raw partition using the LBA number.</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -463,7 +463,7 @@ components inside it</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -520,7 +520,7 @@ for GPP_A3, and GPP_A4</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -153,7 +153,7 @@ and agrees to them.</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -434,7 +434,7 @@ status. If the breakpoint is set properly, then it should as below:</p></li>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -335,7 +335,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -220,7 +220,7 @@ below image, 0x3f8000 is the LBA offset of Container image.</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -287,7 +287,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -142,7 +142,7 @@ newer Intel silicons.</p>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -239,7 +239,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -152,7 +152,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -190,7 +190,7 @@ for verbosity. One can control debug messages in multiple ways by modifying the
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -301,7 +301,7 @@ will be allocated to the payload.</p></li>
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -145,7 +145,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -178,7 +178,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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||||
<span class="lastupdated">Last updated on Mar 04, 2025.
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<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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@@ -162,7 +162,7 @@
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<div role="contentinfo">
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<p>© Copyright 2018 - 2025, Intel Corporation.
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||||
<span class="lastupdated">Last updated on Mar 04, 2025.
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||||
<span class="lastupdated">Last updated on Mar 06, 2025.
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</span></p>
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</div>
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