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53 lines
1.4 KiB
C
53 lines
1.4 KiB
C
/**
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* @file PciExpress.h
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* @brief OpenSIL PCIe access functions prototype
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*/
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/* Copyright 2021-2023 Advanced Micro Devices, Inc. All rights reserved. */
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// SPDX-License-Identifier: MIT
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#pragma once
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#define PCI_EXPRESS_BASE_ADDRESS 0xE0000000
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static inline uint8_t xUSLPciExpressRead8(void *Addr)
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{
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return *((volatile uint8_t *)Addr + PCI_EXPRESS_BASE_ADDRESS);
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}
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static inline uint16_t xUSLPciExpressRead16(void *Addr)
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{
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return *((volatile uint16_t *)((uint8_t*)Addr + PCI_EXPRESS_BASE_ADDRESS));
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}
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static inline uint32_t xUSLPciExpressRead32(void *Addr)
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{
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return *((volatile uint32_t *)((uint8_t*)Addr + PCI_EXPRESS_BASE_ADDRESS));
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}
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static inline uint64_t xUSLPciExpressRead64(void *Addr)
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{
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return *((volatile uint64_t *)((uint8_t*)Addr + PCI_EXPRESS_BASE_ADDRESS));
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}
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static inline void xUSLPciExpressWrite8(void *Addr, uint8_t Value)
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{
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*((volatile uint8_t *)Addr + PCI_EXPRESS_BASE_ADDRESS) = Value;
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}
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static inline void xUSLPciExpressWrite16(void *Addr, uint16_t Value)
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{
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*((volatile uint16_t *)((uint8_t*)Addr + PCI_EXPRESS_BASE_ADDRESS)) = Value;
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}
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static inline void xUSLPciExpressWrite32(void *Addr, uint32_t Value)
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{
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*((volatile uint32_t *)((uint8_t*)Addr + PCI_EXPRESS_BASE_ADDRESS)) = Value;
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}
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static inline void xUSLPciExpressWrite64(void *Addr, uint64_t Value)
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{
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*((volatile uint64_t *)((uint8_t*)Addr + PCI_EXPRESS_BASE_ADDRESS)) = Value;
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}
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