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77 lines
3.5 KiB
C
77 lines
3.5 KiB
C
/**
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* @file Pci.h
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* @brief OpenSIL PCI access functions prototype
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*
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*/
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/* Copyright 2021-2023 Advanced Micro Devices, Inc. All rights reserved. */
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// SPDX-License-Identifier: MIT
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#pragma once
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#include "stdint.h"
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#define MAKE_SBDFO(Seg, Bus, Dev, Fun, Off) ((((uint32_t) (Seg)) << 28) | (((uint32_t) (Bus)) << 20) | \
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(((uint32_t)(Dev)) << 15) | (((uint32_t)(Fun)) << 12) | ((uint32_t)(Off)))
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#define ILLEGAL_SBDFO 0xFFFFFFFFul
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/// These width descriptors are used by xUSLPciRead to specify the data size
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typedef enum ACCESS_WIDTH {
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AccessWidthNone = 0, ///< dummy access width
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AccessWidth8 = 1, ///< Access width is 8 bits.
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AccessWidth16, ///< Access width is 16 bits.
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AccessWidth32, ///< Access width is 32 bits.
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AccessWidth64, ///< Access width is 64 bits.
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AccessS3SaveWidth8 = 0x81, ///< Save 8 bits data.
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AccessS3SaveWidth16, ///< Save 16 bits data.
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AccessS3SaveWidth32, ///< Save 32 bits data.
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AccessS3SaveWidth64, ///< Save 64 bits data.
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} ACCESS_WIDTH;
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/// Extended PCI address format
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typedef struct {
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uint32_t Register:12; ///< Register offset
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uint32_t Function:3; ///< Function number
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uint32_t Device:5; ///< Device number
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uint32_t Bus:8; ///< Bus number
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uint32_t Segment:4; ///< Segment
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} EXT_PCI_ADDR;
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/// Union type for PCI address
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typedef union _PCI_ADDR {
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uint32_t AddressValue; ///< Formal address
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EXT_PCI_ADDR Address; ///< Extended address
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} PCI_ADDR;
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#define PCI_LIB_ADDRESS(Bus,Device,Function,Register) \
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(((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
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uint8_t xUSLPciRead8 (uint32_t Address);
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void xUSLPciWrite8 (uint32_t Address, uint8_t Value);
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uint16_t xUSLPciRead16 (uint32_t Address);
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void xUSLPciWrite16 (uint32_t Address, uint16_t Value);
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uint32_t xUSLPciRead32 (uint32_t Address);
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void xUSLPciWrite32 (uint32_t Address, uint32_t Value);
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uint64_t xUSLPciRead64 (uint32_t Address);
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void xUSLPciWrite64 (uint32_t Address, uint64_t Value);
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void xUSLPciReadModifyWrite8(uint32_t Address, uint8_t AndMask, uint8_t OrMask);
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void xUSLPciReadModifyWrite16(uint32_t Address, uint16_t AndMask, uint16_t OrMask);
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void xUSLPciReadModifyWrite32(uint32_t Address, uint32_t AndMask, uint32_t OrMask);
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void xUSLIndirectPciRead32 (volatile uint32_t PciBase, uint32_t IndexAddress, uint32_t *Value);
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void xUSLIndirectPciWrite32 (volatile uint32_t PciBase, uint32_t IndexAddress, uint32_t Value);
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void xUSLPciRead(uint32_t Address, ACCESS_WIDTH Width, void *Value);
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void xUSLPciRMW(uint32_t Address, ACCESS_WIDTH Width, uint32_t Mask, uint32_t Value);
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void xUSLPciWrite (uint32_t Address, ACCESS_WIDTH Width, void *Value);
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/**********************************************************************************************************************
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* Declare macros here
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*
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*/
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#define PCI_LIB_ADDRESS(Bus,Device,Function,Register) \
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(((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
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#define PCI_HEADER_TYPE_REG (0x0E)
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#define MULTI_FUNC_DEVICE_MASK (BIT_32(7))
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#define PCI_REVISION_ID_REG (0x08)
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