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286 lines
7.7 KiB
NASM
286 lines
7.7 KiB
NASM
;
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; @file CpuOps32.nasm
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; @brief Various CPU functions executed in 32-bit mode
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;
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; Copyright 2021-2023 Advanced Micro Devices, Inc. All rights reserved.
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; SPDX-License-Identifier: MIT
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;
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%include "Porting.h"
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global ASM_TAG(xUslGetRawIdOnExecutingCore)
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global ASM_TAG(xUslGetThreadsPerCore)
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global ASM_TAG(xUslGetPackageType)
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global ASM_TAG(xUslIsSmtDisabled)
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global ASM_TAG(xUslGetProcessorId)
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global ASM_TAG(xUslGetInitialApicId)
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global ASM_TAG(xUslGetPhysAddrSize)
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global ASM_TAG(xUslGetPhysAddrReduction)
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global ASM_TAG(xUslRdMsr)
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global ASM_TAG(xUslWrMsr)
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global ASM_TAG(xUslWbinvd)
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global ASM_TAG(xUslGetSecureEncryption)
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SECTION .text
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bits 32
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;------------------------------------------------------------------------------
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; xUslGetRawIdOnExecutingCore
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;
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; @brief Get Raw CPU ID for the executing core
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;
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; @details Uses CPUID function 80000001
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; ("Extended Processor and Processor Feature Identifiers").
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; CommonLib/CpuLib.h: uint32_t xUslGetRawIdOnExecutingCore (void)
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;
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; @param None
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;
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; @retval EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetRawIdOnExecutingCore):
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push ebx
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mov eax, 0x80000001
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cpuid
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pop ebx
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ret
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;------------------------------------------------------------------------------
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; xUslIsSmtDisabled
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;
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; @brief Check if SMT is disabled
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;
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; @details Uses CPUID function 0x8000001D
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; ("Cache Topology Information").
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; CommonLib/CpuLib.h: uint32_t xUslIsSmtDisabled (void)
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;
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; @param None
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;
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; @retval EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslIsSmtDisabled):
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push ebp
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mov ebp, esp
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push ebx
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xor eax, eax
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mov eax, 0x8000001D
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cpuid
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shr eax, 14
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and eax, 0xFFF
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pop ebx
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leave
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ret
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;------------------------------------------------------------------------------
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; xUslGetProcessorId
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;
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; @brief Get Processor ID
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;
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; @details Uses CPUID function 80000001
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; ("Extended Processor and Processor Feature Identifiers").
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; CommonLib/CpuLib.h: uint32_t xUslGetProcessorId (void)
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;
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; @param None
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;
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; @retval EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetProcessorId):
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push ebx
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mov eax, 0x80000001
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cpuid
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mov ebx, eax
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and ebx, 0x0FFF0000
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shr ebx, 8
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and eax, 0x000000FF
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or eax, ebx
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pop ebx
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ret
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;------------------------------------------------------------------------------
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; xUslGetThreadsPerCore
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;
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; @brief Get the threads per core from CPUID Fn0x8000001E_EBX
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;
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; @details Uses CPUID function 8000001E ("Processor Topology Information").
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; Bitfield EBX[15:8] is "ThreadsPerComputeUnit" per the AMD64
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; Architecture Manual Vol 3.
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; CommonLib/CpuLib.h: uint8_t xUslGetThreadsPerCore (void)
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;
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; @param None
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;
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; @retval Threads per Core in EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetThreadsPerCore):
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push ebp
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mov ebp, esp
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push ebx
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mov eax, 0x8000001E
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cpuid
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mov eax, ebx
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shr eax, 8
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and eax, 0xFF
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add eax, 1
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pop ebx
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leave
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ret
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;------------------------------------------------------------------------------
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; xUslGetPackageType
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;
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; @brief Get package type from CPUID Fn0x80000001_EBX
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;
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; @details Uses CPUID function 80000001
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; ("Extended Processor and Processor Feature Identifiers").
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; Bitfield EBX[31:28] is "PkgType" per the
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; AMD64 Architecture Programmers Manual Vol 3.
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; CommonLib/CpuLib.h: uint32_t xUslGetPackageType (void)
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;
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; @param None
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;
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; @retval Package type in EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetPackageType):
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push ebp
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mov ebp, esp
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push ebx
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mov eax, 0x80000001
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cpuid
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mov ecx, ebx
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shr ecx, 28
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and ecx, 0xF
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mov eax, 1
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shl eax, cl
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pop ebx
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leave
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ret
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;------------------------------------------------------------------------------
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; xUslGetInitialApicId
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;
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; @brief Get package type from CPUID Fn0x00000001_EBX
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;
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; @details Uses CPUID function 00000001
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; ("Processor and Processor Feature Identifiers").
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; Bitfield EBX[31:24] is "LocalApicId" per the AMD64
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; Architecture Programmers Manual Vol. 3.
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; CommonLib/CpuLib.h: uint32_t xUslGetInitialApicId (void)
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;
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; @param None
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;
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; @retval APIC Id in EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetInitialApicId):
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push ebp
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mov ebp, esp
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push ebx
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mov eax, 0x00000001
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cpuid
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mov eax, ebx
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shr eax, 24
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and eax, 0xFF
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pop ebx
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leave
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ret
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;------------------------------------------------------------------------------
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; xUslRdMsr
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;
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; @brief Read MSR
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;
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; @details Read the MsrAddress specified by ECX and return the 64 bit value
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; in EDX:EAX.
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; CommonLib/CpuLib.h: uint64_t xUslRdMsr(uint32_t MsrAddress)
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;
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; @param MsrAddress MSR Address passed in [ESP + 4]
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;
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; @retval MSR Register Value in EDX:EAX
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;------------------------------------------------------------------------------
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ASM_TAG(xUslRdMsr):
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mov ecx, [esp + 4]
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rdmsr
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ret
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;------------------------------------------------------------------------------
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; xUslWrMsr
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;
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; @brief Write MSR
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;
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; @details Function writes 64 bit MsrValue specified by EDX:EAX to MsrAddress
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; specified by ECX.
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; CommonLib/CpuLib.h: void xUslWrMsr(uint32_t MsrAddress, uint64_t MsrValue)
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;
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; @param MsrAddress MSR Address passed as [esp + 4]
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; @param MsrValue MSR Register Value passed as [esp + 8] to be written at MsrAddress
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;
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; @retval None
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;------------------------------------------------------------------------------
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ASM_TAG(xUslWrMsr):
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mov ecx, [esp + 4]
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mov eax, [esp + 8]
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mov edx, [esp + 12]
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wrmsr
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ret
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;------------------------------------------------------------------------------
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; xUslGetPhysAddrSize
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;
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; @brief Get maximum physical address size in bits.
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;
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; @details CPUID_8000_0008_EAX[7:0] Maximum physical byte address size in bits
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;
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; @param None
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;
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; @retval Maximum physical address size in bits in AL
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetPhysAddrSize):
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push ebx
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mov eax, 0x80000008
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cpuid
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pop ebx
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ret
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;------------------------------------------------------------------------------
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; xUslGetPhysAddrReduction
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;
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; @brief Get physical address bit reduction
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;
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; @details CPUID_8000_001F_EBX[11:6] MemEncryptPhysAddWidth
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;
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; @param None
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;
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; @retval Physical address bit reduction in bits in AL
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetPhysAddrReduction):
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push ebx
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mov eax, 0x8000001F
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cpuid
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mov eax, ebx
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shr eax, 6
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and eax, 0x3F
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pop ebx
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ret
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ASM_TAG(xUslWbinvd):
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wbinvd
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ret
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;------------------------------------------------------------------------------
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; xUslGetSecureEncryption
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;
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; @brief Get Secure Encryption Eax Value
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;
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; @details Uses CPUID function CPUID_Fn8000001F_EAX ("AMD Secure Encryption EAX]").
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; CommonLib/CpuLib.h: uint32_t xUslGetSecureEncryption (void)
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;
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; @param None
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;
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; @retval Return AMD Secure Encryption Register Value
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;------------------------------------------------------------------------------
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ASM_TAG(xUslGetSecureEncryption):
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push ebx
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mov eax, 0x8000001F
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cpuid
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pop ebx
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ret
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