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703 lines
20 KiB
C
703 lines
20 KiB
C
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/**
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* @file xSIM.c
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* @brief Common Host API functions
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*/
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/* Copyright 2021-2023 Advanced Micro Devices, Inc. All rights reserved. */
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// SPDX-License-Identifier: MIT
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/**
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* @defgroup xSIM_group xSIMgroup:Silicon Initialization Module
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* This module is responsible for the very early (basic) Si initialization
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* comming off of reset.
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*/
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#include <SilCommon.h>
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#include <string.h>
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#include <xSIM.h>
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#include "IpHandler.h"
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/**
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* Global API table. This table contains an entry for every IP defined by
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* SIL_DATA_BLOCK_ID. This structure is populated during xSIM init.
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*
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*/
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void *mApi[SilId_ListEnd] = {NULL};
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/*
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* Flag to track the deferred reset type.
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* This flag will only maintain the highest order reset type with cold reset
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* taking precedence over warm reset.
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*
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* By default the value is SilPass (0)
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*
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* The deferred reset type is used to minimize the number of resets necessary
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* for silicon initialization. If a reset is critical and has timing
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* constraints, an immediate reset * should be used. If the reset can wait to
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* allow other IPs to perform their initialization before reset, then the reset
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* should be deferred.
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*/
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SIL_STATUS mDeferredResetType = SilPass;
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/** Rounds the Data up to the RoundTo value
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*/
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static
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size_t
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RoundUp(
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size_t Data,
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size_t RoundTo
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)
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{
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return Data + RoundTo - (Data % RoundTo);
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}
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/**
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* Locate the Information record for the active SoC for timepoint 1
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*
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* There may be more than one SoC supported in this build. This fucntion
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* determines what SoC is present in the system and locates the
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* appropriate IP list corresponding to that SoC.
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* @param none
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* @returns pointer to the begining of the SoC IP table, IP block list.
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*/
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static const
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IP_RECORD
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*GetActiveSocIpListTp1( void )
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{
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// SOC_IP_TABLE *SocInfoRecord;
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const IP_RECORD *IpRecord = NULL;
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// Get the Logical CPU ID
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// loop through the SoC list to match the Logical ID
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// return the address of the 1st entry in the IP list, else ASSERT
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/* Scan the SoC list for the platform,
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locate record for the SoC present in the socket. */
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// PLAT_SOC_LIST *ListOfSoc;
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// IpRecord = &SocInfoRecord.IpList[0];
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//
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extern const SOC_IP_TABLE SocIpTblF19M10Tp1;
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IpRecord = SocIpTblF19M10Tp1.IpList;
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XSIM_TRACEPOINT (SIL_TRACE_INFO, "IpRecord: %x\n", IpRecord);
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assert (IpRecord != NULL);
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return IpRecord;
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}
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/**
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* Locate the Information record for the active SoC for timepoint 2
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*
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* There may be more than one SoC supported in this build. This fucntion
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* determines what SoC is present in the system and locates the
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* appropriate IP list corresponding to that SoC.
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* @param none
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* @returns pointer to the begining of the SoC IP table, IP block list.
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*/
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static const
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IP_RECORD
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*GetActiveSocIpListTp2( void )
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{
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// SOC_IP_TABLE *SocInfoRecord;
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const IP_RECORD *IpRecord = NULL;
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// Get the Logical CPU ID
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// loop through the SoC list to match the Logical ID
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// return the address of the 1st entry in the IP list, else ASSERT
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/* Scan the SoC list for the platform,
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locate record for the SoC present in the socket. */
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// PLAT_SOC_LIST *ListOfSoc;
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// IpRecord = &SocInfoRecord.IpList[0];
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//
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extern const SOC_IP_TABLE SocIpTblF19M10Tp2;
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IpRecord = SocIpTblF19M10Tp2.IpList;
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XSIM_TRACEPOINT (SIL_TRACE_INFO, "IpRecord: %x\n", IpRecord);
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assert (IpRecord != NULL);
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return IpRecord;
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}
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/**
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* Locate the Information record for the active SoC for timepoint 3
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*
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* There may be more than one SoC supported in this build. This fucntion
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* determines what SoC is present in the system and locates the
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* appropriate IP list corresponding to that SoC.
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* @param none
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* @returns pointer to the begining of the SoC IP table, IP block list.
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*/
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static const
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IP_RECORD
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*GetActiveSocIpListTp3( void )
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{
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// SOC_IP_TABLE *SocInfoRecord;
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const IP_RECORD *IpRecord = NULL;
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// Get the Logical CPU ID
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// loop through the SoC list to match the Logical ID
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// return the address of the 1st entry in the IP list, else ASSERT
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/* Scan the SoC list for the platform,
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locate record for the SoC present in the socket. */
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// PLAT_SOC_LIST *ListOfSoc;
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// IpRecord = &SocInfoRecord.IpList[0];
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//
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extern const SOC_IP_TABLE SocIpTblF19M10Tp3;
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IpRecord = SocIpTblF19M10Tp3.IpList;
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XSIM_TRACEPOINT (SIL_TRACE_INFO, "IpRecord: %x\n", IpRecord);
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assert (IpRecord != NULL);
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return IpRecord;
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}
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/*********************************************************************
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* API Functions
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*********************************************************************/
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/* Determine size of memory needed
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* This is a host API function, so you can find the
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* prototype, text description and Doxygen text in xSim-api.h
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*
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*/
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size_t
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xSimQueryMemoryRequirements(void)
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{
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const IP_RECORD *LclIpRecord;
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size_t RequestTotal = 0;
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XSIM_TRACEPOINT(SIL_TRACE_ENTRY, "QueryMem.\n");
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// First apply the needs of the xSIM core
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RequestTotal = sizeof(SIL_BLOCK_VARIABLES);
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//Now add the data needs of each IP
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LclIpRecord = GetActiveSocIpListTp1();
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while (LclIpRecord->IpID < SilId_ListEnd) {
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XSIM_TRACEPOINT(SIL_TRACE_INFO,
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"QueryMem:IpRecord at: 0x%x \n",
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LclIpRecord
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);
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if (LclIpRecord->BlkRequestSize > 0) {
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RequestTotal += RoundUp (
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sizeof(SIL_INFO_BLOCK_HEADER) + LclIpRecord->BlkRequestSize,
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sizeof(uint32_t)
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);
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}
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LclIpRecord++;
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}
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//Finallly, round up to a convenient boundary (2K)
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RequestTotal = RoundUp (RequestTotal, 2 * KILOBYTE);
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XSIM_TRACEPOINT(SIL_TRACE_INFO,
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"QueryMem:ReqTotal at: 0x%x \n",
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RequestTotal
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);
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return RequestTotal;
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}
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/**
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* xSimInitializeIpApis
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*
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* @brief Call all IP ApiInit functions to initialize IP-to-IP and IP Internal APIs
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*
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* @param LclIpRecord Input pointer to the IP record list.
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*
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* @return SIL_STATUS
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*
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*/
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static
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SIL_STATUS
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xSimInitializeIpApis (
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const IP_RECORD *LclIpRecord
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)
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{
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SIL_STATUS LclStatus;
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LclStatus = SilPass;
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/**
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* Initialize global mApi with the IP API specified in the IP list.
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* This needs to be intialized before any IP initialization.
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*/
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while (LclIpRecord->IpID < SilId_ListEnd) {
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if (LclIpRecord->ApiInit != NULL) {
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LclStatus = LclIpRecord->ApiInit ();
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if (LclStatus != SilPass) {
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XSIM_TRACEPOINT(SIL_TRACE_ERROR, "Api init failed for Ip ID: %d\n",
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LclIpRecord->IpID);
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return LclStatus;
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}
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}
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LclIpRecord++; // move to next record
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}
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return LclStatus;
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}
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/**
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* xSimAssignMemoryTp1
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*
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* @brief Assign Memory to sub-modules and initialize internal APIs for
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* openSIL IPs.
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*
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* @details This is a host API function, so you can find the prototype, text
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* description and Doxygen text in xSim-api.h
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*
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* @param BaseAddress The base address of the openSIL memory block allocated
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* and passed in from Host.
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* @param MemorySize The size of the block allocated at BaseAddress
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*
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* @returns SIL_STATUS
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*
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*/
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SIL_STATUS
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xSimAssignMemoryTp1 (
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void *BaseAddress,
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size_t MemorySize
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)
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{
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SIL_BLOCK_VARIABLES *LclVarsPtr; ///< pointer to global Vars
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const IP_RECORD *LclIpRecord; ///< pointer to IP Record being scanned
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const IP_RECORD *IpRecordHead; ///< pointer to IP record list HEAD
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size_t LclStatus; ///< collects status from calls made
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// Set the sil block base address
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SilSetMemoryBase (BaseAddress); // Set the global var
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IpRecordHead = GetActiveSocIpListTp1();
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LclIpRecord = IpRecordHead;
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// Fill the openSIL private vars block
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XSIM_TRACEPOINT(SIL_TRACE_INFO,
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"openSIL AssignMemBlk1:gVars at: 0x%x \n",
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BaseAddress
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);
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LclVarsPtr = (SIL_BLOCK_VARIABLES *)BaseAddress;
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LclVarsPtr->HostBlockSize = (uint32_t) MemorySize;
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LclVarsPtr->FreeSpaceOffset = sizeof(SIL_BLOCK_VARIABLES);
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LclVarsPtr->FreeSpaceLeft = (uint32_t) (MemorySize -
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sizeof(SIL_BLOCK_VARIABLES));
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/* Waiting for SoC table to be generated by Kconfig (next PR)
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* LclVarsPtr->ActiveSoC = SocInfoRecord->XsimVars; // block copy of var struct
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* LclVarsPtr->PlatformData.ApobBaseAddress = CONFIG_PLAT_APOB_ADDRESS;
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*/
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// Initialize IP APIs specified in the IP list. This is required before any IP entrypoint is called.
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LclStatus = xSimInitializeIpApis (LclIpRecord);
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if (LclStatus != SilPass) {
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return LclStatus;
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}
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XSIM_TRACEPOINT(SIL_TRACE_INFO,
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"SilMemoryBase: 0x%x, FreeSpaceOffset: 0x%x, FreeSpaceLeft = 0x%x\n",
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LclVarsPtr,
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LclVarsPtr->FreeSpaceOffset,
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LclVarsPtr->FreeSpaceLeft
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);
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// Loop through the IP records array, calling each IPblock to set their
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// Input blocks with defaults. IP block uses calls to SilCreateBlock() to
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// establish its Input block, Private block(s) and Output block(s).
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// IP code must fill its Input block with default values.
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LclStatus = SilPass;
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for (LclIpRecord = IpRecordHead; LclIpRecord->IpID < SilId_ListEnd; LclIpRecord++) {
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XSIM_TRACEPOINT (SIL_TRACE_INFO,
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"openSIL Assign:IpRcd %x: %x, %x, %x, %x\n",
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LclIpRecord,
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LclIpRecord->IpID,
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LclIpRecord->BlkRequestSize,
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LclIpRecord->SetInput,
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LclIpRecord->Initialize
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);
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if (LclIpRecord->BlkRequestSize == 0) continue;
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/**
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* Check if space is available
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* LclVarsPtr->FreeSpaceLeft is updated during SilCreateInfoBlock
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* called from IP's SetInput functions
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*/
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if (LclIpRecord->BlkRequestSize > LclVarsPtr->FreeSpaceLeft)
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return SilOutOfResources;
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if (LclIpRecord->SetInput == NULL) {
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XSIM_TRACEPOINT (SIL_TRACE_INFO,
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"openSIL SetInput function is not reported for IP#0x%x fails.\n",
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LclIpRecord->IpID);
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continue;
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}
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LclStatus = LclIpRecord->SetInput();
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if (LclStatus != SilPass) {
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XSIM_TRACEPOINT (SIL_TRACE_ERROR,
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"openSIL SetInput function for IP#0x%x fails.\n",
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LclIpRecord->IpID);
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return LclStatus;
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}
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}
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return LclStatus;
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}
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/**
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* xSimAssignMemoryTp2
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*
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* @brief Assign Memory to sub-modules and initialize internal APIs for
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* openSIL IPs.
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*
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* @details This is a host API function, so you can find the prototype, text
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* description and Doxygen text in xSim-api.h
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*
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* @param BaseAddress The base address of the openSIL memory block allocated
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* and passed in from Host.
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* @param MemorySize The size of the block allocated at BaseAddress
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*
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* @returns SIL_STATUS
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*
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*/
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SIL_STATUS
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xSimAssignMemoryTp2 (
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void *BaseAddress,
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size_t MemorySize
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)
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{
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const IP_RECORD *LclIpRecord; ///< pointer to IP Record being scanned
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size_t LclStatus; ///< collects status from calls made
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// At this time the MemorySize pramteter is not used
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UNUSED (MemorySize);
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// Set the sil block base address
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SilSetMemoryBase (BaseAddress); // Set the global var
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LclIpRecord = GetActiveSocIpListTp2();
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// Initialize IP APIs specified in the IP list. This is required before any IP entrypoint is called.
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LclStatus = xSimInitializeIpApis (LclIpRecord);
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if (LclStatus != SilPass) {
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return LclStatus;
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}
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// For secondary time points, openSIL should not reinitialize its data.
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XSIM_TRACEPOINT(SIL_TRACE_INFO, "Assign new openSIL base: 0x%x\n", BaseAddress);
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return SilPass;
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}
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/**
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* xSimAssignMemoryTp3
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*
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* @brief Assign Memory to sub-modules and initialize internal APIs for
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* openSIL IPs.
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*
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* @details This is a host API function, so you can find the prototype, text
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* description and Doxygen text in xSim-api.h
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*
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* @param BaseAddress The base address of the openSIL memory block allocated
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* and passed in from Host.
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* @param MemorySize The size of the block allocated at BaseAddress
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*
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* @returns SIL_STATUS
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*
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*/
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SIL_STATUS
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xSimAssignMemoryTp3 (
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void *BaseAddress,
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size_t MemorySize
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)
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{
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const IP_RECORD *LclIpRecord; ///< pointer to IP Record being scanned
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size_t LclStatus; ///< collects status from calls made
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// At this time the MemorySize pramteter is not used
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UNUSED (MemorySize);
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// Set the sil block base address
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SilSetMemoryBase (BaseAddress); // Set the global var
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LclIpRecord = GetActiveSocIpListTp3();
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// Initialize IP APIs specified in the IP list. This is required before any IP entrypoint is called.
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LclStatus = xSimInitializeIpApis (LclIpRecord);
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if (LclStatus != SilPass) {
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return LclStatus;
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}
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// For secondary time points, openSIL should not reinitialize its data.
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XSIM_TRACEPOINT(SIL_TRACE_INFO, "Assign new openSIL base: 0x%x\n", BaseAddress);
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return SilPass;
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}
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/**
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* SilCreateInfoBlock
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* @brief Create an Info Block
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*
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* This internal xSIM routine is called by the IPs to assign some of the
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* Host memory to the IP for use as an Input block, private block or
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* output block. Each block must have an unique identifier in the openSIL ID
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* list.
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*
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* @param BlockTag - IP block unique identifier
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* @param BlockSize - size of the requested block
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* @param Block_Instance - Instance of block using this ID
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* @param Block_MajorRev - Revision of the IP data structure used
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* @param Block_MinorRev - Revision (minor) of the IP data struct used.
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* @return pointer to the IP data segment of the assigned memory space.
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*
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*/
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void*
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SilCreateInfoBlock (
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uint32_t BlockTag,
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size_t BlockSize,
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uint16_t Block_Instance,
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uint8_t Block_MajorRev,
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uint8_t Block_MinorRev
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)
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{
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SIL_INFO_BLOCK_HEADER *Header = NULL;
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SIL_BLOCK_VARIABLES *LclVarsPtr;
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size_t RequestSize;
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LclVarsPtr = (SIL_BLOCK_VARIABLES *)(SilGetMemoryBase ());
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if (LclVarsPtr == NULL) { //Global not yet assinged - error
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assert(LclVarsPtr != NULL);
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return NULL;
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}
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// calculate the amount of memory, rounded up to DWORD boundary
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RequestSize = RoundUp (sizeof(SIL_INFO_BLOCK_HEADER) + BlockSize,
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sizeof(uint32_t));
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Header = (SIL_INFO_BLOCK_HEADER *)((uint8_t *)LclVarsPtr +
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LclVarsPtr->FreeSpaceOffset);
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XSIM_TRACEPOINT (SIL_TRACE_INFO, "openSIL CreateBlk at: 0x%x [0x%x] \n", Header,
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RequestSize);
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if ((LclVarsPtr->FreeSpaceLeft) <= RequestSize) {
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return NULL;
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}
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LclVarsPtr->FreeSpaceOffset += (uint32_t) RequestSize;
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LclVarsPtr->FreeSpaceLeft -= (uint32_t) RequestSize;
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XSIM_TRACEPOINT(SIL_TRACE_INFO,
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"SilMemoryBase: 0x%x, FreeSpaceOffset: 0x%x, FreeSpaceLeft = 0x%x\n",
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LclVarsPtr,
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LclVarsPtr->FreeSpaceOffset,
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LclVarsPtr->FreeSpaceLeft
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);
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// Fill the Info Block
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memset(Header, 0, RequestSize);
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Header->Id = BlockTag;
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Header->InfoBlockDataSize = (uint32_t)RequestSize;
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Header->Instance = Block_Instance;
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Header->RevMajor = Block_MajorRev;
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Header->RevMinor = Block_MinorRev;
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return Header->InfoBlockData;
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}
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/*
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* SilFindStructure
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* This is a host API function, so you can find the
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* prototype, text description and Doxygen text in xSim-api.h
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*/
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void*
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SilFindStructure (
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SIL_DATA_BLOCK_ID structureID,
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uint16_t InstanceNum
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)
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{
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return xUslFindStructure (structureID, InstanceNum);
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};
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/*--------------------------------------------------------------------
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* SilDebugSetup
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* This is a host API function, so you can find the
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* prototype, text description and Doxygen text in xSim-api.h
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*/
|
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SIL_STATUS
|
|
SilDebugSetup (
|
|
HOST_DEBUG_SERVICE HostDbgService
|
|
)
|
|
{
|
|
if (mHostDebugService != NULL) {
|
|
return SilAborted; // Host debug service is initialized already
|
|
}
|
|
if (HostDbgService == NULL) {
|
|
return SilInvalidParameter;
|
|
} else {
|
|
// Set the host debug service
|
|
mHostDebugService = HostDbgService;
|
|
XSIM_TRACEPOINT(SIL_TRACE_INFO,
|
|
"Host debug service successfully initialized for openSIL.\n");
|
|
}
|
|
|
|
return SilPass;
|
|
}
|
|
|
|
/**
|
|
* SetDeferredResetType
|
|
*
|
|
* @brief Internal function to track the highest order reset requested by IPs
|
|
*
|
|
* @param ResetType The input reset type requested. Only valid requests are
|
|
* SilResetRequestWarmDef or SilResetRequestColdDef. Any
|
|
* other request will force a cold reset.
|
|
* @return void
|
|
*/
|
|
static
|
|
void
|
|
SetDeferredResetType (
|
|
SIL_STATUS ResetType
|
|
)
|
|
{
|
|
// If the deferred reset type is already cold reset, do nothing.
|
|
if (mDeferredResetType != SilResetRequestColdDef) {
|
|
if ((ResetType == SilResetRequestWarmDef) ||
|
|
(ResetType == SilResetRequestColdDef)) {
|
|
mDeferredResetType = ResetType;
|
|
} else {
|
|
// Input reset type is invalid, perform cold reset
|
|
XSIM_TRACEPOINT (SIL_TRACE_ENTRY,
|
|
"Invalid deferred reset request: 0x%x, requesting cold reset\n",
|
|
ResetType);
|
|
mDeferredResetType = SilResetRequestColdDef;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* xSimInitializeIps
|
|
*
|
|
* @brief Loop through the IP records array, calling each IPblock to init their respective silicon blocks.
|
|
*
|
|
* @param LclIpRecord Input pointer to the IP record list.
|
|
*
|
|
* @return SIL_STATUS
|
|
*
|
|
*/
|
|
static
|
|
SIL_STATUS
|
|
xSimInitializeIps (
|
|
const IP_RECORD *LclIpRecord
|
|
)
|
|
{
|
|
SIL_STATUS LclStatus;
|
|
|
|
LclStatus = SilPass;
|
|
|
|
while (LclIpRecord->IpID < SilId_ListEnd) {
|
|
XSIM_TRACEPOINT(SIL_TRACE_INFO, "openSIL Init:IpRcd %x: %x, %x, %x, %x\n",
|
|
LclIpRecord, LclIpRecord->IpID, LclIpRecord->BlkRequestSize,
|
|
LclIpRecord->SetInput, LclIpRecord->Initialize);
|
|
LclStatus = (LclIpRecord->Initialize == NULL)? SilPass :
|
|
LclIpRecord->Initialize ();
|
|
|
|
if (LclStatus != SilPass) {
|
|
if ((LclStatus == SilResetRequestColdDef) ||
|
|
(LclStatus == SilResetRequestWarmDef)) {
|
|
SetDeferredResetType (LclStatus);
|
|
// If the status was a deferred reset request, continue to next IP
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
LclIpRecord++; // move to next record
|
|
}
|
|
|
|
if (mDeferredResetType != SilPass) {
|
|
// There was a deferred reset request. Return the reset type in status.
|
|
LclStatus = mDeferredResetType;
|
|
}
|
|
|
|
return LclStatus;
|
|
}
|
|
|
|
/**
|
|
* InitializeSiTp1
|
|
*
|
|
* @brief Start the Silicon Initialization process for timepoint 1
|
|
*
|
|
* @details This is a host API function. You can find the prototype, text
|
|
* description and Doxygen text in xSim-api.h
|
|
*
|
|
* @return SIL_STATUS
|
|
*/
|
|
SIL_STATUS
|
|
InitializeSiTp1 (void)
|
|
{
|
|
SIL_STATUS LclStatus = SilPass;
|
|
const IP_RECORD *LclIpRecord; // pointer to IP Record being scanned
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_ENTRY, "\n");
|
|
|
|
LclIpRecord = GetActiveSocIpListTp1();
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_INFO, "Execute xSIM IP module Init for TP1\n");
|
|
|
|
LclStatus = xSimInitializeIps (LclIpRecord);
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_EXIT, "Status: %x\n", LclStatus);
|
|
return LclStatus;
|
|
}
|
|
|
|
/**
|
|
* InitializeSiTp2
|
|
*
|
|
* @brief Start the Silicon Initialization process for timepoint 2
|
|
*
|
|
* @details This is a host API function. You can find the prototype, text
|
|
* description and Doxygen text in xSim-api.h
|
|
*
|
|
* @return SIL_STATUS
|
|
*/
|
|
SIL_STATUS
|
|
InitializeSiTp2 (void)
|
|
{
|
|
SIL_STATUS LclStatus = SilPass;
|
|
const IP_RECORD *LclIpRecord; // pointer to IP Record being scanned
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_ENTRY, "\n");
|
|
|
|
LclIpRecord = GetActiveSocIpListTp2();
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_INFO, "Execute xSIM IP module Init for TP2\n");
|
|
|
|
LclStatus = xSimInitializeIps (LclIpRecord);
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_EXIT, "Status: %x\n", LclStatus);
|
|
return LclStatus;
|
|
}
|
|
|
|
/**
|
|
* InitializeSiTp3
|
|
*
|
|
* @brief Start the Silicon Initialization process for timepoint 3
|
|
*
|
|
* @details This is a host API function. You can find the prototype, text
|
|
* description and Doxygen text in xSim-api.h
|
|
*
|
|
* @return SIL_STATUS
|
|
*/
|
|
SIL_STATUS
|
|
InitializeSiTp3 (void)
|
|
{
|
|
SIL_STATUS LclStatus = SilPass;
|
|
const IP_RECORD *LclIpRecord; // pointer to IP Record being scanned
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_ENTRY, "\n");
|
|
|
|
LclIpRecord = GetActiveSocIpListTp3();
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_INFO, "Execute xSIM IP module Init for TP3\n");
|
|
|
|
LclStatus = xSimInitializeIps (LclIpRecord);
|
|
|
|
XSIM_TRACEPOINT(SIL_TRACE_EXIT, "Status: %x\n", LclStatus);
|
|
return LclStatus;
|
|
}
|