mirror of
https://github.com/Dasharo/linux.git
synced 2026-03-06 15:25:10 -08:00
Merge tag 'usb-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB / Thunderbolt driver updates from Greg KH:
"Here is the USB and Thunderbolt driver updates for 6.14-rc1. Nothing
huge in here, just lots of new hardware support and updates for
existing drivers. Changes here are:
- big gadget f_tcm driver update
- other gadget driver updates and fixes
- thunderbolt driver updates for new hardware and capabilities and
lots more debugging functionality to handle it when things aren't
working well.
- xhci driver updates
- new USB-serial device updates
- typec driver updates, including a chrome platform driver (acked by
the subsystem maintainers)
- other small driver updates
All of these have been in linux-next for a while with no reported
issues"
* tag 'usb-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (123 commits)
usb: hcd: Bump local buffer size in rh_string()
Revert "usb: gadget: u_serial: Disable ep before setting port to null to fix the crash caused by port being null"
usb: typec: tcpci: Prevent Sink disconnection before vPpsShutdown in SPR PPS
usb: xhci: tegra: Fix OF boolean read warning
usb: host: xhci-plat: add support compatible ID PNP0D15
usb: typec: ucsi: Add a macro definition for UCSI v1.0
usb: dwc3: core: Defer the probe until USB power supply ready
usbip: Correct format specifier for seqnum from %d to %u
usbip: Fix seqnum sign extension issue in vhci_tx_urb
dt-bindings: usb: snps,dwc3: Split core description
usb: quirks: Add NO_LPM quirk for TOSHIBA TransMemory-Mx device
usb: dwc3: gadget: Reinitiate stream for all host NoStream behavior
USB: Use str_enable_disable-like helpers
USB: gadget: Use str_enable_disable-like helpers
USB: phy: Use str_enable_disable-like helpers
USB: typec: Use str_enable_disable-like helpers
USB: host: Use str_enable_disable-like helpers
USB: Replace own str_plural with common one
USB: serial: quatech2: fix null-ptr-deref in qt2_process_read_urb()
usb: phy: Remove API devm_usb_put_phy()
...
This commit is contained in:
Linus Torvalds
@@ -293,6 +293,13 @@ properties:
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PD negotiation till BC1.2 detection completes.
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default: 0
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pd-revision:
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description: Specifies the maximum USB PD revision and version supported by
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the connector. This property is specified in the following order;
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<revision_major, revision_minor, version_major, version_minor>.
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$ref: /schemas/types.yaml#/definitions/uint8-array
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maxItems: 4
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dependencies:
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sink-vdos-v1: [ sink-vdos ]
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sink-vdos: [ sink-vdos-v1 ]
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@@ -113,27 +113,27 @@ examples:
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- |
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#include <dt-bindings/clock/aspeed-clock.h>
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vhub: usb-vhub@1e6a0000 {
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compatible = "aspeed,ast2500-usb-vhub";
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reg = <0x1e6a0000 0x300>;
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interrupts = <5>;
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clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
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aspeed,vhub-downstream-ports = <5>;
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aspeed,vhub-generic-endpoints = <15>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb2ad_default>;
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compatible = "aspeed,ast2500-usb-vhub";
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reg = <0x1e6a0000 0x300>;
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interrupts = <5>;
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clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
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aspeed,vhub-downstream-ports = <5>;
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aspeed,vhub-generic-endpoints = <15>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb2ad_default>;
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vhub-vendor-id = <0x1d6b>;
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vhub-product-id = <0x0107>;
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vhub-device-revision = <0x0100>;
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vhub-strings {
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#address-cells = <1>;
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#size-cells = <0>;
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vhub-vendor-id = <0x1d6b>;
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vhub-product-id = <0x0107>;
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vhub-device-revision = <0x0100>;
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vhub-strings {
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#address-cells = <1>;
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#size-cells = <0>;
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string@409 {
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reg = <0x409>;
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manufacturer = "ASPEED";
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product = "USB Virtual Hub";
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serial-number = "0000";
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};
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string@409 {
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reg = <0x409>;
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manufacturer = "ASPEED";
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product = "USB Virtual Hub";
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serial-number = "0000";
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};
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};
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};
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@@ -41,10 +41,10 @@ additionalProperties: false
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examples:
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- |
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usb@f0b02000 {
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compatible = "brcm,bdc-udc-v2";
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reg = <0xf0b02000 0xfc4>;
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interrupts = <0x0 0x60 0x0>;
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phys = <&usbphy_0 0x0>;
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clocks = <&sw_usbd>;
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};
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usb@f0b02000 {
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compatible = "brcm,bdc-udc-v2";
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reg = <0xf0b02000 0xfc4>;
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interrupts = <0x0 0x60 0x0>;
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phys = <&usbphy_0 0x0>;
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clocks = <&sw_usbd>;
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};
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@@ -56,21 +56,21 @@ examples:
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/* 2.0 hub on port 1 */
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hub_2_0: hub@1 {
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compatible = "usb4b4,6504";
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reg = <1>;
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peer-hub = <&hub_3_0>;
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reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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vdd-supply = <®_1v2_usb>;
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vdd2-supply = <®_3v3_usb>;
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compatible = "usb4b4,6504";
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reg = <1>;
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peer-hub = <&hub_3_0>;
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reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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vdd-supply = <®_1v2_usb>;
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vdd2-supply = <®_3v3_usb>;
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};
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/* 3.0 hub on port 2 */
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hub_3_0: hub@2 {
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compatible = "usb4b4,6506";
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reg = <2>;
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peer-hub = <&hub_2_0>;
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reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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vdd-supply = <®_1v2_usb>;
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vdd2-supply = <®_3v3_usb>;
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compatible = "usb4b4,6506";
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reg = <2>;
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peer-hub = <&hub_2_0>;
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reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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vdd-supply = <®_1v2_usb>;
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vdd2-supply = <®_3v3_usb>;
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};
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};
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@@ -192,7 +192,7 @@ unevaluatedProperties: false
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examples:
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- |
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usb@101c0000 {
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usb@101c0000 {
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compatible = "rockchip,rk3066-usb", "snps,dwc2";
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reg = <0x10180000 0x40000>;
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interrupts = <18>;
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@@ -200,6 +200,6 @@ examples:
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clock-names = "otg";
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phys = <&usbphy>;
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phy-names = "usb2-phy";
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};
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};
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...
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@@ -87,21 +87,21 @@ examples:
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#size-cells = <0>;
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typec-mux@42 {
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compatible = "fcs,fsa4480";
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reg = <0x42>;
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compatible = "fcs,fsa4480";
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reg = <0x42>;
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interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
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interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
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vcc-supply = <&vreg_bob>;
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vcc-supply = <&vreg_bob>;
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mode-switch;
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orientation-switch;
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mode-switch;
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orientation-switch;
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port {
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fsa4480_ept: endpoint {
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remote-endpoint = <&typec_controller>;
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port {
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fsa4480_ept: endpoint {
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remote-endpoint = <&typec_controller>;
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};
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};
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};
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};
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};
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...
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@@ -20,6 +20,7 @@ properties:
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items:
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- enum:
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- nxp,cbdtu02043
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- onnn,fsusb42
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- onnn,fsusb43l10x
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- pericom,pi3usb102
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- ti,tmuxhs4212
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@@ -58,20 +58,20 @@ examples:
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#define KEEM_BAY_A53_AUX_USB_SUSPEND
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usb {
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compatible = "intel,keembay-dwc3";
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clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>,
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<&scmi_clk KEEM_BAY_A53_AUX_USB_REF>,
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<&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>,
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<&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>;
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clock-names = "async_master", "ref", "alt_ref", "suspend";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "intel,keembay-dwc3";
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clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>,
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<&scmi_clk KEEM_BAY_A53_AUX_USB_REF>,
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<&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>,
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<&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>;
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clock-names = "async_master", "ref", "alt_ref", "suspend";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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||||
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usb@34000000 {
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compatible = "snps,dwc3";
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reg = <0x34000000 0x10000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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dr_mode = "peripheral";
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};
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usb@34000000 {
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compatible = "snps,dwc3";
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reg = <0x34000000 0x10000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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dr_mode = "peripheral";
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};
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};
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@@ -54,19 +54,19 @@ examples:
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#size-cells = <0>;
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typec-mux@48 {
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compatible = "ite,it5205";
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reg = <0x48>;
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compatible = "ite,it5205";
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reg = <0x48>;
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mode-switch;
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orientation-switch;
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mode-switch;
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orientation-switch;
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vcc-supply = <&mt6359_vibr_ldo_reg>;
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vcc-supply = <&mt6359_vibr_ldo_reg>;
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port {
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it5205_usbss_sbu: endpoint {
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remote-endpoint = <&typec_controller>;
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port {
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it5205_usbss_sbu: endpoint {
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remote-endpoint = <&typec_controller>;
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};
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};
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};
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};
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};
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...
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@@ -13,8 +13,12 @@ description: Maxim TCPCI Type-C PD controller
|
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properties:
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compatible:
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enum:
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- maxim,max33359
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oneOf:
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- enum:
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- maxim,max33359
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- items:
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- const: maxim,max77759-tcpci
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- const: maxim,max33359
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reg:
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maxItems: 1
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@@ -70,6 +74,7 @@ examples:
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PDO_FIXED_DUAL_ROLE)
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PDO_FIXED(9000, 2000, 0)>;
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sink-bc12-completion-time-ms = <500>;
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pd-revision = /bits/ 8 <0x03 0x01 0x01 0x08>;
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};
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};
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};
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@@ -50,18 +50,18 @@ additionalProperties: false
|
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|
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
|
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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|
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udc@0 {
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compatible = "maxim,max3420-udc";
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reg = <0>;
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interrupt-parent = <&gpio>;
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interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>;
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interrupt-names = "udc", "vbus";
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spi-max-frequency = <12500000>;
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};
|
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};
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udc@0 {
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compatible = "maxim,max3420-udc";
|
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reg = <0>;
|
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interrupt-parent = <&gpio>;
|
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interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>;
|
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interrupt-names = "udc", "vbus";
|
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spi-max-frequency = <12500000>;
|
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};
|
||||
};
|
||||
|
||||
@@ -189,7 +189,7 @@ examples:
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet@1 {
|
||||
compatible = "usb955,9ff";
|
||||
reg = <1>;
|
||||
compatible = "usb955,9ff";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -27,6 +27,7 @@ properties:
|
||||
- qcom,msm8998-dwc3
|
||||
- qcom,qcm2290-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
- qcom,qcs615-dwc3
|
||||
- qcom,qcs8300-dwc3
|
||||
- qcom,qdu1000-dwc3
|
||||
- qcom,sa8775p-dwc3
|
||||
@@ -342,6 +343,7 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,qcm2290-dwc3
|
||||
- qcom,qcs615-dwc3
|
||||
- qcom,sar2130p-dwc3
|
||||
- qcom,sc8180x-dwc3
|
||||
- qcom,sc8180x-dwc3-mp
|
||||
@@ -454,8 +456,10 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
interrupt-names:
|
||||
minItems: 3
|
||||
items:
|
||||
- const: pwr_event
|
||||
- const: dp_hs_phy_irq
|
||||
@@ -470,6 +474,7 @@ allOf:
|
||||
- qcom,ipq4019-dwc3
|
||||
- qcom,ipq8064-dwc3
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,qcs615-dwc3
|
||||
- qcom,qcs8300-dwc3
|
||||
- qcom,qdu1000-dwc3
|
||||
- qcom,sa8775p-dwc3
|
||||
|
||||
@@ -104,26 +104,26 @@ examples:
|
||||
#size-cells = <1>;
|
||||
|
||||
usb3host: usb@85060000 {
|
||||
compatible = "renesas,r9a09g011-xhci",
|
||||
"renesas,rzv2m-xhci";
|
||||
reg = <0x85060000 0x2000>;
|
||||
interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>,
|
||||
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
|
||||
clock-names = "axi", "reg";
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A09G011_USB_ARESETN_H>;
|
||||
compatible = "renesas,r9a09g011-xhci",
|
||||
"renesas,rzv2m-xhci";
|
||||
reg = <0x85060000 0x2000>;
|
||||
interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>,
|
||||
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
|
||||
clock-names = "axi", "reg";
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A09G011_USB_ARESETN_H>;
|
||||
};
|
||||
|
||||
usb3peri: usb3peri@85070000 {
|
||||
compatible = "renesas,r9a09g011-usb3-peri",
|
||||
"renesas,rzv2m-usb3-peri";
|
||||
reg = <0x85070000 0x400>;
|
||||
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,
|
||||
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
|
||||
clock-names = "axi", "reg";
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A09G011_USB_ARESETN_P>;
|
||||
compatible = "renesas,r9a09g011-usb3-peri",
|
||||
"renesas,rzv2m-usb3-peri";
|
||||
reg = <0x85070000 0x400>;
|
||||
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,
|
||||
<&cpg CPG_MOD R9A09G011_USB_PCLK>;
|
||||
clock-names = "axi", "reg";
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A09G011_USB_ARESETN_P>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -132,19 +132,19 @@ examples:
|
||||
usb-role-switch;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usb3_hs_ep: endpoint {
|
||||
remote-endpoint = <&hs_ep>;
|
||||
};
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usb3_hs_ep: endpoint {
|
||||
remote-endpoint = <&hs_ep>;
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
usb3_role_switch: endpoint {
|
||||
remote-endpoint = <&hd3ss3220_out_ep>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
usb3_role_switch: endpoint {
|
||||
remote-endpoint = <&hd3ss3220_out_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -26,6 +26,7 @@ properties:
|
||||
- renesas,usbhs-r9a07g043 # RZ/G2UL and RZ/Five
|
||||
- renesas,usbhs-r9a07g044 # RZ/G2{L,LC}
|
||||
- renesas,usbhs-r9a07g054 # RZ/V2L
|
||||
- renesas,usbhs-r9a08g045 # RZ/G3S
|
||||
- const: renesas,rzg2l-usbhs
|
||||
|
||||
- items:
|
||||
@@ -130,6 +131,7 @@ allOf:
|
||||
- renesas,usbhs-r9a07g043
|
||||
- renesas,usbhs-r9a07g044
|
||||
- renesas,usbhs-r9a07g054
|
||||
- renesas,usbhs-r9a08g045
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
|
||||
415
Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml
Normal file
415
Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml
Normal file
@@ -0,0 +1,415 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Synopsys DesignWare USB3 Controller common properties
|
||||
|
||||
maintainers:
|
||||
- Felipe Balbi <balbi@kernel.org>
|
||||
|
||||
description:
|
||||
Defines the properties of the DWC3 core as being embedded in either an
|
||||
vendor-specific implementation or as a standalone component.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-drd.yaml#
|
||||
- if:
|
||||
properties:
|
||||
dr_mode:
|
||||
const: peripheral
|
||||
|
||||
required:
|
||||
- dr_mode
|
||||
then:
|
||||
$ref: usb.yaml#
|
||||
else:
|
||||
$ref: usb-xhci.yaml#
|
||||
|
||||
properties:
|
||||
extcon:
|
||||
maxItems: 1
|
||||
deprecated: true
|
||||
|
||||
usb-phy:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS PHY
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 19
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 19
|
||||
oneOf:
|
||||
- items:
|
||||
enum: [ usb2-phy, usb3-phy ]
|
||||
- items:
|
||||
pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$"
|
||||
|
||||
snps,usb2-lpm-disable:
|
||||
description: Indicate if we don't want to enable USB2 HW LPM for host
|
||||
mode.
|
||||
type: boolean
|
||||
|
||||
snps,usb3_lpm_capable:
|
||||
description: Determines if platform is USB3 LPM capable
|
||||
type: boolean
|
||||
|
||||
snps,usb2-gadget-lpm-disable:
|
||||
description: Indicate if we don't want to enable USB2 HW LPM for gadget
|
||||
mode.
|
||||
type: boolean
|
||||
|
||||
snps,dis-start-transfer-quirk:
|
||||
description:
|
||||
When set, disable isoc START TRANSFER command failure SW work-around
|
||||
for DWC_usb31 version 1.70a-ea06 and prior.
|
||||
type: boolean
|
||||
|
||||
snps,disable_scramble_quirk:
|
||||
description:
|
||||
True when SW should disable data scrambling. Only really useful for FPGA
|
||||
builds.
|
||||
type: boolean
|
||||
|
||||
snps,has-lpm-erratum:
|
||||
description: True when DWC3 was configured with LPM Erratum enabled
|
||||
type: boolean
|
||||
|
||||
snps,lpm-nyet-threshold:
|
||||
description: LPM NYET threshold
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
|
||||
snps,u2exit_lfps_quirk:
|
||||
description: Set if we want to enable u2exit lfps quirk
|
||||
type: boolean
|
||||
|
||||
snps,u2ss_inp3_quirk:
|
||||
description: Set if we enable P3 OK for U2/SS Inactive quirk
|
||||
type: boolean
|
||||
|
||||
snps,req_p1p2p3_quirk:
|
||||
description:
|
||||
When set, the core will always request for P1/P2/P3 transition sequence.
|
||||
type: boolean
|
||||
|
||||
snps,del_p1p2p3_quirk:
|
||||
description:
|
||||
When set core will delay P1/P2/P3 until a certain amount of 8B10B errors
|
||||
occur.
|
||||
type: boolean
|
||||
|
||||
snps,del_phy_power_chg_quirk:
|
||||
description: When set core will delay PHY power change from P0 to P1/P2/P3.
|
||||
type: boolean
|
||||
|
||||
snps,lfps_filter_quirk:
|
||||
description: When set core will filter LFPS reception.
|
||||
type: boolean
|
||||
|
||||
snps,rx_detect_poll_quirk:
|
||||
description:
|
||||
when set core will disable a 400us delay to start Polling LFPS after
|
||||
RX.Detect.
|
||||
type: boolean
|
||||
|
||||
snps,tx_de_emphasis_quirk:
|
||||
description: When set core will set Tx de-emphasis value
|
||||
type: boolean
|
||||
|
||||
snps,tx_de_emphasis:
|
||||
description:
|
||||
The value driven to the PHY is controlled by the LTSSM during USB3
|
||||
Compliance mode.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
enum:
|
||||
- 0 # -6dB de-emphasis
|
||||
- 1 # -3.5dB de-emphasis
|
||||
- 2 # No de-emphasis
|
||||
|
||||
snps,dis_u3_susphy_quirk:
|
||||
description: When set core will disable USB3 suspend phy
|
||||
type: boolean
|
||||
|
||||
snps,dis_u2_susphy_quirk:
|
||||
description: When set core will disable USB2 suspend phy
|
||||
type: boolean
|
||||
|
||||
snps,dis_enblslpm_quirk:
|
||||
description:
|
||||
When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal
|
||||
to the PHY.
|
||||
type: boolean
|
||||
|
||||
snps,dis-u1-entry-quirk:
|
||||
description: Set if link entering into U1 needs to be disabled
|
||||
type: boolean
|
||||
|
||||
snps,dis-u2-entry-quirk:
|
||||
description: Set if link entering into U2 needs to be disabled
|
||||
type: boolean
|
||||
|
||||
snps,dis_rxdet_inp3_quirk:
|
||||
description:
|
||||
When set core will disable receiver detection in PHY P3 power state.
|
||||
type: boolean
|
||||
|
||||
snps,dis-u2-freeclk-exists-quirk:
|
||||
description:
|
||||
When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2
|
||||
PHY doesn't provide a free-running PHY clock.
|
||||
type: boolean
|
||||
|
||||
snps,dis-del-phy-power-chg-quirk:
|
||||
description:
|
||||
When set core will change PHY power from P0 to P1/P2/P3 without delay.
|
||||
type: boolean
|
||||
|
||||
snps,dis-tx-ipgap-linecheck-quirk:
|
||||
description: When set, disable u2mac linestate check during HS transmit
|
||||
type: boolean
|
||||
|
||||
snps,parkmode-disable-ss-quirk:
|
||||
description:
|
||||
When set, all SuperSpeed bus instances in park mode are disabled.
|
||||
type: boolean
|
||||
|
||||
snps,parkmode-disable-hs-quirk:
|
||||
description:
|
||||
When set, all HighSpeed bus instances in park mode are disabled.
|
||||
type: boolean
|
||||
|
||||
snps,dis_metastability_quirk:
|
||||
description:
|
||||
When set, disable metastability workaround. CAUTION! Use only if you are
|
||||
absolutely sure of it.
|
||||
type: boolean
|
||||
|
||||
snps,dis-split-quirk:
|
||||
description:
|
||||
When set, change the way URBs are handled by the driver. Needed to
|
||||
avoid -EPROTO errors with usbhid on some devices (Hikey 970).
|
||||
type: boolean
|
||||
|
||||
snps,gfladj-refclk-lpm-sel-quirk:
|
||||
description:
|
||||
When set, run the SOF/ITP counter based on ref_clk.
|
||||
type: boolean
|
||||
|
||||
snps,resume-hs-terminations:
|
||||
description:
|
||||
Fix the issue of HS terminations CRC error on resume by enabling this
|
||||
quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end
|
||||
of resume. This option is to support certain legacy ULPI PHYs.
|
||||
type: boolean
|
||||
|
||||
snps,ulpi-ext-vbus-drv:
|
||||
description:
|
||||
Some ULPI USB PHY does not support internal VBUS supply, and driving
|
||||
the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL
|
||||
bit. When set, the xhci host will configure the USB2 PHY drives VBUS
|
||||
with an external supply.
|
||||
type: boolean
|
||||
|
||||
snps,is-utmi-l1-suspend:
|
||||
description:
|
||||
True when DWC3 asserts output signal utmi_l1_suspend_n, false when
|
||||
asserts utmi_sleep_n.
|
||||
type: boolean
|
||||
|
||||
snps,hird-threshold:
|
||||
description: HIRD threshold
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
|
||||
snps,hsphy_interface:
|
||||
description:
|
||||
High-Speed PHY interface selection between UTMI+ and ULPI when the
|
||||
DWC_USB3_HSPHY_INTERFACE has value 3.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [utmi, ulpi]
|
||||
|
||||
snps,quirk-frame-length-adjustment:
|
||||
description:
|
||||
Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
|
||||
length adjustment when the fladj_30mhz_sdbnd signal is invalid or
|
||||
incorrect.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 0x3f
|
||||
|
||||
snps,ref-clock-period-ns:
|
||||
description:
|
||||
Value for REFCLKPER field of GUCTL register for reference clock period in
|
||||
nanoseconds, when the hardware set default does not match the actual
|
||||
clock.
|
||||
|
||||
This binding is deprecated. Instead, provide an appropriate reference clock.
|
||||
minimum: 8
|
||||
maximum: 62
|
||||
deprecated: true
|
||||
|
||||
snps,rx-thr-num-pkt:
|
||||
description:
|
||||
USB RX packet threshold count. In host mode, this field specifies
|
||||
the space that must be available in the RX FIFO before the core can
|
||||
start the corresponding USB RX transaction (burst).
|
||||
In device mode, this field specifies the space that must be
|
||||
available in the RX FIFO before the core can send ERDY for a
|
||||
flow-controlled endpoint. It is only used for SuperSpeed.
|
||||
The valid values for this field are from 1 to 15. (DWC3 SuperSpeed
|
||||
USB 3.0 Controller Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 15
|
||||
|
||||
snps,rx-max-burst:
|
||||
description:
|
||||
Max USB RX burst size. In host mode, this field specifies the
|
||||
Maximum Bulk IN burst the DWC_usb3 core can perform. When the system
|
||||
bus is slower than the USB, RX FIFO can overrun during a long burst.
|
||||
You can program a smaller value to this field to limit the RX burst
|
||||
size that the core can perform. It only applies to SS Bulk,
|
||||
Isochronous, and Interrupt IN endpoints in the host mode.
|
||||
In device mode, this field specifies the NUMP value that is sent in
|
||||
ERDY for an OUT endpoint.
|
||||
The valid values for this field are from 1 to 16. (DWC3 SuperSpeed
|
||||
USB 3.0 Controller Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-thr-num-pkt:
|
||||
description:
|
||||
USB TX packet threshold count. This field specifies the number of
|
||||
packets that must be in the TXFIFO before the core can start
|
||||
transmission for the corresponding USB transaction (burst).
|
||||
This count is valid in both host and device modes. It is only used
|
||||
for SuperSpeed operation.
|
||||
Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller
|
||||
Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 15
|
||||
|
||||
snps,tx-max-burst:
|
||||
description:
|
||||
Max USB TX burst size. When the system bus is slower than the USB,
|
||||
TX FIFO can underrun during a long burst. Program a smaller value
|
||||
to this field to limit the TX burst size that the core can execute.
|
||||
In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt
|
||||
OUT endpoints. This value is not used in device mode.
|
||||
Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller
|
||||
Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,rx-thr-num-pkt-prd:
|
||||
description:
|
||||
Periodic ESS RX packet threshold count (host mode only). Set this and
|
||||
snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.4) to enable periodic ESS RX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,rx-max-burst-prd:
|
||||
description:
|
||||
Max periodic ESS RX burst size (host mode only). Set this and
|
||||
snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.4) to enable periodic ESS RX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-thr-num-pkt-prd:
|
||||
description:
|
||||
Periodic ESS TX packet threshold count (host mode only). Set this and
|
||||
snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.3) to enable periodic ESS TX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-max-burst-prd:
|
||||
description:
|
||||
Max periodic ESS TX burst size (host mode only). Set this and
|
||||
snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.3) to enable periodic ESS TX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
tx-fifo-resize:
|
||||
description: Determines if the TX fifos can be dynamically resized depending
|
||||
on the number of IN endpoints used and if bursting is supported. This
|
||||
may help improve bandwidth on platforms with higher system latencies, as
|
||||
increased fifo space allows for the controller to prefetch data into its
|
||||
internal memory.
|
||||
type: boolean
|
||||
|
||||
tx-fifo-max-num:
|
||||
description: Specifies the max number of packets the txfifo resizing logic
|
||||
can account for when higher endpoint bursting is used. (bMaxBurst > 6) The
|
||||
higher the number, the more fifo space the txfifo resizing logic will
|
||||
allocate for that endpoint.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 3
|
||||
|
||||
snps,incr-burst-type-adjustment:
|
||||
description:
|
||||
Value for INCR burst type of GSBUSCFG0 register, undefined length INCR
|
||||
burst type enable and INCRx type. A single value means INCRX burst mode
|
||||
enabled. If more than one value specified, undefined length INCR burst
|
||||
type will be enabled with burst lengths utilized up to the maximum
|
||||
of the values passed in this property.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
uniqueItems: true
|
||||
items:
|
||||
enum: [1, 4, 8, 16, 32, 64, 128, 256]
|
||||
|
||||
num-hc-interrupters:
|
||||
maximum: 8
|
||||
default: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
This port is used with the 'usb-role-switch' property to connect the
|
||||
dwc3 to type C connector.
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description:
|
||||
Those ports should be used with any connector to the data bus of this
|
||||
controller using the OF graph bindings specified if the "usb-role-switch"
|
||||
property is used.
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: High Speed (HS) data bus.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Super Speed (SS) data bus.
|
||||
|
||||
wakeup-source:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Enable USB remote wakeup.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: true
|
||||
...
|
||||
|
||||
@@ -15,18 +15,7 @@ description:
|
||||
compatible string.
|
||||
|
||||
allOf:
|
||||
- $ref: usb-drd.yaml#
|
||||
- if:
|
||||
properties:
|
||||
dr_mode:
|
||||
const: peripheral
|
||||
|
||||
required:
|
||||
- dr_mode
|
||||
then:
|
||||
$ref: usb.yaml#
|
||||
else:
|
||||
$ref: usb-xhci.yaml#
|
||||
- $ref: snps,dwc3-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
@@ -70,32 +59,9 @@ properties:
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
extcon:
|
||||
maxItems: 1
|
||||
deprecated: true
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
usb-phy:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB2/HS PHY
|
||||
- description: USB3/SS PHY
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 19
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
maxItems: 19
|
||||
oneOf:
|
||||
- items:
|
||||
enum: [ usb2-phy, usb3-phy ]
|
||||
- items:
|
||||
pattern: "^usb(2-([0-9]|1[0-4])|3-[0-3])$"
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
The DWC3 has 2 power-domains. The power management unit (PMU) and
|
||||
@@ -109,361 +75,6 @@ properties:
|
||||
resets:
|
||||
minItems: 1
|
||||
|
||||
snps,usb2-lpm-disable:
|
||||
description: Indicate if we don't want to enable USB2 HW LPM for host
|
||||
mode.
|
||||
type: boolean
|
||||
|
||||
snps,usb3_lpm_capable:
|
||||
description: Determines if platform is USB3 LPM capable
|
||||
type: boolean
|
||||
|
||||
snps,usb2-gadget-lpm-disable:
|
||||
description: Indicate if we don't want to enable USB2 HW LPM for gadget
|
||||
mode.
|
||||
type: boolean
|
||||
|
||||
snps,dis-start-transfer-quirk:
|
||||
description:
|
||||
When set, disable isoc START TRANSFER command failure SW work-around
|
||||
for DWC_usb31 version 1.70a-ea06 and prior.
|
||||
type: boolean
|
||||
|
||||
snps,disable_scramble_quirk:
|
||||
description:
|
||||
True when SW should disable data scrambling. Only really useful for FPGA
|
||||
builds.
|
||||
type: boolean
|
||||
|
||||
snps,has-lpm-erratum:
|
||||
description: True when DWC3 was configured with LPM Erratum enabled
|
||||
type: boolean
|
||||
|
||||
snps,lpm-nyet-threshold:
|
||||
description: LPM NYET threshold
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
|
||||
snps,u2exit_lfps_quirk:
|
||||
description: Set if we want to enable u2exit lfps quirk
|
||||
type: boolean
|
||||
|
||||
snps,u2ss_inp3_quirk:
|
||||
description: Set if we enable P3 OK for U2/SS Inactive quirk
|
||||
type: boolean
|
||||
|
||||
snps,req_p1p2p3_quirk:
|
||||
description:
|
||||
When set, the core will always request for P1/P2/P3 transition sequence.
|
||||
type: boolean
|
||||
|
||||
snps,del_p1p2p3_quirk:
|
||||
description:
|
||||
When set core will delay P1/P2/P3 until a certain amount of 8B10B errors
|
||||
occur.
|
||||
type: boolean
|
||||
|
||||
snps,del_phy_power_chg_quirk:
|
||||
description: When set core will delay PHY power change from P0 to P1/P2/P3.
|
||||
type: boolean
|
||||
|
||||
snps,lfps_filter_quirk:
|
||||
description: When set core will filter LFPS reception.
|
||||
type: boolean
|
||||
|
||||
snps,rx_detect_poll_quirk:
|
||||
description:
|
||||
when set core will disable a 400us delay to start Polling LFPS after
|
||||
RX.Detect.
|
||||
type: boolean
|
||||
|
||||
snps,tx_de_emphasis_quirk:
|
||||
description: When set core will set Tx de-emphasis value
|
||||
type: boolean
|
||||
|
||||
snps,tx_de_emphasis:
|
||||
description:
|
||||
The value driven to the PHY is controlled by the LTSSM during USB3
|
||||
Compliance mode.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
enum:
|
||||
- 0 # -6dB de-emphasis
|
||||
- 1 # -3.5dB de-emphasis
|
||||
- 2 # No de-emphasis
|
||||
|
||||
snps,dis_u3_susphy_quirk:
|
||||
description: When set core will disable USB3 suspend phy
|
||||
type: boolean
|
||||
|
||||
snps,dis_u2_susphy_quirk:
|
||||
description: When set core will disable USB2 suspend phy
|
||||
type: boolean
|
||||
|
||||
snps,dis_enblslpm_quirk:
|
||||
description:
|
||||
When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal
|
||||
to the PHY.
|
||||
type: boolean
|
||||
|
||||
snps,dis-u1-entry-quirk:
|
||||
description: Set if link entering into U1 needs to be disabled
|
||||
type: boolean
|
||||
|
||||
snps,dis-u2-entry-quirk:
|
||||
description: Set if link entering into U2 needs to be disabled
|
||||
type: boolean
|
||||
|
||||
snps,dis_rxdet_inp3_quirk:
|
||||
description:
|
||||
When set core will disable receiver detection in PHY P3 power state.
|
||||
type: boolean
|
||||
|
||||
snps,dis-u2-freeclk-exists-quirk:
|
||||
description:
|
||||
When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2
|
||||
PHY doesn't provide a free-running PHY clock.
|
||||
type: boolean
|
||||
|
||||
snps,dis-del-phy-power-chg-quirk:
|
||||
description:
|
||||
When set core will change PHY power from P0 to P1/P2/P3 without delay.
|
||||
type: boolean
|
||||
|
||||
snps,dis-tx-ipgap-linecheck-quirk:
|
||||
description: When set, disable u2mac linestate check during HS transmit
|
||||
type: boolean
|
||||
|
||||
snps,parkmode-disable-ss-quirk:
|
||||
description:
|
||||
When set, all SuperSpeed bus instances in park mode are disabled.
|
||||
type: boolean
|
||||
|
||||
snps,parkmode-disable-hs-quirk:
|
||||
description:
|
||||
When set, all HighSpeed bus instances in park mode are disabled.
|
||||
type: boolean
|
||||
|
||||
snps,dis_metastability_quirk:
|
||||
description:
|
||||
When set, disable metastability workaround. CAUTION! Use only if you are
|
||||
absolutely sure of it.
|
||||
type: boolean
|
||||
|
||||
snps,dis-split-quirk:
|
||||
description:
|
||||
When set, change the way URBs are handled by the driver. Needed to
|
||||
avoid -EPROTO errors with usbhid on some devices (Hikey 970).
|
||||
type: boolean
|
||||
|
||||
snps,gfladj-refclk-lpm-sel-quirk:
|
||||
description:
|
||||
When set, run the SOF/ITP counter based on ref_clk.
|
||||
type: boolean
|
||||
|
||||
snps,resume-hs-terminations:
|
||||
description:
|
||||
Fix the issue of HS terminations CRC error on resume by enabling this
|
||||
quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end
|
||||
of resume. This option is to support certain legacy ULPI PHYs.
|
||||
type: boolean
|
||||
|
||||
snps,ulpi-ext-vbus-drv:
|
||||
description:
|
||||
Some ULPI USB PHY does not support internal VBUS supply, and driving
|
||||
the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL
|
||||
bit. When set, the xhci host will configure the USB2 PHY drives VBUS
|
||||
with an external supply.
|
||||
type: boolean
|
||||
|
||||
snps,is-utmi-l1-suspend:
|
||||
description:
|
||||
True when DWC3 asserts output signal utmi_l1_suspend_n, false when
|
||||
asserts utmi_sleep_n.
|
||||
type: boolean
|
||||
|
||||
snps,hird-threshold:
|
||||
description: HIRD threshold
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
|
||||
snps,hsphy_interface:
|
||||
description:
|
||||
High-Speed PHY interface selection between UTMI+ and ULPI when the
|
||||
DWC_USB3_HSPHY_INTERFACE has value 3.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [utmi, ulpi]
|
||||
|
||||
snps,quirk-frame-length-adjustment:
|
||||
description:
|
||||
Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
|
||||
length adjustment when the fladj_30mhz_sdbnd signal is invalid or
|
||||
incorrect.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 0x3f
|
||||
|
||||
snps,ref-clock-period-ns:
|
||||
description:
|
||||
Value for REFCLKPER field of GUCTL register for reference clock period in
|
||||
nanoseconds, when the hardware set default does not match the actual
|
||||
clock.
|
||||
|
||||
This binding is deprecated. Instead, provide an appropriate reference clock.
|
||||
minimum: 8
|
||||
maximum: 62
|
||||
deprecated: true
|
||||
|
||||
snps,rx-thr-num-pkt:
|
||||
description:
|
||||
USB RX packet threshold count. In host mode, this field specifies
|
||||
the space that must be available in the RX FIFO before the core can
|
||||
start the corresponding USB RX transaction (burst).
|
||||
In device mode, this field specifies the space that must be
|
||||
available in the RX FIFO before the core can send ERDY for a
|
||||
flow-controlled endpoint. It is only used for SuperSpeed.
|
||||
The valid values for this field are from 1 to 15. (DWC3 SuperSpeed
|
||||
USB 3.0 Controller Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 15
|
||||
|
||||
snps,rx-max-burst:
|
||||
description:
|
||||
Max USB RX burst size. In host mode, this field specifies the
|
||||
Maximum Bulk IN burst the DWC_usb3 core can perform. When the system
|
||||
bus is slower than the USB, RX FIFO can overrun during a long burst.
|
||||
You can program a smaller value to this field to limit the RX burst
|
||||
size that the core can perform. It only applies to SS Bulk,
|
||||
Isochronous, and Interrupt IN endpoints in the host mode.
|
||||
In device mode, this field specifies the NUMP value that is sent in
|
||||
ERDY for an OUT endpoint.
|
||||
The valid values for this field are from 1 to 16. (DWC3 SuperSpeed
|
||||
USB 3.0 Controller Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-thr-num-pkt:
|
||||
description:
|
||||
USB TX packet threshold count. This field specifies the number of
|
||||
packets that must be in the TXFIFO before the core can start
|
||||
transmission for the corresponding USB transaction (burst).
|
||||
This count is valid in both host and device modes. It is only used
|
||||
for SuperSpeed operation.
|
||||
Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller
|
||||
Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 15
|
||||
|
||||
snps,tx-max-burst:
|
||||
description:
|
||||
Max USB TX burst size. When the system bus is slower than the USB,
|
||||
TX FIFO can underrun during a long burst. Program a smaller value
|
||||
to this field to limit the TX burst size that the core can execute.
|
||||
In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt
|
||||
OUT endpoints. This value is not used in device mode.
|
||||
Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller
|
||||
Databook)
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,rx-thr-num-pkt-prd:
|
||||
description:
|
||||
Periodic ESS RX packet threshold count (host mode only). Set this and
|
||||
snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.4) to enable periodic ESS RX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,rx-max-burst-prd:
|
||||
description:
|
||||
Max periodic ESS RX burst size (host mode only). Set this and
|
||||
snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.4) to enable periodic ESS RX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-thr-num-pkt-prd:
|
||||
description:
|
||||
Periodic ESS TX packet threshold count (host mode only). Set this and
|
||||
snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.3) to enable periodic ESS TX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
snps,tx-max-burst-prd:
|
||||
description:
|
||||
Max periodic ESS TX burst size (host mode only). Set this and
|
||||
snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
|
||||
programming guide section 1.2.3) to enable periodic ESS TX threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
tx-fifo-resize:
|
||||
description: Determines if the TX fifos can be dynamically resized depending
|
||||
on the number of IN endpoints used and if bursting is supported. This
|
||||
may help improve bandwidth on platforms with higher system latencies, as
|
||||
increased fifo space allows for the controller to prefetch data into its
|
||||
internal memory.
|
||||
type: boolean
|
||||
|
||||
tx-fifo-max-num:
|
||||
description: Specifies the max number of packets the txfifo resizing logic
|
||||
can account for when higher endpoint bursting is used. (bMaxBurst > 6) The
|
||||
higher the number, the more fifo space the txfifo resizing logic will
|
||||
allocate for that endpoint.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 3
|
||||
|
||||
snps,incr-burst-type-adjustment:
|
||||
description:
|
||||
Value for INCR burst type of GSBUSCFG0 register, undefined length INCR
|
||||
burst type enable and INCRx type. A single value means INCRX burst mode
|
||||
enabled. If more than one value specified, undefined length INCR burst
|
||||
type will be enabled with burst lengths utilized up to the maximum
|
||||
of the values passed in this property.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
uniqueItems: true
|
||||
items:
|
||||
enum: [1, 4, 8, 16, 32, 64, 128, 256]
|
||||
|
||||
num-hc-interrupters:
|
||||
maximum: 8
|
||||
default: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
This port is used with the 'usb-role-switch' property to connect the
|
||||
dwc3 to type C connector.
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description:
|
||||
Those ports should be used with any connector to the data bus of this
|
||||
controller using the OF graph bindings specified if the "usb-role-switch"
|
||||
property is used.
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: High Speed (HS) data bus.
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Super Speed (SS) data bus.
|
||||
|
||||
wakeup-source:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Enable USB remote wakeup.
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
|
||||
@@ -56,26 +56,26 @@ examples:
|
||||
#size-cells = <0>;
|
||||
|
||||
hd3ss3220@47 {
|
||||
compatible = "ti,hd3ss3220";
|
||||
reg = <0x47>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <3>;
|
||||
compatible = "ti,hd3ss3220";
|
||||
reg = <0x47>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <3>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
hd3ss3220_in_ep: endpoint {
|
||||
remote-endpoint = <&ss_ep>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
hd3ss3220_out_ep: endpoint {
|
||||
remote-endpoint = <&usb3_role_switch>;
|
||||
};
|
||||
};
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
hd3ss3220_in_ep: endpoint {
|
||||
remote-endpoint = <&ss_ep>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
hd3ss3220_out_ep: endpoint {
|
||||
remote-endpoint = <&usb3_role_switch>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -48,8 +48,8 @@ examples:
|
||||
device_type = "pci";
|
||||
|
||||
usb@0 {
|
||||
compatible = "pci104c,8241";
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
ti,pwron-active-high;
|
||||
compatible = "pci104c,8241";
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
ti,pwron-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user