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Merge ../linux-2.6

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This commit is contained in:
Mauro Carvalho Chehab
2008-07-27 22:23:18 -03:00
parent f3409f71a7 c9272c4f9f
commit c2f90e9536
81 changed files with 807 additions and 965 deletions
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10
Documentation/arm/Interrupts
View File

@@ -138,14 +138,8 @@ So, what's changed?
Set active the IRQ edge(s)/level. This replaces the
SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
function. Type should be one of the following:
#define IRQT_NOEDGE (0)
#define IRQT_RISING (__IRQT_RISEDGE)
#define IRQT_FALLING (__IRQT_FALEDGE)
#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
#define IRQT_LOW (__IRQT_LOWLVL)
#define IRQT_HIGH (__IRQT_HIGHLVL)
function. Type should be one of IRQ_TYPE_xxx defined in
<linux/irq.h>
3. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.

6
arch/arm/Kconfig
View File

@@ -314,7 +314,7 @@ config ARCH_IOP32X
select PLAT_IOP
select PCI
select GENERIC_GPIO
select HAVE_GPIO_LIB
select ARCH_REQUIRE_GPIOLIB
help
Support for Intel's 80219 and IOP32X (XScale) family of
processors.
@@ -325,7 +325,7 @@ config ARCH_IOP33X
select PLAT_IOP
select PCI
select GENERIC_GPIO
select HAVE_GPIO_LIB
select ARCH_REQUIRE_GPIOLIB
help
Support for Intel's IOP33X (XScale) family of processors.
@@ -418,7 +418,7 @@ config ARCH_MXC
select GENERIC_CLOCKEVENTS
select ARCH_MTD_XIP
select GENERIC_GPIO
select HAVE_GPIO_LIB
select ARCH_REQUIRE_GPIOLIB
help
Support for Freescale MXC/iMX-based family of processors

2
arch/arm/Makefile
View File

@@ -67,7 +67,7 @@ tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
tune-$(CONFIG_CPU_ARM740T) :=-mtune=arm7tdmi
tune-$(CONFIG_CPU_ARM9TDMI) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM940T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM946T) :=$(call cc-option,-mtune=arm9e,-mtune=arm9tdmi)
tune-$(CONFIG_CPU_ARM946E) :=$(call cc-option,-mtune=arm9e,-mtune=arm9tdmi)
tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi

10
arch/arm/common/locomo.c
View File

@@ -331,17 +331,17 @@ static int locomo_gpio_type(unsigned int irq, unsigned int type)
mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
if (type == IRQT_PROBE) {
if (type == IRQ_TYPE_PROBE) {
if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
return 0;
type = __IRQT_RISEDGE | __IRQT_FALEDGE;
type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
}
if (type & __IRQT_RISEDGE)
if (type & IRQ_TYPE_EDGE_RISING)
GPIO_IRQ_rising_edge |= mask;
else
GPIO_IRQ_rising_edge &= ~mask;
if (type & __IRQT_FALEDGE)
if (type & IRQ_TYPE_EDGE_FALLING)
GPIO_IRQ_falling_edge |= mask;
else
GPIO_IRQ_falling_edge &= ~mask;
@@ -473,7 +473,7 @@ static void locomo_setup_irq(struct locomo *lchip)
/*
* Install handler for IRQ_LOCOMO_HW.
*/
set_irq_type(lchip->irq, IRQT_FALLING);
set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
set_irq_chip_data(lchip->irq, irqbase);
set_irq_chained_handler(lchip->irq, locomo_handler);

14
arch/arm/common/sa1111.c
View File

@@ -241,14 +241,14 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip0;
if (flags == IRQT_PROBE)
if (flags == IRQ_TYPE_PROBE)
return 0;
if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
return -EINVAL;
ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
if (flags & __IRQT_RISEDGE)
if (flags & IRQ_TYPE_EDGE_RISING)
ip0 &= ~mask;
else
ip0 |= mask;
@@ -338,14 +338,14 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip1;
if (flags == IRQT_PROBE)
if (flags == IRQ_TYPE_PROBE)
return 0;
if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
return -EINVAL;
ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
if (flags & __IRQT_RISEDGE)
if (flags & IRQ_TYPE_EDGE_RISING)
ip1 &= ~mask;
else
ip1 |= mask;
@@ -427,7 +427,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
/*
* Register SA1111 interrupt
*/
set_irq_type(sachip->irq, IRQT_RISING);
set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
set_irq_data(sachip->irq, irqbase);
set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
}

1113
arch/arm/configs/eseries_pxa_defconfig
View File

File diff suppressed because it is too large Load Diff

6
arch/arm/mach-at91/board-cap9adk.c
View File

@@ -330,10 +330,10 @@ static void __init cap9adk_board_init(void)
/* Serial */
at91_add_device_serial();
/* USB Host */
set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
at91_add_device_usbh(&cap9adk_usbh_data);
/* USB HS */
set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH);
set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
at91_add_device_usba(&cap9adk_usba_udc_data);
/* SPI */
at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -350,7 +350,7 @@ static void __init cap9adk_board_init(void)
/* I2C */
at91_add_device_i2c(NULL, 0);
/* LCD Controller */
set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
at91_add_device_lcdc(&cap9adk_lcdc_data);
/* AC97 */
at91_add_device_ac97(&cap9adk_ac97_data);

0
arch/arm/mach-at91/board-yl-9200.c Executable file → Normal file
View File

8
arch/arm/mach-at91/irq.c
View File

@@ -56,19 +56,19 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
unsigned int smr, srctype;
switch (type) {
case IRQT_HIGH:
case IRQ_TYPE_LEVEL_HIGH:
srctype = AT91_AIC_SRCTYPE_HIGH;
break;
case IRQT_RISING:
case IRQ_TYPE_EDGE_RISING:
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQT_LOW:
case IRQ_TYPE_LEVEL_LOW:
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_LOW;
else
return -EINVAL;
break;
case IRQT_FALLING:
case IRQ_TYPE_EDGE_FALLING:
if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_FALLING;
else

14
arch/arm/mach-ep93xx/core.c
View File

@@ -226,7 +226,7 @@ static void ep93xx_gpio_irq_ack(unsigned int irq)
int port = line >> 3;
int port_mask = 1 << (line & 7);
if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) {
if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
gpio_int_type2[port] ^= port_mask; /* switch edge direction */
ep93xx_gpio_update_int_params(port);
}
@@ -240,7 +240,7 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
int port = line >> 3;
int port_mask = 1 << (line & 7);
if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE)
if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
gpio_int_type2[port] ^= port_mask; /* switch edge direction */
gpio_int_unmasked[port] &= ~port_mask;
@@ -283,27 +283,27 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
gpio_direction_input(gpio);
switch (type) {
case IRQT_RISING:
case IRQ_TYPE_EDGE_RISING:
gpio_int_type1[port] |= port_mask;
gpio_int_type2[port] |= port_mask;
desc->handle_irq = handle_edge_irq;
break;
case IRQT_FALLING:
case IRQ_TYPE_EDGE_FALLING:
gpio_int_type1[port] |= port_mask;
gpio_int_type2[port] &= ~port_mask;
desc->handle_irq = handle_edge_irq;
break;
case IRQT_HIGH:
case IRQ_TYPE_LEVEL_HIGH:
gpio_int_type1[port] &= ~port_mask;
gpio_int_type2[port] |= port_mask;
desc->handle_irq = handle_level_irq;
break;
case IRQT_LOW:
case IRQ_TYPE_LEVEL_LOW:
gpio_int_type1[port] &= ~port_mask;
gpio_int_type2[port] &= ~port_mask;
desc->handle_irq = handle_level_irq;
break;
case IRQT_BOTHEDGE:
case IRQ_TYPE_EDGE_BOTH:
gpio_int_type1[port] |= port_mask;
/* set initial polarity based on current input level */
if (gpio_get_value(gpio))

12
arch/arm/mach-imx/irq.c
View File

@@ -111,7 +111,7 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
reg = irq >> 5;
bit = 1 << (irq % 32);
if (type == IRQT_PROBE) {
if (type == IRQ_TYPE_PROBE) {
/* Don't mess with enabled GPIOs using preconfigured edges or
GPIOs set to alternate function during probe */
/* TODO: support probe */
@@ -120,7 +120,7 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
// return 0;
// if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2)))
// return 0;
// type = __IRQT_RISEDGE | __IRQT_FALEDGE;
// type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
}
GIUS(reg) |= bit;
@@ -128,19 +128,19 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
DEBUG_IRQ("setting type of irq %d to ", _irq);
if (type & __IRQT_RISEDGE) {
if (type & IRQ_TYPE_EDGE_RISING) {
DEBUG_IRQ("rising edges\n");
irq_type = 0x0;
}
if (type & __IRQT_FALEDGE) {
if (type & IRQ_TYPE_EDGE_FALLING) {
DEBUG_IRQ("falling edges\n");
irq_type = 0x1;
}
if (type & __IRQT_LOWLVL) {
if (type & IRQ_TYPE_LEVEL_LOW) {
DEBUG_IRQ("low level\n");
irq_type = 0x3;
}
if (type & __IRQT_HIGHLVL) {
if (type & IRQ_TYPE_LEVEL_HIGH) {
DEBUG_IRQ("high level\n");
irq_type = 0x2;
}

8
arch/arm/mach-ixp2000/core.c
View File

@@ -329,19 +329,19 @@ static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
/*
* Then, set the proper trigger type.
*/
if (type & IRQT_FALLING)
if (type & IRQ_TYPE_EDGE_FALLING)
GPIO_IRQ_falling_edge |= 1 << line;
else
GPIO_IRQ_falling_edge &= ~(1 << line);
if (type & IRQT_RISING)
if (type & IRQ_TYPE_EDGE_RISING)
GPIO_IRQ_rising_edge |= 1 << line;
else
GPIO_IRQ_rising_edge &= ~(1 << line);
if (type & IRQT_LOW)
if (type & IRQ_TYPE_LEVEL_LOW)
GPIO_IRQ_level_low |= 1 << line;
else
GPIO_IRQ_level_low &= ~(1 << line);
if (type & IRQT_HIGH)
if (type & IRQ_TYPE_LEVEL_HIGH)
GPIO_IRQ_level_high |= 1 << line;
else
GPIO_IRQ_level_high &= ~(1 << line);

10
arch/arm/mach-ixp23xx/core.c
View File

@@ -126,23 +126,23 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
return -EINVAL;
switch (type) {
case IRQT_BOTHEDGE:
case IRQ_TYPE_EDGE_BOTH:
int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL;
irq_type = IXP23XX_IRQ_EDGE;
break;
case IRQT_RISING:
case IRQ_TYPE_EDGE_RISING:
int_style = IXP23XX_GPIO_STYLE_RISING_EDGE;
irq_type = IXP23XX_IRQ_EDGE;
break;
case IRQT_FALLING:
case IRQ_TYPE_EDGE_FALLING:
int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE;
irq_type = IXP23XX_IRQ_EDGE;
break;
case IRQT_HIGH:
case IRQ_TYPE_LEVEL_HIGH:
int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH;
irq_type = IXP23XX_IRQ_LEVEL;
break;
case IRQT_LOW:
case IRQ_TYPE_LEVEL_LOW:
int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW;
irq_type = IXP23XX_IRQ_LEVEL;
break;

4
arch/arm/mach-ixp23xx/roadrunner.c
View File

@@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
static void __init roadrunner_pci_preinit(void)
{
set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQT_LOW);
set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQT_LOW);
set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
ixp23xx_pci_preinit();
}

8
arch/arm/mach-ixp4xx/avila-pci.c
View File

@@ -30,10 +30,10 @@
void __init avila_pci_preinit(void)
{
set_irq_type(IRQ_AVILA_PCI_INTA, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTB, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTC, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTD, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_AVILA_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_AVILA_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_AVILA_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}

10
arch/arm/mach-ixp4xx/common.c
View File

@@ -142,23 +142,23 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
return -EINVAL;
switch (type){
case IRQT_BOTHEDGE:
case IRQ_TYPE_EDGE_BOTH:
int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
irq_type = IXP4XX_IRQ_EDGE;
break;
case IRQT_RISING:
case IRQ_TYPE_EDGE_RISING:
int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
irq_type = IXP4XX_IRQ_EDGE;
break;
case IRQT_FALLING:
case IRQ_TYPE_EDGE_FALLING:
int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
irq_type = IXP4XX_IRQ_EDGE;
break;
case IRQT_HIGH:
case IRQ_TYPE_LEVEL_HIGH:
int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
irq_type = IXP4XX_IRQ_LEVEL;
break;
case IRQT_LOW:
case IRQ_TYPE_LEVEL_LOW:
int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
irq_type = IXP4XX_IRQ_LEVEL;
break;

4
arch/arm/mach-ixp4xx/coyote-pci.c
View File

@@ -27,8 +27,8 @@
void __init coyote_pci_preinit(void)
{
set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW);
set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}

12
arch/arm/mach-ixp4xx/dsmg600-pci.c
View File

@@ -25,12 +25,12 @@
void __init dsmg600_pci_preinit(void)
{
set_irq_type(IRQ_DSMG600_PCI_INTA, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTB, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTC, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTD, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTE, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTF, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTE, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTF, IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}

6
arch/arm/mach-ixp4xx/fsg-pci.c
View File

@@ -25,9 +25,9 @@
void __init fsg_pci_preinit(void)
{
set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
set_irq_type(IRQ_FSG_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_FSG_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_FSG_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}

4
arch/arm/mach-ixp4xx/gateway7001-pci.c
View File

@@ -29,8 +29,8 @@
void __init gateway7001_pci_preinit(void)
{
set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}

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