Merge tag 'mips_6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:
 "Cleanups and fixes"

* tag 'mips_6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: pci-legacy: Override pci_address_to_pio
  MIPS: Loongson64: env: Use str_on_off() helper in prom_lefi_init_env()
  MIPS: migrate to generic rule for built-in DTBs
  mips: fix shmctl/semctl/msgctl syscall for o32
  mips/math-emu: fix emulation of the prefx instruction
  MIPS: Loongson: Add comments for interface_info
  MIPS: Loongson64: remove ROM Size unit in boardinfo
  MIPS: traps: Use str_enabled_disabled() in parity_protection_init()
  MIPS: ftrace: Declare ftrace_get_parent_ra_addr() as static
  Revert "MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT"
  MIPS: Fix the wrong format specifier
  MIPS: Add a blank line after __HEAD
  MIPS: kernel: Rename read/write_c0_ecc to read/writec0_errctl
This commit is contained in:
Linus Torvalds
2025-01-27 09:00:25 -08:00
25 changed files with 52 additions and 71 deletions

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@@ -29,10 +29,12 @@ config MIPS
select ARCH_WANT_IPC_PARSE_VERSION
select ARCH_WANT_LD_ORPHAN_WARN
select BUILDTIME_TABLE_SORT
select BUILTIN_DTB_ALL if BUILTIN_DTB
select CLONE_BACKWARDS
select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
select CPU_PM if CPU_IDLE || SUSPEND
select GENERIC_ATOMIC64 if !64BIT
select GENERIC_BUILTIN_DTB if BUILTIN_DTB
select GENERIC_CMOS_UPDATE
select GENERIC_CPU_AUTOPROBE
select GENERIC_GETTIMEOFDAY
@@ -1084,7 +1086,6 @@ config CSRC_IOASIC
config CSRC_R4K
select CLOCKSOURCE_WATCHDOG if CPU_FREQ
select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
bool
config CSRC_SB1250

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@@ -423,9 +423,6 @@ endif
CLEAN_FILES += vmlinux.32 vmlinux.64
# device-trees
core-y += arch/mips/boot/dts/
archprepare:
ifdef CONFIG_MIPS32_N32
@$(kecho) ' Checking missing-syscalls for N32'

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@@ -16,5 +16,3 @@ subdir-$(CONFIG_ATH79) += qca
subdir-$(CONFIG_RALINK) += ralink
subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek
subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga
obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))

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@@ -33,5 +33,3 @@ dtb-$(CONFIG_DT_NONE) += \
bcm97420c.dtb \
bcm97425svmb.dtb \
bcm97435svmb.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -1,4 +1,2 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -5,5 +5,3 @@ dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb
dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb
dtb-$(CONFIG_X1000_CU1000_NEO) += cu1000-neo.dtb
dtb-$(CONFIG_X1830_CU1830_NEO) += cu1830-neo.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -1,4 +1,2 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_DT_EASY50712) += danube_easy50712.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -5,5 +5,3 @@ dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_8core_rs780e.dtb
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64g_4core_ls7a.dtb
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64v_4core_virtio.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -8,6 +8,3 @@ dtb-$(CONFIG_SOC_VCOREIII) += \
ocelot_pcb123.dtb \
serval_pcb105.dtb \
serval_pcb106.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_MIPS_MALTA) += malta.dtb
dtb-$(CONFIG_LEGACY_BOARD_SEAD3) += sead3.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -3,5 +3,3 @@ dtb-$(CONFIG_DTB_PIC32_MZDA_SK) += pic32mzda_sk.dtb
dtb-$(CONFIG_DTB_PIC32_NONE) += \
pic32mzda_sk.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -10,5 +10,3 @@ dtb-$(CONFIG_SOC_MT7621) += \
mt7621-gnubee-gb-pc1.dtb \
mt7621-gnubee-gb-pc2.dtb \
mt7621-tplink-hc220-g5-v1.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

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@@ -128,10 +128,10 @@ struct irq_source_routing_table {
} __packed;
struct interface_info {
u16 vers; /* version of the specificition */
u16 size;
u8 flag;
char description[64];
u16 vers; /* version of the specification */
u16 size; /* size of this interface */
u8 flag; /* used or unused */
char description[64]; /* description for each change */
} __packed;
#define MAX_RESOURCE_NUMBER 128

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@@ -2039,8 +2039,8 @@ do { \
#define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7)
#define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val)
#define read_c0_ecc() __read_32bit_c0_register($26, 0)
#define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val)
#define read_c0_errctl() __read_32bit_c0_register($26, 0)
#define write_c0_errctl(val) __write_32bit_c0_register($26, 0, val)
#define read_c0_derraddr0() __read_ulong_c0_register($26, 1)
#define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)

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@@ -103,7 +103,7 @@ void sb1480_clockevent_init(void)
BUG_ON(cpu > 3); /* Only have 4 general purpose timers */
sprintf(name, "bcm1480-counter-%d", cpu);
sprintf(name, "bcm1480-counter-%u", cpu);
cd->name = name;
cd->features = CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_ONESHOT;

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@@ -248,7 +248,7 @@ int ftrace_disable_ftrace_graph_caller(void)
#define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */
#define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */
unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
static unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
old_parent_ra, unsigned long parent_ra_addr, unsigned long fp)
{
unsigned long sp, ip, tmp;

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@@ -60,6 +60,7 @@
.endm
__HEAD
#ifndef CONFIG_NO_EXCEPT_FILL
/*
* Reserved space for exception handlers.

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@@ -122,9 +122,8 @@ void mips_mt_set_cpuoptions(void)
unsigned long ectlval;
unsigned long itcblkgrn;
/* ErrCtl register is known as "ecc" to Linux */
ectlval = read_c0_ecc();
write_c0_ecc(ectlval | (0x1 << 26));
ectlval = read_c0_errctl();
write_c0_errctl(ectlval | (0x1 << 26));
ehb();
#define INDEX_0 (0x80000000)
#define INDEX_8 (0x80000008)
@@ -145,7 +144,7 @@ void mips_mt_set_cpuoptions(void)
ehb();
/* Write out to ITU with CACHE op */
cache_op(Index_Store_Tag_D, INDEX_0);
write_c0_ecc(ectlval);
write_c0_errctl(ectlval);
ehb();
printk("Mapped %ld ITC cells starting at 0x%08x\n",
((itcblkgrn & 0x7fe00000) >> 20), itc_base);

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@@ -26,10 +26,6 @@
#define ERRCTL_SPRAM (1 << 28)
/* errctl access */
#define read_c0_errctl(x) read_c0_ecc(x)
#define write_c0_errctl(x) write_c0_ecc(x)
/*
* Different semantics to the set_c0_* function built by __BUILD_SET_C0
*/

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@@ -382,15 +382,15 @@
368 o32 io_pgetevents sys_io_pgetevents_time32 compat_sys_io_pgetevents
# room for arch specific calls
393 o32 semget sys_semget
394 o32 semctl sys_semctl compat_sys_semctl
394 o32 semctl sys_old_semctl compat_sys_old_semctl
395 o32 shmget sys_shmget
396 o32 shmctl sys_shmctl compat_sys_shmctl
396 o32 shmctl sys_old_shmctl compat_sys_old_shmctl
397 o32 shmat sys_shmat compat_sys_shmat
398 o32 shmdt sys_shmdt
399 o32 msgget sys_msgget
400 o32 msgsnd sys_msgsnd compat_sys_msgsnd
401 o32 msgrcv sys_msgrcv compat_sys_msgrcv
402 o32 msgctl sys_msgctl compat_sys_msgctl
402 o32 msgctl sys_old_msgctl compat_sys_old_msgctl
403 o32 clock_gettime64 sys_clock_gettime sys_clock_gettime
404 o32 clock_settime64 sys_clock_settime sys_clock_settime
405 o32 clock_adjtime64 sys_clock_adjtime sys_clock_adjtime

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