mirror of
https://github.com/Dasharo/linux.git
synced 2026-03-06 15:25:10 -08:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Pull networking fixes from David Miller:
1) Don't insert ESP trailer twice in IPSEC code, from Huy Nguyen.
2) The default crypto algorithm selection in Kconfig for IPSEC is out
of touch with modern reality, fix this up. From Eric Biggers.
3) bpftool is missing an entry for BPF_MAP_TYPE_RINGBUF, from Andrii
Nakryiko.
4) Missing init of ->frame_sz in xdp_convert_zc_to_xdp_frame(), from
Hangbin Liu.
5) Adjust packet alignment handling in ax88179_178a driver to match
what the hardware actually does. From Jeremy Kerr.
6) register_netdevice can leak in the case one of the notifiers fail,
from Yang Yingliang.
7) Use after free in ip_tunnel_lookup(), from Taehee Yoo.
8) VLAN checks in sja1105 DSA driver need adjustments, from Vladimir
Oltean.
9) tg3 driver can sleep forever when we get enough EEH errors, fix from
David Christensen.
10) Missing {READ,WRITE}_ONCE() annotations in various Intel ethernet
drivers, from Ciara Loftus.
11) Fix scanning loop break condition in of_mdiobus_register(), from
Florian Fainelli.
12) MTU limit is incorrect in ibmveth driver, from Thomas Falcon.
13) Endianness fix in mlxsw, from Ido Schimmel.
14) Use after free in smsc95xx usbnet driver, from Tuomas Tynkkynen.
15) Missing bridge mrp configuration validation, from Horatiu Vultur.
16) Fix circular netns references in wireguard, from Jason A. Donenfeld.
17) PTP initialization on recovery is not done properly in qed driver,
from Alexander Lobakin.
18) Endian conversion of L4 ports in filters of cxgb4 driver is wrong,
from Rahul Lakkireddy.
19) Don't clear bound device TX queue of socket prematurely otherwise we
get problems with ktls hw offloading, from Tariq Toukan.
20) ipset can do atomics on unaligned memory, fix from Russell King.
21) Align ethernet addresses properly in bridging code, from Thomas
Martitz.
22) Don't advertise ipv4 addresses on SCTP sockets having ipv6only set,
from Marcelo Ricardo Leitner.
* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (149 commits)
rds: transport module should be auto loaded when transport is set
sch_cake: fix a few style nits
sch_cake: don't call diffserv parsing code when it is not needed
sch_cake: don't try to reallocate or unshare skb unconditionally
ethtool: fix error handling in linkstate_prepare_data()
wil6210: account for napi_gro_receive never returning GRO_DROP
hns: do not cast return value of napi_gro_receive to null
socionext: account for napi_gro_receive never returning GRO_DROP
wireguard: receive: account for napi_gro_receive never returning GRO_DROP
vxlan: fix last fdb index during dump of fdb with nhid
sctp: Don't advertise IPv4 addresses if ipv6only is set on the socket
tc-testing: avoid action cookies with odd length.
bpf: tcp: bpf_cubic: fix spurious HYSTART_DELAY exit upon drop in min RTT
tcp_cubic: fix spurious HYSTART_DELAY exit upon drop in min RTT
net: dsa: sja1105: fix tc-gate schedule with single element
net: dsa: sja1105: recalculate gating subschedule after deleting tc-gate rules
net: dsa: sja1105: unconditionally free old gating config
net: dsa: sja1105: move sja1105_compose_gating_subschedule at the top
net: macb: free resources on failure path of at91ether_open()
net: macb: call pm_runtime_put_sync on failure path
...
This commit is contained in:
@@ -86,6 +86,20 @@ then the next program in the chain (A) will see those changes,
|
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*not* the original input ``setsockopt`` arguments. The potentially
|
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modified values will be then passed down to the kernel.
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|
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Large optval
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============
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When the ``optval`` is greater than the ``PAGE_SIZE``, the BPF program
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can access only the first ``PAGE_SIZE`` of that data. So it has to options:
|
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|
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* Set ``optlen`` to zero, which indicates that the kernel should
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use the original buffer from the userspace. Any modifications
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done by the BPF program to the ``optval`` are ignored.
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* Set ``optlen`` to the value less than ``PAGE_SIZE``, which
|
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indicates that the kernel should use BPF's trimmed ``optval``.
|
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|
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When the BPF program returns with the ``optlen`` greater than
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``PAGE_SIZE``, the userspace will receive ``EFAULT`` errno.
|
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Example
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=======
|
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|
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|
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@@ -30,8 +30,8 @@ Socket API
|
||||
|
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The address family, socket addresses etc. are defined in the
|
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include/net/af_ieee802154.h header or in the special header
|
||||
in the userspace package (see either http://wpan.cakelab.org/ or the
|
||||
git tree at https://github.com/linux-wpan/wpan-tools).
|
||||
in the userspace package (see either https://linux-wpan.org/wpan-tools.html
|
||||
or the git tree at https://github.com/linux-wpan/wpan-tools).
|
||||
|
||||
6LoWPAN Linux implementation
|
||||
============================
|
||||
|
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@@ -8333,7 +8333,7 @@ M: Alexander Aring <alex.aring@gmail.com>
|
||||
M: Stefan Schmidt <stefan@datenfreihafen.org>
|
||||
L: linux-wpan@vger.kernel.org
|
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S: Maintained
|
||||
W: http://wpan.cakelab.org/
|
||||
W: https://linux-wpan.org/
|
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan.git
|
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan-next.git
|
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F: Documentation/networking/ieee802154.rst
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@@ -10808,7 +10808,7 @@ F: Documentation/devicetree/bindings/dma/mtk-*
|
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F: drivers/dma/mediatek/
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MEDIATEK ETHERNET DRIVER
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M: Felix Fietkau <nbd@openwrt.org>
|
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M: Felix Fietkau <nbd@nbd.name>
|
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M: John Crispin <john@phrozen.org>
|
||||
M: Sean Wang <sean.wang@mediatek.com>
|
||||
M: Mark Lee <Mark-MC.Lee@mediatek.com>
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|
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@@ -572,6 +572,9 @@ static int bareudp2info(struct nlattr *data[], struct bareudp_conf *conf,
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if (data[IFLA_BAREUDP_SRCPORT_MIN])
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conf->sport_min = nla_get_u16(data[IFLA_BAREUDP_SRCPORT_MIN]);
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|
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if (data[IFLA_BAREUDP_MULTIPROTO_MODE])
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conf->multi_proto_mode = true;
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return 0;
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}
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|
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@@ -1147,6 +1147,8 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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set_bit(0, priv->cfp.used);
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set_bit(0, priv->cfp.unique);
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/* Balance of_node_put() done by of_find_node_by_name() */
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of_node_get(dn);
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ports = of_find_node_by_name(dn, "ports");
|
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if (ports) {
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bcm_sf2_identify_ports(priv, ports);
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@@ -7,6 +7,165 @@
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#define SJA1105_SIZE_VL_STATUS 8
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/* Insert into the global gate list, sorted by gate action time. */
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static int sja1105_insert_gate_entry(struct sja1105_gating_config *gating_cfg,
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struct sja1105_rule *rule,
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u8 gate_state, s64 entry_time,
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struct netlink_ext_ack *extack)
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{
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struct sja1105_gate_entry *e;
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int rc;
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e = kzalloc(sizeof(*e), GFP_KERNEL);
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if (!e)
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return -ENOMEM;
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e->rule = rule;
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e->gate_state = gate_state;
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e->interval = entry_time;
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if (list_empty(&gating_cfg->entries)) {
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list_add(&e->list, &gating_cfg->entries);
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} else {
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struct sja1105_gate_entry *p;
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list_for_each_entry(p, &gating_cfg->entries, list) {
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if (p->interval == e->interval) {
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NL_SET_ERR_MSG_MOD(extack,
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"Gate conflict");
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rc = -EBUSY;
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goto err;
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}
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if (e->interval < p->interval)
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break;
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}
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list_add(&e->list, p->list.prev);
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}
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gating_cfg->num_entries++;
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return 0;
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err:
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kfree(e);
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return rc;
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}
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/* The gate entries contain absolute times in their e->interval field. Convert
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* that to proper intervals (i.e. "0, 5, 10, 15" to "5, 5, 5, 5").
|
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*/
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static void
|
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sja1105_gating_cfg_time_to_interval(struct sja1105_gating_config *gating_cfg,
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u64 cycle_time)
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{
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struct sja1105_gate_entry *last_e;
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struct sja1105_gate_entry *e;
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struct list_head *prev;
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list_for_each_entry(e, &gating_cfg->entries, list) {
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struct sja1105_gate_entry *p;
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prev = e->list.prev;
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if (prev == &gating_cfg->entries)
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continue;
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p = list_entry(prev, struct sja1105_gate_entry, list);
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p->interval = e->interval - p->interval;
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}
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last_e = list_last_entry(&gating_cfg->entries,
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struct sja1105_gate_entry, list);
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last_e->interval = cycle_time - last_e->interval;
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}
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static void sja1105_free_gating_config(struct sja1105_gating_config *gating_cfg)
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{
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struct sja1105_gate_entry *e, *n;
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list_for_each_entry_safe(e, n, &gating_cfg->entries, list) {
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list_del(&e->list);
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kfree(e);
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}
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}
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static int sja1105_compose_gating_subschedule(struct sja1105_private *priv,
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struct netlink_ext_ack *extack)
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{
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struct sja1105_gating_config *gating_cfg = &priv->tas_data.gating_cfg;
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struct sja1105_rule *rule;
|
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s64 max_cycle_time = 0;
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s64 its_base_time = 0;
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int i, rc = 0;
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sja1105_free_gating_config(gating_cfg);
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list_for_each_entry(rule, &priv->flow_block.rules, list) {
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if (rule->type != SJA1105_RULE_VL)
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continue;
|
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if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED)
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continue;
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if (max_cycle_time < rule->vl.cycle_time) {
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max_cycle_time = rule->vl.cycle_time;
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its_base_time = rule->vl.base_time;
|
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}
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}
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|
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if (!max_cycle_time)
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return 0;
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|
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dev_dbg(priv->ds->dev, "max_cycle_time %lld its_base_time %lld\n",
|
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max_cycle_time, its_base_time);
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|
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gating_cfg->base_time = its_base_time;
|
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gating_cfg->cycle_time = max_cycle_time;
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gating_cfg->num_entries = 0;
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list_for_each_entry(rule, &priv->flow_block.rules, list) {
|
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s64 time;
|
||||
s64 rbt;
|
||||
|
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if (rule->type != SJA1105_RULE_VL)
|
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continue;
|
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if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED)
|
||||
continue;
|
||||
|
||||
/* Calculate the difference between this gating schedule's
|
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* base time, and the base time of the gating schedule with the
|
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* longest cycle time. We call it the relative base time (rbt).
|
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*/
|
||||
rbt = future_base_time(rule->vl.base_time, rule->vl.cycle_time,
|
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its_base_time);
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||||
rbt -= its_base_time;
|
||||
|
||||
time = rbt;
|
||||
|
||||
for (i = 0; i < rule->vl.num_entries; i++) {
|
||||
u8 gate_state = rule->vl.entries[i].gate_state;
|
||||
s64 entry_time = time;
|
||||
|
||||
while (entry_time < max_cycle_time) {
|
||||
rc = sja1105_insert_gate_entry(gating_cfg, rule,
|
||||
gate_state,
|
||||
entry_time,
|
||||
extack);
|
||||
if (rc)
|
||||
goto err;
|
||||
|
||||
entry_time += rule->vl.cycle_time;
|
||||
}
|
||||
time += rule->vl.entries[i].interval;
|
||||
}
|
||||
}
|
||||
|
||||
sja1105_gating_cfg_time_to_interval(gating_cfg, max_cycle_time);
|
||||
|
||||
return 0;
|
||||
err:
|
||||
sja1105_free_gating_config(gating_cfg);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* The switch flow classification core implements TTEthernet, which 'thinks' in
|
||||
* terms of Virtual Links (VL), a concept borrowed from ARINC 664 part 7.
|
||||
* However it also has one other operating mode (VLLUPFORMAT=0) where it acts
|
||||
@@ -342,7 +501,9 @@ int sja1105_vl_redirect(struct sja1105_private *priv, int port,
|
||||
NL_SET_ERR_MSG_MOD(extack,
|
||||
"Can only redirect based on DMAC");
|
||||
return -EOPNOTSUPP;
|
||||
} else if (key->type != SJA1105_KEY_VLAN_AWARE_VL) {
|
||||
} else if ((priv->vlan_state == SJA1105_VLAN_BEST_EFFORT ||
|
||||
priv->vlan_state == SJA1105_VLAN_FILTERING_FULL) &&
|
||||
key->type != SJA1105_KEY_VLAN_AWARE_VL) {
|
||||
NL_SET_ERR_MSG_MOD(extack,
|
||||
"Can only redirect based on {DMAC, VID, PCP}");
|
||||
return -EOPNOTSUPP;
|
||||
@@ -388,173 +549,21 @@ int sja1105_vl_delete(struct sja1105_private *priv, int port,
|
||||
kfree(rule);
|
||||
}
|
||||
|
||||
rc = sja1105_compose_gating_subschedule(priv, extack);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = sja1105_init_virtual_links(priv, extack);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = sja1105_init_scheduling(priv);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
return sja1105_static_config_reload(priv, SJA1105_VIRTUAL_LINKS);
|
||||
}
|
||||
|
||||
/* Insert into the global gate list, sorted by gate action time. */
|
||||
static int sja1105_insert_gate_entry(struct sja1105_gating_config *gating_cfg,
|
||||
struct sja1105_rule *rule,
|
||||
u8 gate_state, s64 entry_time,
|
||||
struct netlink_ext_ack *extack)
|
||||
{
|
||||
struct sja1105_gate_entry *e;
|
||||
int rc;
|
||||
|
||||
e = kzalloc(sizeof(*e), GFP_KERNEL);
|
||||
if (!e)
|
||||
return -ENOMEM;
|
||||
|
||||
e->rule = rule;
|
||||
e->gate_state = gate_state;
|
||||
e->interval = entry_time;
|
||||
|
||||
if (list_empty(&gating_cfg->entries)) {
|
||||
list_add(&e->list, &gating_cfg->entries);
|
||||
} else {
|
||||
struct sja1105_gate_entry *p;
|
||||
|
||||
list_for_each_entry(p, &gating_cfg->entries, list) {
|
||||
if (p->interval == e->interval) {
|
||||
NL_SET_ERR_MSG_MOD(extack,
|
||||
"Gate conflict");
|
||||
rc = -EBUSY;
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (e->interval < p->interval)
|
||||
break;
|
||||
}
|
||||
list_add(&e->list, p->list.prev);
|
||||
}
|
||||
|
||||
gating_cfg->num_entries++;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
kfree(e);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* The gate entries contain absolute times in their e->interval field. Convert
|
||||
* that to proper intervals (i.e. "0, 5, 10, 15" to "5, 5, 5, 5").
|
||||
*/
|
||||
static void
|
||||
sja1105_gating_cfg_time_to_interval(struct sja1105_gating_config *gating_cfg,
|
||||
u64 cycle_time)
|
||||
{
|
||||
struct sja1105_gate_entry *last_e;
|
||||
struct sja1105_gate_entry *e;
|
||||
struct list_head *prev;
|
||||
|
||||
list_for_each_entry(e, &gating_cfg->entries, list) {
|
||||
struct sja1105_gate_entry *p;
|
||||
|
||||
prev = e->list.prev;
|
||||
|
||||
if (prev == &gating_cfg->entries)
|
||||
continue;
|
||||
|
||||
p = list_entry(prev, struct sja1105_gate_entry, list);
|
||||
p->interval = e->interval - p->interval;
|
||||
}
|
||||
last_e = list_last_entry(&gating_cfg->entries,
|
||||
struct sja1105_gate_entry, list);
|
||||
if (last_e->list.prev != &gating_cfg->entries)
|
||||
last_e->interval = cycle_time - last_e->interval;
|
||||
}
|
||||
|
||||
static void sja1105_free_gating_config(struct sja1105_gating_config *gating_cfg)
|
||||
{
|
||||
struct sja1105_gate_entry *e, *n;
|
||||
|
||||
list_for_each_entry_safe(e, n, &gating_cfg->entries, list) {
|
||||
list_del(&e->list);
|
||||
kfree(e);
|
||||
}
|
||||
}
|
||||
|
||||
static int sja1105_compose_gating_subschedule(struct sja1105_private *priv,
|
||||
struct netlink_ext_ack *extack)
|
||||
{
|
||||
struct sja1105_gating_config *gating_cfg = &priv->tas_data.gating_cfg;
|
||||
struct sja1105_rule *rule;
|
||||
s64 max_cycle_time = 0;
|
||||
s64 its_base_time = 0;
|
||||
int i, rc = 0;
|
||||
|
||||
list_for_each_entry(rule, &priv->flow_block.rules, list) {
|
||||
if (rule->type != SJA1105_RULE_VL)
|
||||
continue;
|
||||
if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED)
|
||||
continue;
|
||||
|
||||
if (max_cycle_time < rule->vl.cycle_time) {
|
||||
max_cycle_time = rule->vl.cycle_time;
|
||||
its_base_time = rule->vl.base_time;
|
||||
}
|
||||
}
|
||||
|
||||
if (!max_cycle_time)
|
||||
return 0;
|
||||
|
||||
dev_dbg(priv->ds->dev, "max_cycle_time %lld its_base_time %lld\n",
|
||||
max_cycle_time, its_base_time);
|
||||
|
||||
sja1105_free_gating_config(gating_cfg);
|
||||
|
||||
gating_cfg->base_time = its_base_time;
|
||||
gating_cfg->cycle_time = max_cycle_time;
|
||||
gating_cfg->num_entries = 0;
|
||||
|
||||
list_for_each_entry(rule, &priv->flow_block.rules, list) {
|
||||
s64 time;
|
||||
s64 rbt;
|
||||
|
||||
if (rule->type != SJA1105_RULE_VL)
|
||||
continue;
|
||||
if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED)
|
||||
continue;
|
||||
|
||||
/* Calculate the difference between this gating schedule's
|
||||
* base time, and the base time of the gating schedule with the
|
||||
* longest cycle time. We call it the relative base time (rbt).
|
||||
*/
|
||||
rbt = future_base_time(rule->vl.base_time, rule->vl.cycle_time,
|
||||
its_base_time);
|
||||
rbt -= its_base_time;
|
||||
|
||||
time = rbt;
|
||||
|
||||
for (i = 0; i < rule->vl.num_entries; i++) {
|
||||
u8 gate_state = rule->vl.entries[i].gate_state;
|
||||
s64 entry_time = time;
|
||||
|
||||
while (entry_time < max_cycle_time) {
|
||||
rc = sja1105_insert_gate_entry(gating_cfg, rule,
|
||||
gate_state,
|
||||
entry_time,
|
||||
extack);
|
||||
if (rc)
|
||||
goto err;
|
||||
|
||||
entry_time += rule->vl.cycle_time;
|
||||
}
|
||||
time += rule->vl.entries[i].interval;
|
||||
}
|
||||
}
|
||||
|
||||
sja1105_gating_cfg_time_to_interval(gating_cfg, max_cycle_time);
|
||||
|
||||
return 0;
|
||||
err:
|
||||
sja1105_free_gating_config(gating_cfg);
|
||||
return rc;
|
||||
}
|
||||
|
||||
int sja1105_vl_gate(struct sja1105_private *priv, int port,
|
||||
struct netlink_ext_ack *extack, unsigned long cookie,
|
||||
struct sja1105_key *key, u32 index, s32 prio,
|
||||
@@ -588,14 +597,12 @@ int sja1105_vl_gate(struct sja1105_private *priv, int port,
|
||||
|
||||
if (priv->vlan_state == SJA1105_VLAN_UNAWARE &&
|
||||
key->type != SJA1105_KEY_VLAN_UNAWARE_VL) {
|
||||
dev_err(priv->ds->dev, "1: vlan state %d key type %d\n",
|
||||
priv->vlan_state, key->type);
|
||||
NL_SET_ERR_MSG_MOD(extack,
|
||||
"Can only gate based on DMAC");
|
||||
return -EOPNOTSUPP;
|
||||
} else if (key->type != SJA1105_KEY_VLAN_AWARE_VL) {
|
||||
dev_err(priv->ds->dev, "2: vlan state %d key type %d\n",
|
||||
priv->vlan_state, key->type);
|
||||
} else if ((priv->vlan_state == SJA1105_VLAN_BEST_EFFORT ||
|
||||
priv->vlan_state == SJA1105_VLAN_FILTERING_FULL) &&
|
||||
key->type != SJA1105_KEY_VLAN_AWARE_VL) {
|
||||
NL_SET_ERR_MSG_MOD(extack,
|
||||
"Can only gate based on {DMAC, VID, PCP}");
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
@@ -6292,6 +6292,7 @@ int bnxt_hwrm_set_coal(struct bnxt *bp)
|
||||
|
||||
static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp)
|
||||
{
|
||||
struct hwrm_stat_ctx_clr_stats_input req0 = {0};
|
||||
struct hwrm_stat_ctx_free_input req = {0};
|
||||
int i;
|
||||
|
||||
@@ -6301,6 +6302,7 @@ static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp)
|
||||
if (BNXT_CHIP_TYPE_NITRO_A0(bp))
|
||||
return;
|
||||
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req0, HWRM_STAT_CTX_CLR_STATS, -1, -1);
|
||||
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_STAT_CTX_FREE, -1, -1);
|
||||
|
||||
mutex_lock(&bp->hwrm_cmd_lock);
|
||||
@@ -6310,7 +6312,11 @@ static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp)
|
||||
|
||||
if (cpr->hw_stats_ctx_id != INVALID_STATS_CTX_ID) {
|
||||
req.stat_ctx_id = cpu_to_le32(cpr->hw_stats_ctx_id);
|
||||
|
||||
if (BNXT_FW_MAJ(bp) <= 20) {
|
||||
req0.stat_ctx_id = req.stat_ctx_id;
|
||||
_hwrm_send_message(bp, &req0, sizeof(req0),
|
||||
HWRM_CMD_TIMEOUT);
|
||||
}
|
||||
_hwrm_send_message(bp, &req, sizeof(req),
|
||||
HWRM_CMD_TIMEOUT);
|
||||
|
||||
@@ -6976,7 +6982,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
|
||||
bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD;
|
||||
|
||||
bp->tx_push_thresh = 0;
|
||||
if (flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED)
|
||||
if ((flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) &&
|
||||
BNXT_FW_MAJ(bp) > 217)
|
||||
bp->tx_push_thresh = BNXT_TX_PUSH_THRESH;
|
||||
|
||||
hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx);
|
||||
@@ -7240,8 +7247,9 @@ static int __bnxt_hwrm_ver_get(struct bnxt *bp, bool silent)
|
||||
static int bnxt_hwrm_ver_get(struct bnxt *bp)
|
||||
{
|
||||
struct hwrm_ver_get_output *resp = bp->hwrm_cmd_resp_addr;
|
||||
u16 fw_maj, fw_min, fw_bld, fw_rsv;
|
||||
u32 dev_caps_cfg, hwrm_ver;
|
||||
int rc;
|
||||
int rc, len;
|
||||
|
||||
bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN;
|
||||
mutex_lock(&bp->hwrm_cmd_lock);
|
||||
@@ -7273,9 +7281,22 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp)
|
||||
resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b,
|
||||
resp->hwrm_intf_upd_8b);
|
||||
|
||||
snprintf(bp->fw_ver_str, BC_HWRM_STR_LEN, "%d.%d.%d.%d",
|
||||
resp->hwrm_fw_maj_8b, resp->hwrm_fw_min_8b,
|
||||
resp->hwrm_fw_bld_8b, resp->hwrm_fw_rsvd_8b);
|
||||
fw_maj = le16_to_cpu(resp->hwrm_fw_major);
|
||||
if (bp->hwrm_spec_code > 0x10803 && fw_maj) {
|
||||
fw_min = le16_to_cpu(resp->hwrm_fw_minor);
|
||||
fw_bld = le16_to_cpu(resp->hwrm_fw_build);
|
||||
fw_rsv = le16_to_cpu(resp->hwrm_fw_patch);
|
||||
len = FW_VER_STR_LEN;
|
||||
} else {
|
||||
fw_maj = resp->hwrm_fw_maj_8b;
|
||||
fw_min = resp->hwrm_fw_min_8b;
|
||||
fw_bld = resp->hwrm_fw_bld_8b;
|
||||
fw_rsv = resp->hwrm_fw_rsvd_8b;
|
||||
len = BC_HWRM_STR_LEN;
|
||||
}
|
||||
bp->fw_ver_code = BNXT_FW_VER_CODE(fw_maj, fw_min, fw_bld, fw_rsv);
|
||||
snprintf(bp->fw_ver_str, len, "%d.%d.%d.%d", fw_maj, fw_min, fw_bld,
|
||||
fw_rsv);
|
||||
|
||||
if (strlen(resp->active_pkg_name)) {
|
||||
int fw_ver_len = strlen(bp->fw_ver_str);
|
||||
@@ -11892,7 +11913,8 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
dev->ethtool_ops = &bnxt_ethtool_ops;
|
||||
pci_set_drvdata(pdev, dev);
|
||||
|
||||
bnxt_vpd_read_info(bp);
|
||||
if (BNXT_PF(bp))
|
||||
bnxt_vpd_read_info(bp);
|
||||
|
||||
rc = bnxt_alloc_hwrm_resources(bp);
|
||||
if (rc)
|
||||
|
||||
@@ -1746,6 +1746,11 @@ struct bnxt {
|
||||
#define PHY_VER_STR_LEN (FW_VER_STR_LEN - BC_HWRM_STR_LEN)
|
||||
char fw_ver_str[FW_VER_STR_LEN];
|
||||
char hwrm_ver_supp[FW_VER_STR_LEN];
|
||||
u64 fw_ver_code;
|
||||
#define BNXT_FW_VER_CODE(maj, min, bld, rsv) \
|
||||
((u64)(maj) << 48 | (u64)(min) << 32 | (u64)(bld) << 16 | (rsv))
|
||||
#define BNXT_FW_MAJ(bp) ((bp)->fw_ver_code >> 48)
|
||||
|
||||
__be16 vxlan_port;
|
||||
u8 vxlan_port_cnt;
|
||||
__le16 vxlan_fw_dst_port_id;
|
||||
|
||||
@@ -1889,7 +1889,8 @@ static void bnxt_tc_setup_indr_rel(void *cb_priv)
|
||||
}
|
||||
|
||||
static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp,
|
||||
struct flow_block_offload *f)
|
||||
struct flow_block_offload *f, void *data,
|
||||
void (*cleanup)(struct flow_block_cb *block_cb))
|
||||
{
|
||||
struct bnxt_flower_indr_block_cb_priv *cb_priv;
|
||||
struct flow_block_cb *block_cb;
|
||||
@@ -1907,9 +1908,10 @@ static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp,
|
||||
cb_priv->bp = bp;
|
||||
list_add(&cb_priv->list, &bp->tc_indr_block_list);
|
||||
|
||||
block_cb = flow_block_cb_alloc(bnxt_tc_setup_indr_block_cb,
|
||||
cb_priv, cb_priv,
|
||||
bnxt_tc_setup_indr_rel);
|
||||
block_cb = flow_indr_block_cb_alloc(bnxt_tc_setup_indr_block_cb,
|
||||
cb_priv, cb_priv,
|
||||
bnxt_tc_setup_indr_rel, f,
|
||||
netdev, data, bp, cleanup);
|
||||
if (IS_ERR(block_cb)) {
|
||||
list_del(&cb_priv->list);
|
||||
kfree(cb_priv);
|
||||
@@ -1930,7 +1932,7 @@ static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp,
|
||||
if (!block_cb)
|
||||
return -ENOENT;
|
||||
|
||||
flow_block_cb_remove(block_cb, f);
|
||||
flow_indr_block_cb_remove(block_cb, f);
|
||||
list_del(&block_cb->driver_list);
|
||||
break;
|
||||
default:
|
||||
@@ -1945,14 +1947,17 @@ static bool bnxt_is_netdev_indr_offload(struct net_device *netdev)
|
||||
}
|
||||
|
||||
static int bnxt_tc_setup_indr_cb(struct net_device *netdev, void *cb_priv,
|
||||
enum tc_setup_type type, void *type_data)
|
||||
enum tc_setup_type type, void *type_data,
|
||||
void *data,
|
||||
void (*cleanup)(struct flow_block_cb *block_cb))
|
||||
{
|
||||
if (!bnxt_is_netdev_indr_offload(netdev))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
switch (type) {
|
||||
case TC_SETUP_BLOCK:
|
||||
return bnxt_tc_setup_indr_block(netdev, cb_priv, type_data);
|
||||
return bnxt_tc_setup_indr_block(netdev, cb_priv, type_data, data,
|
||||
cleanup);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -2074,7 +2079,7 @@ void bnxt_shutdown_tc(struct bnxt *bp)
|
||||
return;
|
||||
|
||||
flow_indr_dev_unregister(bnxt_tc_setup_indr_cb, bp,
|
||||
bnxt_tc_setup_indr_block_cb);
|
||||
bnxt_tc_setup_indr_rel);
|
||||
rhashtable_destroy(&tc_info->flow_table);
|
||||
rhashtable_destroy(&tc_info->l2_table);
|
||||
rhashtable_destroy(&tc_info->decap_l2_table);
|
||||
|
||||
@@ -459,17 +459,6 @@ static inline void bcmgenet_rdma_ring_writel(struct bcmgenet_priv *priv,
|
||||
genet_dma_ring_regs[r]);
|
||||
}
|
||||
|
||||
static bool bcmgenet_hfb_is_filter_enabled(struct bcmgenet_priv *priv,
|
||||
u32 f_index)
|
||||
{
|
||||
u32 offset;
|
||||
u32 reg;
|
||||
|
||||
offset = HFB_FLT_ENABLE_V3PLUS + (f_index < 32) * sizeof(u32);
|
||||
reg = bcmgenet_hfb_reg_readl(priv, offset);
|
||||
return !!(reg & (1 << (f_index % 32)));
|
||||
}
|
||||
|
||||
static void bcmgenet_hfb_enable_filter(struct bcmgenet_priv *priv, u32 f_index)
|
||||
{
|
||||
u32 offset;
|
||||
@@ -533,19 +522,6 @@ static void bcmgenet_hfb_set_filter_length(struct bcmgenet_priv *priv,
|
||||
bcmgenet_hfb_reg_writel(priv, reg, offset);
|
||||
}
|
||||
|
||||
static int bcmgenet_hfb_find_unused_filter(struct bcmgenet_priv *priv)
|
||||
{
|
||||
u32 f_index;
|
||||
|
||||
/* First MAX_NUM_OF_FS_RULES are reserved for Rx NFC filters */
|
||||
for (f_index = MAX_NUM_OF_FS_RULES;
|
||||
f_index < priv->hw_params->hfb_filter_cnt; f_index++)
|
||||
if (!bcmgenet_hfb_is_filter_enabled(priv, f_index))
|
||||
return f_index;
|
||||
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static int bcmgenet_hfb_validate_mask(void *mask, size_t size)
|
||||
{
|
||||
while (size) {
|
||||
@@ -634,8 +610,9 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,
|
||||
{
|
||||
struct ethtool_rx_flow_spec *fs = &rule->fs;
|
||||
int err = 0, offset = 0, f_length = 0;
|
||||
u16 val_16, mask_16;
|
||||
u8 val_8, mask_8;
|
||||
__be16 val_16;
|
||||
u16 mask_16;
|
||||
size_t size;
|
||||
u32 *f_data;
|
||||
|
||||
@@ -744,59 +721,6 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,
|
||||
return err;
|
||||
}
|
||||
|
||||
/* bcmgenet_hfb_add_filter
|
||||
*
|
||||
* Add new filter to Hardware Filter Block to match and direct Rx traffic to
|
||||
* desired Rx queue.
|
||||
*
|
||||
* f_data is an array of unsigned 32-bit integers where each 32-bit integer
|
||||
* provides filter data for 2 bytes (4 nibbles) of Rx frame:
|
||||
*
|
||||
* bits 31:20 - unused
|
||||
* bit 19 - nibble 0 match enable
|
||||
* bit 18 - nibble 1 match enable
|
||||
* bit 17 - nibble 2 match enable
|
||||
* bit 16 - nibble 3 match enable
|
||||
* bits 15:12 - nibble 0 data
|
||||
* bits 11:8 - nibble 1 data
|
||||
* bits 7:4 - nibble 2 data
|
||||
* bits 3:0 - nibble 3 data
|
||||
*
|
||||
* Example:
|
||||
* In order to match:
|
||||
* - Ethernet frame type = 0x0800 (IP)
|
||||
* - IP version field = 4
|
||||
* - IP protocol field = 0x11 (UDP)
|
||||
*
|
||||
* The following filter is needed:
|
||||
* u32 hfb_filter_ipv4_udp[] = {
|
||||
* Rx frame offset 0x00: 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
* Rx frame offset 0x08: 0x00000000, 0x00000000, 0x000F0800, 0x00084000,
|
||||
* Rx frame offset 0x10: 0x00000000, 0x00000000, 0x00000000, 0x00030011,
|
||||
* };
|
||||
*
|
||||
* To add the filter to HFB and direct the traffic to Rx queue 0, call:
|
||||
* bcmgenet_hfb_add_filter(priv, hfb_filter_ipv4_udp,
|
||||
* ARRAY_SIZE(hfb_filter_ipv4_udp), 0);
|
||||
*/
|
||||
int bcmgenet_hfb_add_filter(struct bcmgenet_priv *priv, u32 *f_data,
|
||||
u32 f_length, u32 rx_queue)
|
||||
{
|
||||
int f_index;
|
||||
|
||||
f_index = bcmgenet_hfb_find_unused_filter(priv);
|
||||
if (f_index < 0)
|
||||
return -ENOMEM;
|
||||
|
||||
if (f_length > priv->hw_params->hfb_filter_size)
|
||||
return -EINVAL;
|
||||
|
||||
bcmgenet_hfb_set_filter(priv, f_data, f_length, rx_queue, f_index);
|
||||
bcmgenet_hfb_enable_filter(priv, f_index);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* bcmgenet_hfb_clear
|
||||
*
|
||||
* Clear Hardware Filter Block and disable all filtering.
|
||||
@@ -2118,11 +2042,6 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (skb_padto(skb, ETH_ZLEN)) {
|
||||
ret = NETDEV_TX_OK;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Retain how many bytes will be sent on the wire, without TSB inserted
|
||||
* by transmit checksum offload
|
||||
*/
|
||||
@@ -2169,6 +2088,9 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
len_stat = (size << DMA_BUFLENGTH_SHIFT) |
|
||||
(priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT);
|
||||
|
||||
/* Note: if we ever change from DMA_TX_APPEND_CRC below we
|
||||
* will need to restore software padding of "runt" packets
|
||||
*/
|
||||
if (!i) {
|
||||
len_stat |= DMA_TX_APPEND_CRC | DMA_SOP;
|
||||
if (skb->ip_summed == CHECKSUM_PARTIAL)
|
||||
|
||||
@@ -18168,8 +18168,8 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev,
|
||||
|
||||
rtnl_lock();
|
||||
|
||||
/* We probably don't have netdev yet */
|
||||
if (!netdev || !netif_running(netdev))
|
||||
/* Could be second call or maybe we don't have netdev yet */
|
||||
if (!netdev || tp->pcierr_recovery || !netif_running(netdev))
|
||||
goto done;
|
||||
|
||||
/* We needn't recover from permanent error */
|
||||
|
||||
@@ -2558,7 +2558,7 @@ static int macb_open(struct net_device *dev)
|
||||
|
||||
err = macb_phylink_connect(bp);
|
||||
if (err)
|
||||
goto napi_exit;
|
||||
goto reset_hw;
|
||||
|
||||
netif_tx_start_all_queues(dev);
|
||||
|
||||
@@ -2567,9 +2567,11 @@ static int macb_open(struct net_device *dev)
|
||||
|
||||
return 0;
|
||||
|
||||
napi_exit:
|
||||
reset_hw:
|
||||
macb_reset_hw(bp);
|
||||
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue)
|
||||
napi_disable(&queue->napi);
|
||||
macb_free_consistent(bp);
|
||||
pm_exit:
|
||||
pm_runtime_put_sync(&bp->pdev->dev);
|
||||
return err;
|
||||
@@ -3760,15 +3762,9 @@ static int macb_init(struct platform_device *pdev)
|
||||
|
||||
static struct sifive_fu540_macb_mgmt *mgmt;
|
||||
|
||||
/* Initialize and start the Receiver and Transmit subsystems */
|
||||
static int at91ether_start(struct net_device *dev)
|
||||
static int at91ether_alloc_coherent(struct macb *lp)
|
||||
{
|
||||
struct macb *lp = netdev_priv(dev);
|
||||
struct macb_queue *q = &lp->queues[0];
|
||||
struct macb_dma_desc *desc;
|
||||
dma_addr_t addr;
|
||||
u32 ctl;
|
||||
int i;
|
||||
|
||||
q->rx_ring = dma_alloc_coherent(&lp->pdev->dev,
|
||||
(AT91ETHER_MAX_RX_DESCR *
|
||||
@@ -3790,6 +3786,43 @@ static int at91ether_start(struct net_device *dev)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void at91ether_free_coherent(struct macb *lp)
|
||||
{
|
||||
struct macb_queue *q = &lp->queues[0];
|
||||
|
||||
if (q->rx_ring) {
|
||||
dma_free_coherent(&lp->pdev->dev,
|
||||
AT91ETHER_MAX_RX_DESCR *
|
||||
macb_dma_desc_get_size(lp),
|
||||
q->rx_ring, q->rx_ring_dma);
|
||||
q->rx_ring = NULL;
|
||||
}
|
||||
|
||||
if (q->rx_buffers) {
|
||||
dma_free_coherent(&lp->pdev->dev,
|
||||
AT91ETHER_MAX_RX_DESCR *
|
||||
AT91ETHER_MAX_RBUFF_SZ,
|
||||
q->rx_buffers, q->rx_buffers_dma);
|
||||
q->rx_buffers = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize and start the Receiver and Transmit subsystems */
|
||||
static int at91ether_start(struct macb *lp)
|
||||
{
|
||||
struct macb_queue *q = &lp->queues[0];
|
||||
struct macb_dma_desc *desc;
|
||||
dma_addr_t addr;
|
||||
u32 ctl;
|
||||
int i, ret;
|
||||
|
||||
ret = at91ether_alloc_coherent(lp);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
addr = q->rx_buffers_dma;
|
||||
for (i = 0; i < AT91ETHER_MAX_RX_DESCR; i++) {
|
||||
desc = macb_rx_desc(q, i);
|
||||
@@ -3811,9 +3844,39 @@ static int at91ether_start(struct net_device *dev)
|
||||
ctl = macb_readl(lp, NCR);
|
||||
macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE));
|
||||
|
||||
/* Enable MAC interrupts */
|
||||
macb_writel(lp, IER, MACB_BIT(RCOMP) |
|
||||
MACB_BIT(RXUBR) |
|
||||
MACB_BIT(ISR_TUND) |
|
||||
MACB_BIT(ISR_RLE) |
|
||||
MACB_BIT(TCOMP) |
|
||||
MACB_BIT(ISR_ROVR) |
|
||||
MACB_BIT(HRESP));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void at91ether_stop(struct macb *lp)
|
||||
{
|
||||
u32 ctl;
|
||||
|
||||
/* Disable MAC interrupts */
|
||||
macb_writel(lp, IDR, MACB_BIT(RCOMP) |
|
||||
MACB_BIT(RXUBR) |
|
||||
MACB_BIT(ISR_TUND) |
|
||||
MACB_BIT(ISR_RLE) |
|
||||
MACB_BIT(TCOMP) |
|
||||
MACB_BIT(ISR_ROVR) |
|
||||
MACB_BIT(HRESP));
|
||||
|
||||
/* Disable Receiver and Transmitter */
|
||||
ctl = macb_readl(lp, NCR);
|
||||
macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE)));
|
||||
|
||||
/* Free resources. */
|
||||
at91ether_free_coherent(lp);
|
||||
}
|
||||
|
||||
/* Open the ethernet interface */
|
||||
static int at91ether_open(struct net_device *dev)
|
||||
{
|
||||
@@ -3833,63 +3896,36 @@ static int at91ether_open(struct net_device *dev)
|
||||
|
||||
macb_set_hwaddr(lp);
|
||||
|
||||
ret = at91ether_start(dev);
|
||||
ret = at91ether_start(lp);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Enable MAC interrupts */
|
||||
macb_writel(lp, IER, MACB_BIT(RCOMP) |
|
||||
MACB_BIT(RXUBR) |
|
||||
MACB_BIT(ISR_TUND) |
|
||||
MACB_BIT(ISR_RLE) |
|
||||
MACB_BIT(TCOMP) |
|
||||
MACB_BIT(ISR_ROVR) |
|
||||
MACB_BIT(HRESP));
|
||||
goto pm_exit;
|
||||
|
||||
ret = macb_phylink_connect(lp);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto stop;
|
||||
|
||||
netif_start_queue(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
stop:
|
||||
at91ether_stop(lp);
|
||||
pm_exit:
|
||||
pm_runtime_put_sync(&lp->pdev->dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Close the interface */
|
||||
static int at91ether_close(struct net_device *dev)
|
||||
{
|
||||
struct macb *lp = netdev_priv(dev);
|
||||
struct macb_queue *q = &lp->queues[0];
|
||||
u32 ctl;
|
||||
|
||||
/* Disable Receiver and Transmitter */
|
||||
ctl = macb_readl(lp, NCR);
|
||||
macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE)));
|
||||
|
||||
/* Disable MAC interrupts */
|
||||
macb_writel(lp, IDR, MACB_BIT(RCOMP) |
|
||||
MACB_BIT(RXUBR) |
|
||||
MACB_BIT(ISR_TUND) |
|
||||
MACB_BIT(ISR_RLE) |
|
||||
MACB_BIT(TCOMP) |
|
||||
MACB_BIT(ISR_ROVR) |
|
||||
MACB_BIT(HRESP));
|
||||
|
||||
netif_stop_queue(dev);
|
||||
|
||||
phylink_stop(lp->phylink);
|
||||
phylink_disconnect_phy(lp->phylink);
|
||||
|
||||
dma_free_coherent(&lp->pdev->dev,
|
||||
AT91ETHER_MAX_RX_DESCR *
|
||||
macb_dma_desc_get_size(lp),
|
||||
q->rx_ring, q->rx_ring_dma);
|
||||
q->rx_ring = NULL;
|
||||
|
||||
dma_free_coherent(&lp->pdev->dev,
|
||||
AT91ETHER_MAX_RX_DESCR * AT91ETHER_MAX_RBUFF_SZ,
|
||||
q->rx_buffers, q->rx_buffers_dma);
|
||||
q->rx_buffers = NULL;
|
||||
at91ether_stop(lp);
|
||||
|
||||
return pm_runtime_put(&lp->pdev->dev);
|
||||
}
|
||||
|
||||
@@ -1975,7 +1975,6 @@ int cudbg_collect_dump_context(struct cudbg_init *pdbg_init,
|
||||
u8 mem_type[CTXT_INGRESS + 1] = { 0 };
|
||||
struct cudbg_buffer temp_buff = { 0 };
|
||||
struct cudbg_ch_cntxt *buff;
|
||||
u64 *dst_off, *src_off;
|
||||
u8 *ctx_buf;
|
||||
u8 i, k;
|
||||
int rc;
|
||||
@@ -2044,8 +2043,11 @@ int cudbg_collect_dump_context(struct cudbg_init *pdbg_init,
|
||||
}
|
||||
|
||||
for (j = 0; j < max_ctx_qid; j++) {
|
||||
__be64 *dst_off;
|
||||
u64 *src_off;
|
||||
|
||||
src_off = (u64 *)(ctx_buf + j * SGE_CTXT_SIZE);
|
||||
dst_off = (u64 *)buff->data;
|
||||
dst_off = (__be64 *)buff->data;
|
||||
|
||||
/* The data is stored in 64-bit cpu order. Convert it
|
||||
* to big endian before parsing.
|
||||
|
||||
@@ -136,6 +136,9 @@ static inline __u8 bitswap_1(unsigned char val)
|
||||
((val & 0x02) << 5) |
|
||||
((val & 0x01) << 7);
|
||||
}
|
||||
|
||||
extern const char * const dcb_ver_array[];
|
||||
|
||||
#define CXGB4_DCB_ENABLED true
|
||||
|
||||
#else /* !CONFIG_CHELSIO_T4_DCB */
|
||||
|
||||
@@ -2379,7 +2379,6 @@ static const struct file_operations rss_vf_config_debugfs_fops = {
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CHELSIO_T4_DCB
|
||||
extern char *dcb_ver_array[];
|
||||
|
||||
/* Data Center Briging information for each port.
|
||||
*/
|
||||
|
||||
@@ -588,7 +588,7 @@ static void fw_caps_to_lmm(enum fw_port_type port_type,
|
||||
/**
|
||||
* lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware
|
||||
* capabilities
|
||||
* @et_lmm: ethtool Link Mode Mask
|
||||
* @link_mode_mask: ethtool Link Mode Mask
|
||||
*
|
||||
* Translate ethtool Link Mode Mask into a Firmware Port capabilities
|
||||
* value.
|
||||
|
||||
@@ -165,6 +165,9 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f,
|
||||
unsigned int tid, bool dip, bool sip, bool dp,
|
||||
bool sp)
|
||||
{
|
||||
u8 *nat_lp = (u8 *)&f->fs.nat_lport;
|
||||
u8 *nat_fp = (u8 *)&f->fs.nat_fport;
|
||||
|
||||
if (dip) {
|
||||
if (f->fs.type) {
|
||||
set_tcb_field(adap, f, tid, TCB_SND_UNA_RAW_W,
|
||||
@@ -236,8 +239,9 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f,
|
||||
}
|
||||
|
||||
set_tcb_field(adap, f, tid, TCB_PDU_HDR_LEN_W, WORD_MASK,
|
||||
(dp ? f->fs.nat_lport : 0) |
|
||||
(sp ? f->fs.nat_fport << 16 : 0), 1);
|
||||
(dp ? (nat_lp[1] | nat_lp[0] << 8) : 0) |
|
||||
(sp ? (nat_fp[1] << 16 | nat_fp[0] << 24) : 0),
|
||||
1);
|
||||
}
|
||||
|
||||
/* Validate filter spec against configuration done on the card. */
|
||||
@@ -909,6 +913,9 @@ int set_filter_wr(struct adapter *adapter, int fidx)
|
||||
fwr->fpm = htons(f->fs.mask.fport);
|
||||
|
||||
if (adapter->params.filter2_wr_support) {
|
||||
u8 *nat_lp = (u8 *)&f->fs.nat_lport;
|
||||
u8 *nat_fp = (u8 *)&f->fs.nat_fport;
|
||||
|
||||
fwr->natmode_to_ulp_type =
|
||||
FW_FILTER2_WR_ULP_TYPE_V(f->fs.nat_mode ?
|
||||
ULP_MODE_TCPDDP :
|
||||
@@ -916,8 +923,8 @@ int set_filter_wr(struct adapter *adapter, int fidx)
|
||||
FW_FILTER2_WR_NATMODE_V(f->fs.nat_mode);
|
||||
memcpy(fwr->newlip, f->fs.nat_lip, sizeof(fwr->newlip));
|
||||
memcpy(fwr->newfip, f->fs.nat_fip, sizeof(fwr->newfip));
|
||||
fwr->newlport = htons(f->fs.nat_lport);
|
||||
fwr->newfport = htons(f->fs.nat_fport);
|
||||
fwr->newlport = htons(nat_lp[1] | nat_lp[0] << 8);
|
||||
fwr->newfport = htons(nat_fp[1] | nat_fp[0] << 8);
|
||||
}
|
||||
|
||||
/* Mark the filter as "pending" and ship off the Filter Work Request.
|
||||
@@ -1105,16 +1112,16 @@ static bool is_addr_all_mask(u8 *ipmask, int family)
|
||||
struct in_addr *addr;
|
||||
|
||||
addr = (struct in_addr *)ipmask;
|
||||
if (addr->s_addr == 0xffffffff)
|
||||
if (ntohl(addr->s_addr) == 0xffffffff)
|
||||
return true;
|
||||
} else if (family == AF_INET6) {
|
||||
struct in6_addr *addr6;
|
||||
|
||||
addr6 = (struct in6_addr *)ipmask;
|
||||
if (addr6->s6_addr32[0] == 0xffffffff &&
|
||||
addr6->s6_addr32[1] == 0xffffffff &&
|
||||
addr6->s6_addr32[2] == 0xffffffff &&
|
||||
addr6->s6_addr32[3] == 0xffffffff)
|
||||
if (ntohl(addr6->s6_addr32[0]) == 0xffffffff &&
|
||||
ntohl(addr6->s6_addr32[1]) == 0xffffffff &&
|
||||
ntohl(addr6->s6_addr32[2]) == 0xffffffff &&
|
||||
ntohl(addr6->s6_addr32[3]) == 0xffffffff)
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
|
||||
@@ -449,7 +449,7 @@ static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok)
|
||||
* or -1
|
||||
* @addr: the new MAC address value
|
||||
* @persist: whether a new MAC allocation should be persistent
|
||||
* @add_smt: if true also add the address to the HW SMT
|
||||
* @smt_idx: the destination to store the new SMT index.
|
||||
*
|
||||
* Modifies an MPS filter and sets it to the new MAC address if
|
||||
* @tcam_idx >= 0, or adds the MAC address to a new filter if
|
||||
@@ -1615,6 +1615,7 @@ static int tid_init(struct tid_info *t)
|
||||
* @stid: the server TID
|
||||
* @sip: local IP address to bind server to
|
||||
* @sport: the server's TCP port
|
||||
* @vlan: the VLAN header information
|
||||
* @queue: queue to direct messages from this server to
|
||||
*
|
||||
* Create an IP server for the given port and address.
|
||||
@@ -2609,7 +2610,7 @@ int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
|
||||
|
||||
/* Clear out filter specifications */
|
||||
memset(&f->fs, 0, sizeof(struct ch_filter_specification));
|
||||
f->fs.val.lport = cpu_to_be16(sport);
|
||||
f->fs.val.lport = be16_to_cpu(sport);
|
||||
f->fs.mask.lport = ~0;
|
||||
val = (u8 *)&sip;
|
||||
if ((val[0] | val[1] | val[2] | val[3]) != 0) {
|
||||
@@ -5377,10 +5378,10 @@ static inline bool is_x_10g_port(const struct link_config *lc)
|
||||
static int cfg_queues(struct adapter *adap)
|
||||
{
|
||||
u32 avail_qsets, avail_eth_qsets, avail_uld_qsets;
|
||||
u32 i, n10g = 0, qidx = 0, n1g = 0;
|
||||
u32 ncpus = num_online_cpus();
|
||||
u32 niqflint, neq, num_ulds;
|
||||
struct sge *s = &adap->sge;
|
||||
u32 i, n10g = 0, qidx = 0;
|
||||
u32 q10g = 0, q1g;
|
||||
|
||||
/* Reduce memory usage in kdump environment, disable all offload. */
|
||||
@@ -5426,7 +5427,6 @@ static int cfg_queues(struct adapter *adap)
|
||||
if (n10g)
|
||||
q10g = (avail_eth_qsets - (adap->params.nports - n10g)) / n10g;
|
||||
|
||||
n1g = adap->params.nports - n10g;
|
||||
#ifdef CONFIG_CHELSIO_T4_DCB
|
||||
/* For Data Center Bridging support we need to be able to support up
|
||||
* to 8 Traffic Priorities; each of which will be assigned to its
|
||||
@@ -5444,7 +5444,8 @@ static int cfg_queues(struct adapter *adap)
|
||||
else
|
||||
q10g = max(8U, q10g);
|
||||
|
||||
while ((q10g * n10g) > (avail_eth_qsets - n1g * q1g))
|
||||
while ((q10g * n10g) >
|
||||
(avail_eth_qsets - (adap->params.nports - n10g) * q1g))
|
||||
q10g--;
|
||||
|
||||
#else /* !CONFIG_CHELSIO_T4_DCB */
|
||||
|
||||
@@ -194,6 +194,7 @@ int cxgb4_ptp_redirect_rx_packet(struct adapter *adapter, struct port_info *pi)
|
||||
}
|
||||
|
||||
/**
|
||||
* cxgb4_ptp_adjfreq - Adjust frequency of PHC cycle counter
|
||||
* @ptp: ptp clock structure
|
||||
* @ppb: Desired frequency change in parts per billion
|
||||
*
|
||||
@@ -229,7 +230,7 @@ static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
|
||||
|
||||
/**
|
||||
* cxgb4_ptp_fineadjtime - Shift the time of the hardware clock
|
||||
* @ptp: ptp clock structure
|
||||
* @adapter: board private structure
|
||||
* @delta: Desired change in nanoseconds
|
||||
*
|
||||
* Adjust the timer by resetting the timecounter structure.
|
||||
|
||||
@@ -58,10 +58,6 @@ static struct ch_tc_pedit_fields pedits[] = {
|
||||
PEDIT_FIELDS(IP6_, DST_63_32, 4, nat_lip, 4),
|
||||
PEDIT_FIELDS(IP6_, DST_95_64, 4, nat_lip, 8),
|
||||
PEDIT_FIELDS(IP6_, DST_127_96, 4, nat_lip, 12),
|
||||
PEDIT_FIELDS(TCP_, SPORT, 2, nat_fport, 0),
|
||||
PEDIT_FIELDS(TCP_, DPORT, 2, nat_lport, 0),
|
||||
PEDIT_FIELDS(UDP_, SPORT, 2, nat_fport, 0),
|
||||
PEDIT_FIELDS(UDP_, DPORT, 2, nat_lport, 0),
|
||||
};
|
||||
|
||||
static struct ch_tc_flower_entry *allocate_flower_entry(void)
|
||||
@@ -156,14 +152,14 @@ static void cxgb4_process_flow_match(struct net_device *dev,
|
||||
struct flow_match_ports match;
|
||||
|
||||
flow_rule_match_ports(rule, &match);
|
||||
fs->val.lport = cpu_to_be16(match.key->dst);
|
||||
fs->mask.lport = cpu_to_be16(match.mask->dst);
|
||||
fs->val.fport = cpu_to_be16(match.key->src);
|
||||
fs->mask.fport = cpu_to_be16(match.mask->src);
|
||||
fs->val.lport = be16_to_cpu(match.key->dst);
|
||||
fs->mask.lport = be16_to_cpu(match.mask->dst);
|
||||
fs->val.fport = be16_to_cpu(match.key->src);
|
||||
fs->mask.fport = be16_to_cpu(match.mask->src);
|
||||
|
||||
/* also initialize nat_lport/fport to same values */
|
||||
fs->nat_lport = cpu_to_be16(match.key->dst);
|
||||
fs->nat_fport = cpu_to_be16(match.key->src);
|
||||
fs->nat_lport = fs->val.lport;
|
||||
fs->nat_fport = fs->val.fport;
|
||||
}
|
||||
|
||||
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
|
||||
@@ -354,12 +350,9 @@ static void process_pedit_field(struct ch_filter_specification *fs, u32 val,
|
||||
switch (offset) {
|
||||
case PEDIT_TCP_SPORT_DPORT:
|
||||
if (~mask & PEDIT_TCP_UDP_SPORT_MASK)
|
||||
offload_pedit(fs, cpu_to_be32(val) >> 16,
|
||||
cpu_to_be32(mask) >> 16,
|
||||
TCP_SPORT);
|
||||
fs->nat_fport = val;
|
||||
else
|
||||
offload_pedit(fs, cpu_to_be32(val),
|
||||
cpu_to_be32(mask), TCP_DPORT);
|
||||
fs->nat_lport = val >> 16;
|
||||
}
|
||||
fs->nat_mode = NAT_MODE_ALL;
|
||||
break;
|
||||
@@ -367,12 +360,9 @@ static void process_pedit_field(struct ch_filter_specification *fs, u32 val,
|
||||
switch (offset) {
|
||||
case PEDIT_UDP_SPORT_DPORT:
|
||||
if (~mask & PEDIT_TCP_UDP_SPORT_MASK)
|
||||
offload_pedit(fs, cpu_to_be32(val) >> 16,
|
||||
cpu_to_be32(mask) >> 16,
|
||||
UDP_SPORT);
|
||||
fs->nat_fport = val;
|
||||
else
|
||||
offload_pedit(fs, cpu_to_be32(val),
|
||||
cpu_to_be32(mask), UDP_DPORT);
|
||||
fs->nat_lport = val >> 16;
|
||||
}
|
||||
fs->nat_mode = NAT_MODE_ALL;
|
||||
}
|
||||
|
||||
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Reference in New Issue
Block a user